sandbox: Add a test for IRQ

Add a simple sandbox test for this uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

arch/sandbox/dts/test.dts

@@ -353,6 +353,10 @@
 		vss-microvolts = <0>;
 	};
 
+	irq {
+		compatible = "sandbox,irq";
+	};
+
 	lcd {
 		u-boot,dm-pre-reloc;
 		compatible = "sandbox,lcd-sdl";

configs/sandbox64_defconfig

@@ -114,6 +114,7 @@ CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
 CONFIG_CROS_EC_SANDBOX=y
 CONFIG_CROS_EC_SPI=y
+CONFIG_IRQ=y
 CONFIG_PWRSEQ=y
 CONFIG_SPL_PWRSEQ=y
 CONFIG_I2C_EEPROM=y

configs/sandbox_defconfig

@@ -132,6 +132,7 @@ CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
 CONFIG_CROS_EC_SANDBOX=y
 CONFIG_CROS_EC_SPI=y
+CONFIG_IRQ=y
 CONFIG_P2SB=y
 CONFIG_PWRSEQ=y
 CONFIG_SPL_PWRSEQ=y

configs/sandbox_flattree_defconfig

@@ -100,6 +100,7 @@ CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
 CONFIG_CROS_EC_SANDBOX=y
 CONFIG_CROS_EC_SPI=y
+CONFIG_IRQ=y
 CONFIG_PWRSEQ=y
 CONFIG_SPL_PWRSEQ=y
 CONFIG_I2C_EEPROM=y

configs/sandbox_spl_defconfig

@@ -120,6 +120,7 @@ CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
 CONFIG_CROS_EC_SANDBOX=y
 CONFIG_CROS_EC_SPI=y
+CONFIG_IRQ=y
 CONFIG_PWRSEQ=y
 CONFIG_SPL_PWRSEQ=y
 CONFIG_MMC_SANDBOX=y

drivers/misc/Makefile

@@ -42,6 +42,7 @@ obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
 obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
 obj-$(CONFIG_IRQ) += irq-uclass.o
+obj-$(CONFIG_SANDBOX) += irq_sandbox.o
 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
 obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
 obj-$(CONFIG_IMX8) += imx8/

drivers/misc/irq_sandbox.c

@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Sandbox driver for interrupts
+ *
+ * Copyright 2019 Google LLC
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <irq.h>
+
+static int sandbox_set_polarity(struct udevice *dev, uint irq, bool active_low)
+{
+	if (irq > 10)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int sandbox_route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num)
+{
+	if (pmc_gpe_num > 10)
+		return -ENOENT;
+
+	return pmc_gpe_num + 1;
+}
+
+static int sandbox_snapshot_polarities(struct udevice *dev)
+{
+	return 0;
+}
+
+static int sandbox_restore_polarities(struct udevice *dev)
+{
+	return 0;
+}
+
+static const struct irq_ops sandbox_irq_ops = {
+	.route_pmc_gpio_gpe	= sandbox_route_pmc_gpio_gpe,
+	.set_polarity		= sandbox_set_polarity,
+	.snapshot_polarities	= sandbox_snapshot_polarities,
+	.restore_polarities	= sandbox_restore_polarities,
+};
+
+static const struct udevice_id sandbox_irq_ids[] = {
+	{ .compatible = "sandbox,irq"},
+	{ }
+};
+
+U_BOOT_DRIVER(sandbox_irq_drv) = {
+	.name		= "sandbox_irq",
+	.id		= UCLASS_IRQ,
+	.of_match	= sandbox_irq_ids,
+	.ops		= &sandbox_irq_ops,
+};

test/dm/Makefile

@@ -25,6 +25,7 @@ obj-$(CONFIG_DM_GPIO) += gpio.o
 obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o
 obj-$(CONFIG_DM_I2C) += i2c.o
 obj-$(CONFIG_SOUND) += i2s.o
+obj-y += irq.o
 obj-$(CONFIG_LED) += led.o
 obj-$(CONFIG_DM_MAILBOX) += mailbox.o
 obj-$(CONFIG_DM_MMC) += mmc.o

test/dm/irq.c

@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for irq uclass
+ *
+ * Copyright 2019 Google LLC
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <irq.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+/* Base test of the irq uclass */
+static int dm_test_irq_base(struct unit_test_state *uts)
+{
+	struct udevice *dev;
+
+	ut_assertok(uclass_first_device_err(UCLASS_IRQ, &dev));
+
+	ut_asserteq(5, irq_route_pmc_gpio_gpe(dev, 4));
+	ut_asserteq(-ENOENT, irq_route_pmc_gpio_gpe(dev, 14));
+
+	ut_assertok(irq_set_polarity(dev, 4, true));
+	ut_asserteq(-EINVAL, irq_set_polarity(dev, 14, true));
+
+	ut_assertok(irq_snapshot_polarities(dev));
+	ut_assertok(irq_restore_polarities(dev));
+
+	return 0;
+}
+DM_TEST(dm_test_irq_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);