clk: sunxi: h6: Add XHCI clocks
The XHCI controller has its own clock and reset. Add them. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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@ -43,6 +43,7 @@ static struct ccu_clk_gate h6_gates[] = {
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[CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)),
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[CLK_BUS_OHCI3] = GATE(0xa8c, BIT(3)),
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[CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)),
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[CLK_BUS_XHCI] = GATE(0xa8c, BIT(5)),
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[CLK_BUS_EHCI3] = GATE(0xa8c, BIT(7)),
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[CLK_BUS_OTG] = GATE(0xa8c, BIT(8)),
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};
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@ -71,6 +72,7 @@ static struct ccu_reset h6_resets[] = {
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[RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)),
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[RST_BUS_OHCI3] = RESET(0xa8c, BIT(19)),
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[RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)),
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[RST_BUS_XHCI] = RESET(0xa8c, BIT(21)),
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[RST_BUS_EHCI3] = RESET(0xa8c, BIT(23)),
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[RST_BUS_OTG] = RESET(0xa8c, BIT(24)),
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};
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