brain-hackers_pepepper-mirror
/
u-boot-brain
mirror of https://github.com/brain-hackers/u-boot-brain
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge tag 'u-boot-rockchip-20200327' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip 

- Fixed for rv1108 and elgin-rv1108 board
- Fix the keyboard from USB instead of CrOS EC
This commit is contained in:
Tom Rini 2020-03-26 21:39:59 -04:00
parent af827140e5 e5a405583f
commit fa041198a8
16 changed files with 40 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/dts/rv1108-elgin-r1.dts
View File

@ -40,9 +40,20 @@
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer_pullup>;
status = "okay";
};
&usb20_otg {
status = "okay";
};
&pinctrl {
uart2m0 {
uart2m0_xfer_pullup: uart2m0-xfer-pullup {
rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
<2 RK_PD1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
};
};

6
arch/arm/dts/rv1108-u-boot.dtsi Normal file
View File

@ -0,0 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
#include "rockchip-u-boot.dtsi"

9
board/elgin/elgin_rv1108/elgin_rv1108.c
View File

@ -5,8 +5,9 @@
*/
#include <common.h>
#include <syscon.h>
#include <asm/io.h>
#include <fdtdec.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/grf_rv1108.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/gpio.h>
@ -15,7 +16,6 @@ DECLARE_GLOBAL_DATA_PTR;
int mach_cpu_init(void)
{
int node;
struct rv1108_grf *grf;
enum {
GPIO3C3_SHIFT = 6,
@ -35,8 +35,7 @@ int mach_cpu_init(void)
GPIO2D1_UART2_SIN_M0,
};
node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
/* Elgin board use UART2 m0 for debug*/
rk_clrsetreg(&grf->gpio2d_iomux,
@ -50,7 +49,7 @@ int mach_cpu_init(void)
#define MODEM_ENABLE_GPIO 111
int board_early_init_f(void)
int rk_board_late_init(void)
{
gpio_request(MODEM_ENABLE_GPIO, "modem_enable");
gpio_direction_output(MODEM_ENABLE_GPIO, 0);

7
board/rockchip/evb_rv1108/evb_rv1108.c
View File

@ -5,8 +5,9 @@
*/
#include <common.h>
#include <syscon.h>
#include <asm/io.h>
#include <fdtdec.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/grf_rv1108.h>
#include <asm/arch-rockchip/hardware.h>
@ -14,7 +15,6 @@ DECLARE_GLOBAL_DATA_PTR;
int mach_cpu_init(void)
{
int node;
struct rv1108_grf *grf;
enum {
GPIO3C3_SHIFT = 6,
@ -34,8 +34,7 @@ int mach_cpu_init(void)
GPIO2D1_UART2_SIN_M0,
};
node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
/*evb board use UART2 m0 for debug*/
rk_clrsetreg(&grf->gpio2d_iomux,

2
configs/elgin-rv1108_defconfig
View File

@ -4,12 +4,14 @@ CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ROCKCHIP_RV1108=y
CONFIG_TARGET_ELGIN_RV1108=y
CONFIG_ROCKCHIP_BOOT_MODE_REG=0
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0x10210000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb"
CONFIG_BOARD_LATE_INIT=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_CMD_GPIO=y

1
configs/miqi-rk3288_defconfig
View File

@ -75,6 +75,7 @@ CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP8 is not set
CONFIG_DISPLAY=y

1
configs/roc-pc-rk3399_defconfig
View File

@ -56,5 +56,6 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y

1
configs/rock2_defconfig
View File

@ -74,6 +74,7 @@ CONFIG_USB_DWC2=y
CONFIG_ROCKCHIP_USB2_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP8 is not set
CONFIG_DISPLAY=y

1
configs/tinker-rk3288_defconfig
View File

@ -80,6 +80,7 @@ CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y

1
configs/tinker-s-rk3288_defconfig
View File

@ -80,6 +80,7 @@ CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP8 is not set
CONFIG_DISPLAY=y

2
include/configs/miqi_rk3288.h
View File

@ -7,7 +7,7 @@
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"

2
include/configs/roc-pc-rk3399.h
View File

@ -7,7 +7,7 @@
#define __ROC_PC_RK3399_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"

2
include/configs/rock2.h
View File

@ -7,7 +7,7 @@
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"

2
include/configs/tinker_rk3288.h
View File

@ -7,7 +7,7 @@
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"

2
include/configs/vyasa-rk3288.h
View File

@ -9,7 +9,7 @@
#define __CONFIG_H
#define ROCKCHIP_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdin=serial,usbkbd\0" \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"

6
tools/rkcommon.c
View File

@ -307,11 +307,13 @@ static int rkcommon_parse_header(const void *buf, struct header0_info *header0,
rkcommon_offset_to_spi(hdr1_offset));
for (i = 0; i < ARRAY_SIZE(spl_infos); i++) {
if (!memcmp(&hdr1_sdmmc->magic, spl_infos[i].spl_hdr, 4)) {
if (!memcmp(&hdr1_sdmmc->magic, spl_infos[i].spl_hdr,
RK_SPL_HDR_SIZE)) {
if (spl_info)
*spl_info = &spl_infos[i];
return IH_TYPE_RKSD;
} else if (!memcmp(&hdr1_spi->magic, spl_infos[i].spl_hdr, 4)) {
} else if (!memcmp(&hdr1_spi->magic, spl_infos[i].spl_hdr,
RK_SPL_HDR_SIZE)) {
if (spl_info)
*spl_info = &spl_infos[i];
return IH_TYPE_RKSPI;