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ARM: omap3: added common configuration for Technexion TAM3517
The TAM3517 is a SOM module that can be used on custom boards. The patch add a common configuration file that is included by the boards using this module. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Stefano Babic
Albert ARIBAUD
parent
afffcc7bfa
commit
f9c6fac497
361
include/configs/tam3517-common.h
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361
include/configs/tam3517-common.h
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/*
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* Copyright (C) 2011
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* Copyright (C) 2009 TechNexion Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef __TAM3517_H
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#define __TAM3517_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_OMAP /* in a TI OMAP core */
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#define CONFIG_OMAP34XX /* which is a 34XX */
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#define CONFIG_SYS_TEXT_BASE 0x80008000
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <asm/arch/omap3.h>
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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#undef CONFIG_USE_IRQ /* no support for IRQs */
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
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2 * 1024 * 1024)
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/*
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* DDR related
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*/
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#define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
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#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
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/*
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* Hardware drivers
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*/
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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/*
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* select serial console configuration
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*/
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
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#define CONFIG_SERIAL1 /* UART1 */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
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115200}
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#define CONFIG_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_DOS_PARTITION
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/* EHCI */
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#define CONFIG_OMAP3_GPIO_5
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_OMAP
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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#define CONFIG_USB_STORAGE
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/* #define CONFIG_EHCI_DCACHE */
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/* commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EXT2 /* EXT2 Support */
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#define CONFIG_CMD_FAT /* FAT support */
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#define CONFIG_CMD_GPIO
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#define CONFIG_CMD_I2C /* I2C serial bus support */
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC /* MMC support */
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_USB
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#undef CONFIG_CMD_FLASH /* only NAND on the SOM */
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#undef CONFIG_CMD_IMLS
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_BUS 0
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#define CONFIG_SYS_I2C_BUS_SELECT 1
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#define CONFIG_DRIVER_OMAP34XX_I2C
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/*
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* Board NAND Info.
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*/
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#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
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/* to access */
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/* nand at CS0 */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
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/* NAND devices */
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#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
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#define CONFIG_AUTO_COMPLETE
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 32 /* max number of command */
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/* args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
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0x01F00000) /* 31MB */
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
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/* address */
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/*
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* AM3517 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000
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/*
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* Stack sizes
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*
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* FLASH and environment organization
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*/
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/* **** PISMO SUPPORT *** */
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/* Configure the PISMO */
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#define PISMO1_NAND_SIZE GPMC_SIZE_128M
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#define CONFIG_NAND_OMAP_GPMC
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#define GPMC_NAND_ECC_LP_x16_LAYOUT
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#define CONFIG_ENV_IS_IN_NAND
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#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
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/* Redundant Environment */
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
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2 * CONFIG_SYS_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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/*
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* ethernet support, EMAC
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*
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*/
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#define CONFIG_DRIVER_TI_EMAC
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#define CONFIG_DRIVER_TI_EMAC_USE_RMII
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#define CONFIG_MII
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#define CONFIG_EMAC_MDIO_PHY_NUM 0
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_NET_MULTI
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/* Defines for SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_CONSOLE
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#define CONFIG_SPL_NAND_SIMPLE
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#define CONFIG_SPL_NAND_SOFTECC
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#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_POWER_SUPPORT
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
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#define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */
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#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
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#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
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#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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/* NAND boot config */
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
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48, 49, 50, 51, 52, 53, 54, 55,\
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56, 57, 58, 59, 60, 61, 62, 63}
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#define CONFIG_SYS_NAND_ECCSIZE 256
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
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CONFIG_SYS_NAND_ECCSIZE)
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
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CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
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#define CONFIG_OF_LIBFDT
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#define CONFIG_FIT
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_CMD_MTDPARTS
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/* Setup MTD for NAND on the SOM */
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
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"512k(u-boot),128k(env1)," \
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"128k(env2),6m(kernel),-(rootfs)"
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#define xstr(s) str(s)
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#define str(s) #s
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#define CONFIG_TAM3517_SETTINGS \
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"netdev=eth0\0" \
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"nandargs=setenv bootargs root=${nandroot} " \
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"rootfstype=${nandrootfstype}\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip_sta=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
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"addip=if test -n ${ipdyn};then run addip_dyn;" \
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"else run addip_sta;fi\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addtty=setenv bootargs ${bootargs}" \
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" console=ttyO0,${baudrate}\0" \
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"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
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"loadaddr=82000000\0" \
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"kernel_addr_r=82000000\0" \
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"hostname=" xstr(CONFIG_HOSTNAME) "\0" \
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"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
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"flash_self=run ramargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr}\0" \
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"nandboot=run nandargs addip addtty addmtd addmisc;" \
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"nand read ${kernel_addr_r} kernel\0" \
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"bootm ${kernel_addr_r}\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
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"run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr_r}\0" \
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"net_self=if run net_self_load;then " \
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"run ramargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
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"else echo Images not loades;fi\0" \
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"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \
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"load=tftp ${loadaddr} ${u-boot}\0" \
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"loadmlo=tftp ${loadaddr} ${mlo}\0" \
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"mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \
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"uboot_addr=0x80000\0" \
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"update=nandecc sw;nand erase ${uboot_addr} 100000;" \
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"nand write ${loadaddr} ${uboot_addr} 80000\0" \
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"updatemlo=nandecc hw;nand erase 0 20000;" \
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"nand write ${loadaddr} 0 20000\0" \
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"upd=if run load;then echo Updating u-boot;if run update;" \
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"then echo U-Boot updated;" \
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"else echo Error updating u-boot !;" \
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"echo Board without bootloader !!;" \
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"fi;" \
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"else echo U-Boot not downloaded..exiting;fi\0" \
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#endif /* __TAM3517_H */
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