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u-boot-brain
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sharp: fix indent

This commit is contained in:
Suguru Saito 2021-03-28 23:58:14 +09:00
parent 0c541529a9
commit f8e1ec9d4d
1 changed files with 44 additions and 44 deletions
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88
board/sharp/common/lcd.c
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@ -20,15 +20,15 @@ static int mxsfb_write_byte(uint32_t payload, const unsigned int data)
const unsigned int timeout = 0x10000;
if (mxs_wait_mask_clr(&regs->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
timeout))
timeout))
return -ETIMEDOUT;
writel((1 << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) |
(1 << LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET),
&regs->hw_lcdif_transfer_count);
(1 << LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET),
&regs->hw_lcdif_transfer_count);
writel(LCDIF_CTRL_DATA_SELECT | LCDIF_CTRL_RUN,
&regs->hw_lcdif_ctrl_clr);
&regs->hw_lcdif_ctrl_clr);
if (data)
writel(LCDIF_CTRL_DATA_SELECT, &regs->hw_lcdif_ctrl_set);
@ -40,7 +40,7 @@ static int mxsfb_write_byte(uint32_t payload, const unsigned int data)
writel(payload, &regs->hw_lcdif_data);
return mxs_wait_mask_clr(&regs->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
timeout);
timeout);
}
void mxsfb_system_setup(void)
@ -61,22 +61,22 @@ void mxsfb_system_setup(void)
lcd_config_t config = get_lcd_config();
valid_data = readl(&lcdif->hw_lcdif_ctrl1) &
LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK;
LCDIF_CTRL1_BYTE_PACKING_FORMAT_MASK;
writel(0x3 << LCDIF_CTRL1_BYTE_PACKING_FORMAT_OFFSET,
&lcdif->hw_lcdif_ctrl1);
&lcdif->hw_lcdif_ctrl1);
/* Switch the LCDIF into System-Mode */
writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DOTCLK_MODE |
LCDIF_CTRL_BYPASS_COUNT,
&lcdif->hw_lcdif_ctrl_clr);
LCDIF_CTRL_BYPASS_COUNT,
&lcdif->hw_lcdif_ctrl_clr);
writel(LCDIF_CTRL_VSYNC_MODE, &lcdif->hw_lcdif_ctrl_set);
writel(LCDIF_VDCTRL3_VSYNC_ONLY, &lcdif->hw_lcdif_vdctrl3_set);
writel((0x01 << LCDIF_TIMING_CMD_HOLD_OFFSET) |
(0x01 << LCDIF_TIMING_CMD_SETUP_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_HOLD_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_SETUP_OFFSET),
&lcdif->hw_lcdif_timing);
(0x01 << LCDIF_TIMING_CMD_SETUP_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_HOLD_OFFSET) |
(0x01 << LCDIF_TIMING_DATA_SETUP_OFFSET),
&lcdif->hw_lcdif_timing);
/* Enable LCD Controller */
gpio_direction_output(MX28_PAD_GPMI_ALE__GPIO_0_26, 1);
@ -129,44 +129,44 @@ void mxsfb_system_setup(void)
}
#endif
mxsfb_write_byte(0x11, 0); /* Sleep Out */
mdelay(120);
mxsfb_write_byte(0x11, 0); /* Sleep Out */
mdelay(120);
#ifdef CONFIG_BRAIN_2G
mxsfb_write_byte(0x34, 0);
mdelay(30);
#endif
mxsfb_write_byte(0x29, 0); /* Display On */
mdelay(20);
mxsfb_write_byte(0x29, 0); /* Display On */
mdelay(20);
mxsfb_write_byte(0x2a, 0); /* Column Address Set */
mxsfb_write_byte(0x2a, 0); /* Column Address Set */
mxsfb_write_byte(0x00, 1); /* Start Column in 2 Bytes */
mxsfb_write_byte(0x00, 1);
mxsfb_write_byte(0x00, 1); /* Start Column in 2 Bytes */
mxsfb_write_byte(0x00, 1);
#ifdef CONFIG_BRAIN_3G_4G
mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
#else
mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Column in 2 Bytes */
mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
#endif
mxsfb_write_byte(0x2b, 0); /* Page Address Set */
mxsfb_write_byte(0x2b, 0); /* Page Address Set */
mxsfb_write_byte(0x00, 1); /* Start Page in 2 Bytes */
mxsfb_write_byte(0x00, 1);
mxsfb_write_byte(0x00, 1); /* Start Page in 2 Bytes */
mxsfb_write_byte(0x00, 1);
#ifdef CONFIG_BRAIN_3G_4G
mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
mxsfb_write_byte((config.height & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
mxsfb_write_byte((config.height & 0x00ff) >> 0, 1);
#else
mxsfb_write_byte((config.width & 0xff00) >> 8, 1); /* End Page in 2 Bytes */
mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
mxsfb_write_byte((config.width & 0x00ff) >> 0, 1);
#endif
mxsfb_write_byte(0x2c, 0); /* Memory Write */
mxsfb_write_byte(0x2c, 0); /* Memory Write */
#ifdef CONFIG_BRAIN_3G_4G
/* Fill black */
@ -184,7 +184,7 @@ void mxsfb_system_setup(void)
#endif
writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DATA_SELECT,
&lcdif->hw_lcdif_ctrl_set);
&lcdif->hw_lcdif_ctrl_set);
/* Turn on backlight */
writel(CLKCTRL_XTAL_PWM_CLK24M_GATE, &xtal->hw_clkctrl_xtal_clr);
@ -193,29 +193,29 @@ void mxsfb_system_setup(void)
writel(PWM_CTRL_CLKGATE, &pwm->hw_pwm_ctrl_clr);
writel(PWM_CTRL_PWM0_ENABLE | PWM_CTRL_PWM1_ENABLE,
&pwm->hw_pwm_ctrl_clr);
&pwm->hw_pwm_ctrl_clr);
writel((0x005a << PWM_ACTIVE0_INACTIVE_OFFSET) |
(0x0000 << PWM_ACTIVE0_ACTIVE_OFFSET),
&pwm->hw_pwm_active0_set);
(0x0000 << PWM_ACTIVE0_ACTIVE_OFFSET),
&pwm->hw_pwm_active0_set);
writel((0x00f0 << PWM_ACTIVE1_INACTIVE_OFFSET) |
(0x0000 << PWM_ACTIVE1_ACTIVE_OFFSET),
&pwm->hw_pwm_active1_set);
(0x0000 << PWM_ACTIVE1_ACTIVE_OFFSET),
&pwm->hw_pwm_active1_set);
writel((0x1 << PWM_PERIOD0_CDIV_OFFSET) |
(0x2 << PWM_PERIOD0_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD0_ACTIVE_STATE_OFFSET) |
(0x01f3 << PWM_PERIOD0_PERIOD_OFFSET),
&pwm->hw_pwm_period0_set);
(0x2 << PWM_PERIOD0_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD0_ACTIVE_STATE_OFFSET) |
(0x01f3 << PWM_PERIOD0_PERIOD_OFFSET),
&pwm->hw_pwm_period0_set);
writel((0x0 << PWM_PERIOD1_CDIV_OFFSET) |
(0x3 << PWM_PERIOD1_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD1_ACTIVE_STATE_OFFSET) |
(0x07cf << PWM_PERIOD1_PERIOD_OFFSET),
&pwm->hw_pwm_period1_set);
(0x3 << PWM_PERIOD1_INACTIVE_STATE_OFFSET) |
(0x3 << PWM_PERIOD1_ACTIVE_STATE_OFFSET) |
(0x07cf << PWM_PERIOD1_PERIOD_OFFSET),
&pwm->hw_pwm_period1_set);
writel(PWM_CTRL_PWM0_ENABLE | PWM_CTRL_PWM1_ENABLE,
&pwm->hw_pwm_ctrl_set);
&pwm->hw_pwm_ctrl_set);
}
#endif