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ati_radeon: Support PCI virtual not eq bus mapping.

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Use pci_bus_to_virt() to convert the bus address from the BARs to
virtual address' to eliminate the direct mapping requirement.

Rename variables to better match usage (_phys -> _bus or no-suffix)

This fixes the mpc8572ds CONFIG_PHYS_64BIT mode failure:
"videoboot: Video ROM failed to map!"

Tested on mpc8572ds with and without CONFIG_PHYS_64BIT.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
This commit is contained in:
Ed Swarthout 2010-03-31 15:52:40 -05:00 committed by Anatolij Gustschin
parent 9624f6d9eb
commit f6a7a2e888
3 changed files with 32 additions and 27 deletions
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10
drivers/bios_emulator/atibios.c
View File

@ -173,7 +173,7 @@ Maps a pointer to the BIOS image on the graphics card on the PCI bus.
****************************************************************************/ ****************************************************************************/
void *PCI_mapBIOSImage(pci_dev_t pcidev) void *PCI_mapBIOSImage(pci_dev_t pcidev)
{ {
u32 BIOSImagePhys; u32 BIOSImageBus;
int BIOSImageBAR; int BIOSImageBAR;
u8 *BIOSImage; u8 *BIOSImage;
@ -195,16 +195,18 @@ void *PCI_mapBIOSImage(pci_dev_t pcidev)
specific programming for different cards to solve this problem. specific programming for different cards to solve this problem.
*/ */
if ((BIOSImagePhys = PCI_findBIOSAddr(pcidev, &BIOSImageBAR)) == 0) { BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
if (BIOSImageBus == 0) {
printf("Find bios addr error\n"); printf("Find bios addr error\n");
return NULL; return NULL;
} }
BIOSImage = (u8 *) BIOSImagePhys; BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
PCI_REGION_MEM, 0, MAP_NOCACHE);
/*Change the PCI BAR registers to map it onto the bus.*/ /*Change the PCI BAR registers to map it onto the bus.*/
pci_write_config_dword(pcidev, BIOSImageBAR, 0); pci_write_config_dword(pcidev, BIOSImageBAR, 0);
pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImagePhys | 0x1); pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
udelay(1); udelay(1);

45
drivers/video/ati_radeon_fb.c
View File

@ -210,7 +210,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
* ToDo: identify these cases * ToDo: identify these cases
*/ */
DPRINT("radeonfb: Found %ldk of %s %d bits wide videoram\n", DPRINT("radeonfb: Found %dk of %s %d bits wide videoram\n",
rinfo->video_ram / 1024, rinfo->video_ram / 1024,
rinfo->vram_ddr ? "DDR" : "SDRAM", rinfo->vram_ddr ? "DDR" : "SDRAM",
rinfo->vram_width); rinfo->vram_width);
@ -586,14 +586,16 @@ int radeon_probe(struct radeonfb_info *rinfo)
rinfo->pdev.device = did; rinfo->pdev.device = did;
rinfo->family = get_radeon_id_family(rinfo->pdev.device); rinfo->family = get_radeon_id_family(rinfo->pdev.device);
pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0,
&rinfo->fb_base_phys); &rinfo->fb_base_bus);
pci_read_config_dword(pdev, PCI_BASE_ADDRESS_2, pci_read_config_dword(pdev, PCI_BASE_ADDRESS_2,
&rinfo->mmio_base_phys); &rinfo->mmio_base_bus);
rinfo->fb_base_phys &= 0xfffff000; rinfo->fb_base_bus &= 0xfffff000;
rinfo->mmio_base_phys &= ~0x04; rinfo->mmio_base_bus &= ~0x04;
rinfo->mmio_base = (void *)rinfo->mmio_base_phys; rinfo->mmio_base = pci_bus_to_virt(pdev, rinfo->mmio_base_bus,
DPRINT("rinfo->mmio_base = 0x%x\n",rinfo->mmio_base); PCI_REGION_MEM, 0, MAP_NOCACHE);
DPRINT("rinfo->mmio_base = 0x%x bus=0x%x\n",
rinfo->mmio_base, rinfo->mmio_base_bus);
rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16; rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16;
DPRINT("rinfo->fb_local_base = 0x%x\n",rinfo->fb_local_base); DPRINT("rinfo->fb_local_base = 0x%x\n",rinfo->fb_local_base);
/* PostBIOS with x86 emulater */ /* PostBIOS with x86 emulater */
@ -611,14 +613,15 @@ int radeon_probe(struct radeonfb_info *rinfo)
rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM, rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM,
rinfo->video_ram); rinfo->video_ram);
rinfo->fb_base = (void *)rinfo->fb_base_phys; rinfo->fb_base = pci_bus_to_virt(pdev, rinfo->fb_base_bus,
PCI_REGION_MEM, 0, MAP_NOCACHE);
DPRINT("Radeon: framebuffer base phy address 0x%08x," \ DPRINT("Radeon: framebuffer base address 0x%08x, "
"MMIO base phy address 0x%08x," \ "bus address 0x%08x\n"
"framebuffer local base 0x%08x.\n ", "MMIO base address 0x%08x, bus address 0x%08x, "
rinfo->fb_base_phys, rinfo->mmio_base_phys, "framebuffer local base 0x%08x.\n ",
rinfo->fb_local_base); (u32)rinfo->fb_base, rinfo->fb_base_bus,
(u32)rinfo->mmio_base, rinfo->mmio_base_bus,
rinfo->fb_local_base);
return 0; return 0;
} }
return -1; return -1;
@ -734,13 +737,13 @@ void *video_hw_init(void)
} }
pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS; pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
pGD->pciBase = rinfo->fb_base_phys; pGD->pciBase = (unsigned int)rinfo->fb_base;
pGD->frameAdrs = rinfo->fb_base_phys; pGD->frameAdrs = (unsigned int)rinfo->fb_base;
pGD->memSize = 64 * 1024 * 1024; pGD->memSize = 64 * 1024 * 1024;
/* Cursor Start Address */ /* Cursor Start Address */
pGD->dprBase = pGD->dprBase = (pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) +
(pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) + rinfo->fb_base_phys; (unsigned int)rinfo->fb_base;
if ((pGD->dprBase & 0x0fff) != 0) { if ((pGD->dprBase & 0x0fff) != 0) {
/* allign it */ /* allign it */
pGD->dprBase &= 0xfffff000; pGD->dprBase &= 0xfffff000;
@ -748,8 +751,8 @@ void *video_hw_init(void)
} }
DPRINT ("Cursor Start %x Pattern Start %x\n", pGD->dprBase, DPRINT ("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
PATTERN_ADR); PATTERN_ADR);
pGD->vprBase = rinfo->fb_base_phys; /* Dummy */ pGD->vprBase = (unsigned int)rinfo->fb_base; /* Dummy */
pGD->cprBase = rinfo->fb_base_phys; /* Dummy */ pGD->cprBase = (unsigned int)rinfo->fb_base; /* Dummy */
/* set up Hardware */ /* set up Hardware */
/* Clear video memory (only visible screen area) */ /* Clear video memory (only visible screen area) */

4
drivers/video/ati_radeon_fb.h
View File

@ -49,8 +49,8 @@ struct radeonfb_info {
struct pci_device_id pdev; struct pci_device_id pdev;
u16 family; u16 family;
u32 fb_base_phys; u32 fb_base_bus;
u32 mmio_base_phys; u32 mmio_base_bus;
void *mmio_base; void *mmio_base;
void *fb_base; void *fb_base;