mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-28 07:30:26 +09:00
- Watchdog, Unleashed and Icicle improvements
This commit is contained in:
commit
f6127db8cc
@ -17,8 +17,8 @@ config TARGET_MICROCHIP_ICICLE
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config TARGET_QEMU_VIRT
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bool "Support QEMU Virt Board"
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config TARGET_SIFIVE_FU540
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bool "Support SiFive FU540 Board"
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config TARGET_SIFIVE_UNLEASHED
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bool "Support SiFive Unleashed Board"
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config TARGET_SIPEED_MAIX
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bool "Support Sipeed Maix Board"
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@ -55,7 +55,7 @@ config SPL_SYS_DCACHE_OFF
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source "board/AndesTech/ax25-ae350/Kconfig"
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source "board/emulation/qemu-riscv/Kconfig"
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source "board/microchip/mpfs_icicle/Kconfig"
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source "board/sifive/fu540/Kconfig"
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source "board/sifive/unleashed/Kconfig"
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source "board/sipeed/maix/Kconfig"
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# platform-specific options below
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@ -271,4 +271,82 @@ config STACK_SIZE_SHIFT
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config OF_BOARD_FIXUP
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default y if OF_SEPARATE && RISCV_SMODE
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config USE_ARCH_MEMCPY
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bool "Use an assembly optimized implementation of memcpy"
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default y
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help
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Enable the generation of an optimized version of memcpy.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config SPL_USE_ARCH_MEMCPY
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bool "Use an assembly optimized implementation of memcpy for SPL"
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default y if USE_ARCH_MEMCPY
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depends on SPL
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help
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Enable the generation of an optimized version of memcpy.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config TPL_USE_ARCH_MEMCPY
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bool "Use an assembly optimized implementation of memcpy for TPL"
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default y if USE_ARCH_MEMCPY
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depends on TPL
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help
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Enable the generation of an optimized version of memcpy.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config USE_ARCH_MEMMOVE
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bool "Use an assembly optimized implementation of memmove"
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default y
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help
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Enable the generation of an optimized version of memmove.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config SPL_USE_ARCH_MEMMOVE
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bool "Use an assembly optimized implementation of memmove for SPL"
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default y if USE_ARCH_MEMCPY
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depends on SPL
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help
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Enable the generation of an optimized version of memmove.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config TPL_USE_ARCH_MEMMOVE
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bool "Use an assembly optimized implementation of memmove for TPL"
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default y if USE_ARCH_MEMCPY
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depends on TPL
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help
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Enable the generation of an optimized version of memmove.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config USE_ARCH_MEMSET
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bool "Use an assembly optimized implementation of memset"
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default y
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help
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Enable the generation of an optimized version of memset.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config SPL_USE_ARCH_MEMSET
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bool "Use an assembly optimized implementation of memset for SPL"
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default y if USE_ARCH_MEMSET
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depends on SPL
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help
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Enable the generation of an optimized version of memset.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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config TPL_USE_ARCH_MEMSET
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bool "Use an assembly optimized implementation of memset for TPL"
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default y if USE_ARCH_MEMSET
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depends on TPL
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help
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Enable the generation of an optimized version of memset.
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Such an implementation may be faster under some conditions
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but may increase the binary size.
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endmenu
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0+
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dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
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dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb
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@ -439,7 +439,6 @@
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interrupts = <21>;
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clocks = <&sysclk K210_CLK_WDT0>;
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resets = <&sysrst K210_RST_WDT0>;
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status = "disabled";
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};
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wdt1: watchdog@50410000 {
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@ -232,7 +232,6 @@
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reg-shift = <2>;
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interrupt-parent = <&plic>;
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interrupts = <90>;
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clock-frequency = <150000000>;
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clocks = <&clkcfg CLK_MMUART0>;
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status = "okay";
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};
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@ -294,7 +293,6 @@
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reg-shift = <2>;
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interrupt-parent = <&plic>;
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interrupts = <91>;
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clock-frequency = <150000000>;
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clocks = <&clkcfg CLK_MMUART1>;
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status = "okay";
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};
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@ -305,7 +303,6 @@
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reg-shift = <2>;
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interrupt-parent = <&plic>;
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interrupts = <92>;
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clock-frequency = <150000000>;
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clocks = <&clkcfg CLK_MMUART2>;
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status = "okay";
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};
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@ -316,7 +313,6 @@
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reg-shift = <2>;
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interrupt-parent = <&plic>;
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interrupts = <93>;
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clock-frequency = <150000000>;
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clocks = <&clkcfg CLK_MMUART3>;
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status = "okay";
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};
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@ -19,31 +19,25 @@
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#undef __HAVE_ARCH_STRRCHR
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#undef __HAVE_ARCH_STRCHR
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#undef __HAVE_ARCH_MEMCPY
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#undef __HAVE_ARCH_MEMMOVE
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#undef __HAVE_ARCH_MEMCHR
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#undef __HAVE_ARCH_MEMZERO
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#undef __HAVE_ARCH_MEMSET
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#ifdef CONFIG_MARCO_MEMSET
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#define memset(_p, _v, _n) \
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(typeof(_p) (p) = (_p); \
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typeof(_v) (v) = (_v); \
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typeof(_n) (n) = (_n); \
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{ \
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if ((n) != 0) { \
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if (__builtin_constant_p((v)) && (v) == 0) \
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__memzero((p), (n)); \
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else \
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memset((p), (v), (n)); \
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} \
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(p); \
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})
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#define memzero(_p, _n) \
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(typeof(_p) (p) = (_p); \
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typeof(_n) (n) = (_n); \
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{ if ((n) != 0) __memzero((p), (n)); (p); })
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#undef __HAVE_ARCH_MEMCPY
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#if CONFIG_IS_ENABLED(USE_ARCH_MEMCPY)
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#define __HAVE_ARCH_MEMCPY
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#endif
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extern void *memcpy(void *, const void *, __kernel_size_t);
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#undef __HAVE_ARCH_MEMMOVE
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#if CONFIG_IS_ENABLED(USE_ARCH_MEMMOVE)
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#define __HAVE_ARCH_MEMMOVE
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#endif
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extern void *memmove(void *, const void *, __kernel_size_t);
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#undef __HAVE_ARCH_MEMZERO
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#if CONFIG_IS_ENABLED(USE_ARCH_MEMSET)
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#define __HAVE_ARCH_MEMSET
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#endif
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extern void *memset(void *, int, __kernel_size_t);
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#endif /* __ASM_RISCV_STRING_H */
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@ -36,3 +36,7 @@ CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI)
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extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC)
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extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC)
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extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o
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obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
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108
arch/riscv/lib/memcpy.S
Normal file
108
arch/riscv/lib/memcpy.S
Normal file
@ -0,0 +1,108 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2013 Regents of the University of California
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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/* void *memcpy(void *, const void *, size_t) */
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ENTRY(__memcpy)
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WEAK(memcpy)
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move t6, a0 /* Preserve return value */
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/* Defer to byte-oriented copy for small sizes */
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sltiu a3, a2, 128
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bnez a3, 4f
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/* Use word-oriented copy only if low-order bits match */
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andi a3, t6, SZREG-1
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andi a4, a1, SZREG-1
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bne a3, a4, 4f
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beqz a3, 2f /* Skip if already aligned */
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/*
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* Round to nearest double word-aligned address
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* greater than or equal to start address
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*/
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andi a3, a1, ~(SZREG-1)
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addi a3, a3, SZREG
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/* Handle initial misalignment */
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sub a4, a3, a1
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1:
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lb a5, 0(a1)
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addi a1, a1, 1
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sb a5, 0(t6)
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addi t6, t6, 1
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bltu a1, a3, 1b
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sub a2, a2, a4 /* Update count */
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2:
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andi a4, a2, ~((16*SZREG)-1)
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beqz a4, 4f
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add a3, a1, a4
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3:
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REG_L a4, 0(a1)
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REG_L a5, SZREG(a1)
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REG_L a6, 2*SZREG(a1)
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REG_L a7, 3*SZREG(a1)
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REG_L t0, 4*SZREG(a1)
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REG_L t1, 5*SZREG(a1)
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REG_L t2, 6*SZREG(a1)
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REG_L t3, 7*SZREG(a1)
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REG_L t4, 8*SZREG(a1)
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REG_L t5, 9*SZREG(a1)
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REG_S a4, 0(t6)
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REG_S a5, SZREG(t6)
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REG_S a6, 2*SZREG(t6)
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REG_S a7, 3*SZREG(t6)
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REG_S t0, 4*SZREG(t6)
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REG_S t1, 5*SZREG(t6)
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REG_S t2, 6*SZREG(t6)
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REG_S t3, 7*SZREG(t6)
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REG_S t4, 8*SZREG(t6)
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REG_S t5, 9*SZREG(t6)
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REG_L a4, 10*SZREG(a1)
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REG_L a5, 11*SZREG(a1)
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REG_L a6, 12*SZREG(a1)
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REG_L a7, 13*SZREG(a1)
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REG_L t0, 14*SZREG(a1)
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REG_L t1, 15*SZREG(a1)
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addi a1, a1, 16*SZREG
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REG_S a4, 10*SZREG(t6)
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REG_S a5, 11*SZREG(t6)
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REG_S a6, 12*SZREG(t6)
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REG_S a7, 13*SZREG(t6)
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REG_S t0, 14*SZREG(t6)
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REG_S t1, 15*SZREG(t6)
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addi t6, t6, 16*SZREG
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bltu a1, a3, 3b
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andi a2, a2, (16*SZREG)-1 /* Update count */
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4:
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/* Handle trailing misalignment */
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beqz a2, 6f
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add a3, a1, a2
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/* Use word-oriented copy if co-aligned to word boundary */
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or a5, a1, t6
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or a5, a5, a3
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andi a5, a5, 3
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bnez a5, 5f
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7:
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lw a4, 0(a1)
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addi a1, a1, 4
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sw a4, 0(t6)
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addi t6, t6, 4
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bltu a1, a3, 7b
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ret
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5:
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lb a4, 0(a1)
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addi a1, a1, 1
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sb a4, 0(t6)
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addi t6, t6, 1
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bltu a1, a3, 5b
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6:
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||||
ret
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END(__memcpy)
|
64
arch/riscv/lib/memmove.S
Normal file
64
arch/riscv/lib/memmove.S
Normal file
@ -0,0 +1,64 @@
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||||
/* SPDX-License-Identifier: GPL-2.0 */
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||||
#include <linux/linkage.h>
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#include <asm/asm.h>
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|
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ENTRY(__memmove)
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WEAK(memmove)
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move t0, a0
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move t1, a1
|
||||
|
||||
beq a0, a1, exit_memcpy
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beqz a2, exit_memcpy
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||||
srli t2, a2, 0x2
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||||
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||||
slt t3, a0, a1
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beqz t3, do_reverse
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||||
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||||
andi a2, a2, 0x3
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||||
li t4, 1
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||||
beqz t2, byte_copy
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|
||||
word_copy:
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||||
lw t3, 0(a1)
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||||
addi t2, t2, -1
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||||
addi a1, a1, 4
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||||
sw t3, 0(a0)
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addi a0, a0, 4
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bnez t2, word_copy
|
||||
beqz a2, exit_memcpy
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||||
j byte_copy
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||||
|
||||
do_reverse:
|
||||
add a0, a0, a2
|
||||
add a1, a1, a2
|
||||
andi a2, a2, 0x3
|
||||
li t4, -1
|
||||
beqz t2, reverse_byte_copy
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||||
|
||||
reverse_word_copy:
|
||||
addi a1, a1, -4
|
||||
addi t2, t2, -1
|
||||
lw t3, 0(a1)
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||||
addi a0, a0, -4
|
||||
sw t3, 0(a0)
|
||||
bnez t2, reverse_word_copy
|
||||
beqz a2, exit_memcpy
|
||||
|
||||
reverse_byte_copy:
|
||||
addi a0, a0, -1
|
||||
addi a1, a1, -1
|
||||
|
||||
byte_copy:
|
||||
lb t3, 0(a1)
|
||||
addi a2, a2, -1
|
||||
sb t3, 0(a0)
|
||||
add a1, a1, t4
|
||||
add a0, a0, t4
|
||||
bnez a2, byte_copy
|
||||
|
||||
exit_memcpy:
|
||||
move a0, t0
|
||||
move a1, t1
|
||||
ret
|
||||
END(__memmove)
|
113
arch/riscv/lib/memset.S
Normal file
113
arch/riscv/lib/memset.S
Normal file
@ -0,0 +1,113 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (C) 2013 Regents of the University of California
|
||||
*/
|
||||
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/asm.h>
|
||||
|
||||
/* void *memset(void *, int, size_t) */
|
||||
ENTRY(__memset)
|
||||
WEAK(memset)
|
||||
move t0, a0 /* Preserve return value */
|
||||
|
||||
/* Defer to byte-oriented fill for small sizes */
|
||||
sltiu a3, a2, 16
|
||||
bnez a3, 4f
|
||||
|
||||
/*
|
||||
* Round to nearest XLEN-aligned address
|
||||
* greater than or equal to start address
|
||||
*/
|
||||
addi a3, t0, SZREG-1
|
||||
andi a3, a3, ~(SZREG-1)
|
||||
beq a3, t0, 2f /* Skip if already aligned */
|
||||
/* Handle initial misalignment */
|
||||
sub a4, a3, t0
|
||||
1:
|
||||
sb a1, 0(t0)
|
||||
addi t0, t0, 1
|
||||
bltu t0, a3, 1b
|
||||
sub a2, a2, a4 /* Update count */
|
||||
|
||||
2: /* Duff's device with 32 XLEN stores per iteration */
|
||||
/* Broadcast value into all bytes */
|
||||
andi a1, a1, 0xff
|
||||
slli a3, a1, 8
|
||||
or a1, a3, a1
|
||||
slli a3, a1, 16
|
||||
or a1, a3, a1
|
||||
#ifdef CONFIG_64BIT
|
||||
slli a3, a1, 32
|
||||
or a1, a3, a1
|
||||
#endif
|
||||
|
||||
/* Calculate end address */
|
||||
andi a4, a2, ~(SZREG-1)
|
||||
add a3, t0, a4
|
||||
|
||||
andi a4, a4, 31*SZREG /* Calculate remainder */
|
||||
beqz a4, 3f /* Shortcut if no remainder */
|
||||
neg a4, a4
|
||||
addi a4, a4, 32*SZREG /* Calculate initial offset */
|
||||
|
||||
/* Adjust start address with offset */
|
||||
sub t0, t0, a4
|
||||
|
||||
/* Jump into loop body */
|
||||
/* Assumes 32-bit instruction lengths */
|
||||
la a5, 3f
|
||||
#ifdef CONFIG_64BIT
|
||||
srli a4, a4, 1
|
||||
#endif
|
||||
add a5, a5, a4
|
||||
jr a5
|
||||
3:
|
||||
REG_S a1, 0(t0)
|
||||
REG_S a1, SZREG(t0)
|
||||
REG_S a1, 2*SZREG(t0)
|
||||
REG_S a1, 3*SZREG(t0)
|
||||
REG_S a1, 4*SZREG(t0)
|
||||
REG_S a1, 5*SZREG(t0)
|
||||
REG_S a1, 6*SZREG(t0)
|
||||
REG_S a1, 7*SZREG(t0)
|
||||
REG_S a1, 8*SZREG(t0)
|
||||
REG_S a1, 9*SZREG(t0)
|
||||
REG_S a1, 10*SZREG(t0)
|
||||
REG_S a1, 11*SZREG(t0)
|
||||
REG_S a1, 12*SZREG(t0)
|
||||
REG_S a1, 13*SZREG(t0)
|
||||
REG_S a1, 14*SZREG(t0)
|
||||
REG_S a1, 15*SZREG(t0)
|
||||
REG_S a1, 16*SZREG(t0)
|
||||
REG_S a1, 17*SZREG(t0)
|
||||
REG_S a1, 18*SZREG(t0)
|
||||
REG_S a1, 19*SZREG(t0)
|
||||
REG_S a1, 20*SZREG(t0)
|
||||
REG_S a1, 21*SZREG(t0)
|
||||
REG_S a1, 22*SZREG(t0)
|
||||
REG_S a1, 23*SZREG(t0)
|
||||
REG_S a1, 24*SZREG(t0)
|
||||
REG_S a1, 25*SZREG(t0)
|
||||
REG_S a1, 26*SZREG(t0)
|
||||
REG_S a1, 27*SZREG(t0)
|
||||
REG_S a1, 28*SZREG(t0)
|
||||
REG_S a1, 29*SZREG(t0)
|
||||
REG_S a1, 30*SZREG(t0)
|
||||
REG_S a1, 31*SZREG(t0)
|
||||
addi t0, t0, 32*SZREG
|
||||
bltu t0, a3, 3b
|
||||
andi a2, a2, SZREG-1 /* Update count */
|
||||
|
||||
4:
|
||||
/* Handle trailing misalignment */
|
||||
beqz a2, 6f
|
||||
add a3, t0, a2
|
||||
5:
|
||||
sb a1, 0(t0)
|
||||
addi t0, t0, 1
|
||||
bltu t0, a3, 5b
|
||||
6:
|
||||
ret
|
||||
END(__memset)
|
@ -54,12 +54,8 @@ ENTRY(longjmp)
|
||||
LOAD_IDX(sp, 13)
|
||||
|
||||
/* Move the return value in place, but return 1 if passed 0. */
|
||||
beq a1, zero, longjmp_1
|
||||
mv a0, a1
|
||||
ret
|
||||
|
||||
longjmp_1:
|
||||
li a0, 1
|
||||
seqz a0, a1
|
||||
add a0, a0, a1
|
||||
ret
|
||||
ENDPROC(longjmp)
|
||||
.popsection
|
||||
|
@ -1,7 +1,7 @@
|
||||
if TARGET_SIFIVE_FU540
|
||||
if TARGET_SIFIVE_UNLEASHED
|
||||
|
||||
config SYS_BOARD
|
||||
default "fu540"
|
||||
default "unleashed"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "sifive"
|
||||
@ -10,7 +10,7 @@ config SYS_CPU
|
||||
default "fu540"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "sifive-fu540"
|
||||
default "sifive-unleashed"
|
||||
|
||||
config SYS_TEXT_BASE
|
||||
default 0x80200000 if SPL
|
@ -1,10 +1,10 @@
|
||||
SiFive FU540 BOARD
|
||||
SiFive HiFive Unleashed BOARD
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
M: Palmer Dabbelt <palmer@dabbelt.com>
|
||||
M: Anup Patel <anup.patel@wdc.com>
|
||||
M: Atish Patra <atish.patra@wdc.com>
|
||||
S: Maintained
|
||||
F: board/sifive/fu540/
|
||||
F: doc/board/sifive/fu540.rst
|
||||
F: include/configs/sifive-fu540.h
|
||||
F: configs/sifive_fu540_defconfig
|
||||
F: board/sifive/unleashed/
|
||||
F: doc/board/sifive/unleashed.rst
|
||||
F: include/configs/sifive-unleashed.h
|
||||
F: configs/sifive_unleashed_defconfig
|
@ -2,7 +2,7 @@
|
||||
#
|
||||
# Copyright (c) 2019 Western Digital Corporation or its affiliates.
|
||||
|
||||
obj-y += fu540.o
|
||||
obj-y += unleashed.o
|
||||
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
obj-y += spl.o
|
@ -69,4 +69,6 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
imply EFI_PARTITION
|
||||
imply CMD_PART
|
||||
imply CMD_FS_GENERIC
|
||||
imply WDT
|
||||
imply DESIGNWARE_WATCHDOG
|
||||
endif
|
||||
|
@ -330,7 +330,8 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
|
||||
ARCH_MX6 || ARCH_MX7 || \
|
||||
ARCH_ROCKCHIP || ARCH_MVEBU || ARCH_SOCFPGA || \
|
||||
ARCH_AT91 || ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || \
|
||||
OMAP44XX || OMAP54XX || AM33XX || AM43XX || TARGET_SIFIVE_FU540
|
||||
OMAP44XX || OMAP54XX || AM33XX || AM43XX || \
|
||||
TARGET_SIFIVE_UNLEASHED
|
||||
help
|
||||
Use sector number for specifying U-Boot location on MMC/SD in
|
||||
raw mode.
|
||||
@ -347,7 +348,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
|
||||
default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
|
||||
OMAP54XX || AM33XX || AM43XX || ARCH_K3
|
||||
default 0x4000 if ARCH_ROCKCHIP
|
||||
default 0x822 if TARGET_SIFIVE_FU540
|
||||
default 0x822 if TARGET_SIFIVE_UNLEASHED
|
||||
help
|
||||
Address on the MMC to load U-Boot from, when the MMC is being used
|
||||
in raw mode. Units: MMC sectors (1 sector = 512 bytes).
|
||||
|
@ -1,4 +1,5 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ENV_SIZE=0x2000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit"
|
||||
CONFIG_TARGET_MICROCHIP_ICICLE=y
|
||||
|
@ -8,7 +8,7 @@ CONFIG_SPL=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
|
||||
CONFIG_TARGET_SIFIVE_FU540=y
|
||||
CONFIG_TARGET_SIFIVE_UNLEASHED=y
|
||||
CONFIG_ARCH_RV64I=y
|
||||
CONFIG_RISCV_SMODE=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
@ -1,10 +1,21 @@
|
||||
CONFIG_RISCV=y
|
||||
CONFIG_SYS_TEXT_BASE=0x80020000
|
||||
CONFIG_ENV_SIZE=0x1000
|
||||
CONFIG_ENV_OFFSET=0xfff000
|
||||
CONFIG_ENV_SECT_SIZE=0x1000
|
||||
CONFIG_TARGET_SIPEED_MAIX=y
|
||||
CONFIG_ARCH_RV64I=y
|
||||
CONFIG_RISCV_SMODE=y
|
||||
CONFIG_STACK_SIZE=0x100000
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
CONFIG_BOOTCOMMAND="run k210_bootcmd"
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_MTDIDS_DEFAULT="nor0=spi3:0"
|
||||
CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)"
|
||||
# CONFIG_NET is not set
|
||||
# CONFIG_INPUT is not set
|
||||
CONFIG_SF_DEFAULT_BUS=3
|
||||
# CONFIG_DM_ETH is not set
|
||||
CONFIG_FS_EXT4=y
|
||||
CONFIG_FS_FAT=y
|
||||
# CONFIG_EFI_UNICODE_CAPITALIZATION is not set
|
||||
|
@ -6,4 +6,4 @@ SiFive
|
||||
.. toctree::
|
||||
:maxdepth: 2
|
||||
|
||||
fu540
|
||||
unleashed
|
||||
|
@ -120,4 +120,5 @@ U_BOOT_DRIVER(mpfs_clk) = {
|
||||
.ops = &mpfs_clk_ops,
|
||||
.probe = mpfs_clk_probe,
|
||||
.priv_auto = sizeof(struct clk),
|
||||
.flags = DM_FLAG_PRE_RELOC,
|
||||
};
|
||||
|
@ -8,6 +8,6 @@ config RAM_SIFIVE
|
||||
config SIFIVE_FU540_DDR
|
||||
bool "SiFive FU540 DDR driver"
|
||||
depends on RAM_SIFIVE
|
||||
default y if TARGET_SIFIVE_FU540
|
||||
default y if TARGET_SIFIVE_UNLEASHED
|
||||
help
|
||||
This enables DDR support for the platforms based on SiFive FU540 SoC.
|
||||
|
@ -166,7 +166,7 @@ config RESET_IPQ419
|
||||
|
||||
config RESET_SIFIVE
|
||||
bool "Reset Driver for SiFive SoC's"
|
||||
depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540
|
||||
depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_UNLEASHED
|
||||
default y
|
||||
help
|
||||
PRCI module within SiFive SoC's provides mechanism to reset
|
||||
|
@ -54,6 +54,7 @@ static int sifive_clint_probe(struct udevice *dev)
|
||||
|
||||
static const struct udevice_id sifive_clint_ids[] = {
|
||||
{ .compatible = "riscv,clint0" },
|
||||
{ .compatible = "sifive,clint0" },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
@ -9,7 +9,6 @@
|
||||
#include <reset.h>
|
||||
#include <wdt.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/utils.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#define DW_WDT_CR 0x00
|
||||
@ -35,7 +34,7 @@ static int designware_wdt_settimeout(void __iomem *base, unsigned int clk_khz,
|
||||
signed int i;
|
||||
|
||||
/* calculate the timeout range value */
|
||||
i = log_2_n_round_up(timeout * clk_khz) - 16;
|
||||
i = fls(timeout * clk_khz - 1) - 16;
|
||||
i = clamp(i, 0, 15);
|
||||
|
||||
writel(i | (i << 4), base + DW_WDT_TORR);
|
||||
@ -130,27 +129,39 @@ static int designware_wdt_probe(struct udevice *dev)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = clk_enable(&clk);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
priv->clk_khz = clk_get_rate(&clk) / 1000;
|
||||
if (!priv->clk_khz)
|
||||
return -EINVAL;
|
||||
if (!priv->clk_khz) {
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
#else
|
||||
priv->clk_khz = CONFIG_DW_WDT_CLOCK_KHZ;
|
||||
#endif
|
||||
|
||||
#if CONFIG_IS_ENABLED(DM_RESET)
|
||||
struct reset_ctl_bulk resets;
|
||||
if (CONFIG_IS_ENABLED(DM_RESET)) {
|
||||
struct reset_ctl_bulk resets;
|
||||
|
||||
ret = reset_get_bulk(dev, &resets);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = reset_get_bulk(dev, &resets);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = reset_deassert_bulk(&resets);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
ret = reset_deassert_bulk(&resets);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* reset to disable the watchdog */
|
||||
return designware_wdt_stop(dev);
|
||||
|
||||
err:
|
||||
#if CONFIG_IS_ENABLED(CLK)
|
||||
clk_free(&clk);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct wdt_ops designware_wdt_ops = {
|
||||
|
@ -18,9 +18,6 @@
|
||||
/* Don't relocate into AI ram since it isn't set up yet */
|
||||
#define CONFIG_SYS_SDRAM_SIZE (SZ_4M + SZ_2M)
|
||||
|
||||
/* For early init */
|
||||
#define K210_SYSCTL_BASE 0x50440000
|
||||
|
||||
#ifndef CONFIG_EXTRA_ENV_SETTINGS
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"loadaddr=0x80060000\0" \
|
||||
|
@ -7,6 +7,7 @@ obj-$(CONFIG_EFI_LOADER) += efi_device_path.o
|
||||
obj-$(CONFIG_EFI_SECURE_BOOT) += efi_image_region.o
|
||||
obj-y += hexdump.o
|
||||
obj-y += lmb.o
|
||||
obj-y += longjmp.o
|
||||
obj-$(CONFIG_CONSOLE_RECORD) += test_print.o
|
||||
obj-$(CONFIG_SSCANF) += sscanf.o
|
||||
obj-y += string.o
|
||||
|
73
test/lib/longjmp.c
Normal file
73
test/lib/longjmp.c
Normal file
@ -0,0 +1,73 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Test setjmp(), longjmp()
|
||||
*
|
||||
* Copyright (c) 2021, Heinrich Schuchardt <xypron.glpk@gmx.de>
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <test/lib.h>
|
||||
#include <test/test.h>
|
||||
#include <test/ut.h>
|
||||
#include <asm/setjmp.h>
|
||||
|
||||
struct test_jmp_buf {
|
||||
jmp_buf env;
|
||||
int val;
|
||||
};
|
||||
|
||||
/**
|
||||
* test_longjmp() - test longjmp function
|
||||
*
|
||||
* @i is passed to longjmp.
|
||||
* @i << 8 is set in the environment structure.
|
||||
*
|
||||
* @env: environment
|
||||
* @i: value passed to longjmp()
|
||||
*/
|
||||
static noinline void test_longjmp(struct test_jmp_buf *env, int i)
|
||||
{
|
||||
env->val = i << 8;
|
||||
longjmp(env->env, i);
|
||||
}
|
||||
|
||||
/**
|
||||
* test_setjmp() - test setjmp function
|
||||
*
|
||||
* setjmp() will return the value @i passed to longjmp() if @i is non-zero.
|
||||
* For @i == 0 we expect return value 1.
|
||||
*
|
||||
* @i << 8 will be set by test_longjmp in the environment structure.
|
||||
* This value can be used to check that the stack frame is restored.
|
||||
*
|
||||
* We return the XORed values to allow simply check both at once.
|
||||
*
|
||||
* @i: value passed to longjmp()
|
||||
* Return: values return by longjmp()
|
||||
*/
|
||||
static int test_setjmp(int i)
|
||||
{
|
||||
struct test_jmp_buf env;
|
||||
int ret;
|
||||
|
||||
env.val = -1;
|
||||
ret = setjmp(env.env);
|
||||
if (ret)
|
||||
return ret ^ env.val;
|
||||
test_longjmp(&env, i);
|
||||
/* We should not arrive here */
|
||||
return 0x1000;
|
||||
}
|
||||
|
||||
static int lib_test_longjmp(struct unit_test_state *uts)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = -3; i < 0; ++i)
|
||||
ut_asserteq(i ^ (i << 8), test_setjmp(i));
|
||||
ut_asserteq(1, test_setjmp(0));
|
||||
for (i = 1; i < 4; ++i)
|
||||
ut_asserteq(i ^ (i << 8), test_setjmp(i));
|
||||
return 0;
|
||||
}
|
||||
LIB_TEST(lib_test_longjmp, 0);
|
Loading…
Reference in New Issue
Block a user