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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
exynos: video: Drop old unused code
Now that we are using driver model, we can drop the weak functions and LCD init in the board file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Simon Glass
Minkyu Kang
parent
bb5930d5c9
commit
f4f2fce70c
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@ -147,159 +147,6 @@ int board_get_revision(void)
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return 0;
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}
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#ifdef CONFIG_LCD
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static int board_dp_bridge_init(struct udevice *dev)
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{
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const int max_tries = 10;
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int num_tries;
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int ret;
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debug("%s\n", __func__);
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ret = video_bridge_attach(dev);
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if (ret) {
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debug("video bridge init failed: %d\n", ret);
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return ret;
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}
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/*
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* We need to wait for 90ms after bringing up the bridge since there
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* is a phantom "high" on the HPD chip during its bootup. The phantom
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* high comes within 7ms of de-asserting PD and persists for at least
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* 15ms. The real high comes roughly 50ms after PD is de-asserted. The
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* phantom high makes it hard for us to know when the NXP chip is up.
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*/
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mdelay(90);
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for (num_tries = 0; num_tries < max_tries; num_tries++) {
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/* Check HPD. If it's high, or we don't have it, all is well */
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ret = video_bridge_check_attached(dev);
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if (!ret || ret == -ENOENT)
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return 0;
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debug("%s: eDP bridge failed to come up; try %d of %d\n",
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__func__, num_tries, max_tries);
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}
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/* Immediately go into bridge reset if the hp line is not high */
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return -EIO;
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}
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static int board_dp_bridge_setup(const void *blob)
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{
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const int max_tries = 2;
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int num_tries;
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struct udevice *dev;
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int ret;
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/* Configure I2C registers for Parade bridge */
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ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev);
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if (ret) {
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debug("video bridge init failed: %d\n", ret);
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return ret;
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}
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if (strncmp(dev->driver->name, "parade", 6)) {
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/* Mux HPHPD to the special hotplug detect mode */
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exynos_pinmux_config(PERIPH_ID_DPHPD, 0);
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}
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for (num_tries = 0; num_tries < max_tries; num_tries++) {
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ret = board_dp_bridge_init(dev);
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if (!ret)
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return 0;
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if (num_tries == max_tries - 1)
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break;
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/*
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* If we're here, the bridge chip failed to initialise.
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* Power down the bridge in an attempt to reset.
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*/
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video_bridge_set_active(dev, false);
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/*
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* Arbitrarily wait 300ms here with DP_N low. Don't know for
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* sure how long we should wait, but we're being paranoid.
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*/
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mdelay(300);
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}
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return ret;
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}
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void exynos_cfg_lcd_gpio(void)
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{
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/* For Backlight */
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gpio_request(EXYNOS5_GPIO_B20, "lcd_backlight");
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gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_OUTPUT);
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gpio_set_value(EXYNOS5_GPIO_B20, 1);
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}
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static int board_dp_set_backlight(int percent)
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{
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struct udevice *dev;
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int ret;
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ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev);
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if (!ret)
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ret = video_bridge_set_backlight(dev, percent);
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return ret;
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}
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void exynos_backlight_on(unsigned int on)
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{
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struct udevice *dev;
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int ret;
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debug("%s(%u)\n", __func__, on);
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if (!on)
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return;
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ret = regulator_get_by_platname("vcd_led", &dev);
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if (!ret)
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ret = regulator_set_enable(dev, true);
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if (ret)
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debug("Failed to enable backlight: ret=%d\n", ret);
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/* T5 in the LCD timing spec (defined as > 10ms) */
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mdelay(10);
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/* board_dp_backlight_pwm */
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gpio_direction_output(EXYNOS5_GPIO_B20, 1);
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/* T6 in the LCD timing spec (defined as > 10ms) */
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mdelay(10);
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/* try to set the backlight in the bridge registers */
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ret = board_dp_set_backlight(80);
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/* if we have no bridge or it does not support backlight, use a GPIO */
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if (ret == -ENODEV || ret == -ENOSYS) {
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gpio_request(EXYNOS5_GPIO_X30, "board_dp_backlight_en");
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gpio_direction_output(EXYNOS5_GPIO_X30, 1);
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}
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}
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void exynos_lcd_power_on(void)
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{
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struct udevice *dev;
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int ret;
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debug("%s\n", __func__);
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ret = regulator_get_by_platname("lcd_vdd", &dev);
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if (!ret)
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ret = regulator_set_enable(dev, true);
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if (ret)
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debug("Failed to enable LCD panel: ret=%d\n", ret);
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ret = board_dp_bridge_setup(gd->fdt_blob);
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if (ret && ret != -ENODEV)
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printf("LCD bridge failed to enable: %d\n", ret);
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}
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#endif
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#ifdef CONFIG_USB_DWC3
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static struct dwc3_device dwc3_device_data = {
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.maximum_speed = USB_SPEED_SUPER,
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@ -479,39 +479,6 @@ unsigned long exynos_fimd_calc_fbsize(struct exynos_fb_priv *priv)
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return priv->vl_col * priv->vl_row * (VNBITS(priv->vl_bpix) / 8);
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}
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__weak void exynos_cfg_lcd_gpio(void)
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{
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}
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__weak void exynos_backlight_on(unsigned int onoff)
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{
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}
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__weak void exynos_reset_lcd(void)
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{
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}
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__weak void exynos_lcd_power_on(void)
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{
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}
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__weak void exynos_cfg_ldo(void)
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{
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}
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__weak void exynos_enable_ldo(unsigned int onoff)
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{
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}
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__weak void exynos_backlight_reset(void)
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{
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}
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__weak int exynos_lcd_misc_init(struct vidinfo *vid)
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{
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return 0;
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}
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int exynos_fb_ofdata_to_platdata(struct udevice *dev)
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{
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struct exynos_fb_priv *priv = dev_get_priv(dev);
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@ -1,41 +0,0 @@
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/*
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* Copyright (C) 2012 Samsung Electronics
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*
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* Author: InKi Dae <inki.dae@samsung.com>
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* Author: Donghwa Lee <dh09.lee@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _EXYNOS_FB_H_
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#define _EXYNOS_FB_H_
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#include <asm/arch/fb.h>
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#define MAX_CLOCK (86 * 1000000)
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enum exynos_cpu_auto_cmd_rate {
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DISABLE_AUTO_FRM,
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PER_TWO_FRM,
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PER_FOUR_FRM,
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PER_SIX_FRM,
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PER_EIGHT_FRM,
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PER_TEN_FRM,
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PER_TWELVE_FRM,
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PER_FOURTEEN_FRM,
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PER_SIXTEEN_FRM,
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PER_EIGHTEEN_FRM,
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PER_TWENTY_FRM,
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PER_TWENTY_TWO_FRM,
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PER_TWENTY_FOUR_FRM,
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PER_TWENTY_SIX_FRM,
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PER_TWENTY_EIGHT_FRM,
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PER_THIRTY_FRM,
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};
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void exynos_fimd_lcd_init_mem(unsigned long screen_base, unsigned long fb_size,
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unsigned long palette_size);
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void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address);
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unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid);
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#endif
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