mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
blackfin: run core1 from L1 code sram start address in uboot init code on core 0
Define core 1 L1 code sram start address. Add function to enable core 1 for BF609 and BF561. Add config macro to allow customer to run core 1 in uboot init code on core 0. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
This commit is contained in:
parent
ddb5c5be1e
commit
f4d8038439
|
@ -23,6 +23,32 @@
|
||||||
|
|
||||||
ulong bfin_poweron_retx;
|
ulong bfin_poweron_retx;
|
||||||
|
|
||||||
|
#if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START)
|
||||||
|
void bfin_core1_start(void)
|
||||||
|
{
|
||||||
|
#ifdef BF561_FAMILY
|
||||||
|
/* Enable core 1 */
|
||||||
|
bfin_write_SYSCR(bfin_read_SYSCR() & ~0x0020);
|
||||||
|
#else
|
||||||
|
/* Enable core 1 */
|
||||||
|
bfin_write32(RCU0_SVECT1, COREB_L1_CODE_START);
|
||||||
|
bfin_write32(RCU0_CRCTL, 0);
|
||||||
|
|
||||||
|
bfin_write32(RCU0_CRCTL, 0x2);
|
||||||
|
|
||||||
|
/* Check if core 1 starts */
|
||||||
|
while (!(bfin_read32(RCU0_CRSTAT) & 0x2))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
bfin_write32(RCU0_CRCTL, 0);
|
||||||
|
|
||||||
|
/* flag to notify cces core 1 application */
|
||||||
|
bfin_write32(SDU0_MSG_SET, (1 << 19));
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
__attribute__ ((__noreturn__))
|
||||||
void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
|
void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
|
||||||
{
|
{
|
||||||
#ifndef CONFIG_BFIN_BOOTROM_USES_EVT1
|
#ifndef CONFIG_BFIN_BOOTROM_USES_EVT1
|
||||||
|
@ -72,6 +98,10 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
|
||||||
# endif
|
# endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START)
|
||||||
|
bfin_core1_start();
|
||||||
|
#endif
|
||||||
|
|
||||||
serial_early_puts("Board init flash\n");
|
serial_early_puts("Board init flash\n");
|
||||||
board_init_f(bootflag);
|
board_init_f(bootflag);
|
||||||
}
|
}
|
||||||
|
|
|
@ -714,4 +714,6 @@
|
||||||
#define L1_INST_SRAM_SIZE (0xFFA03FFF - 0xFFA00000 + 1)
|
#define L1_INST_SRAM_SIZE (0xFFA03FFF - 0xFFA00000 + 1)
|
||||||
#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
|
#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
|
||||||
|
|
||||||
|
#define COREB_L1_CODE_START 0xFF600000
|
||||||
|
|
||||||
#endif /* __BFIN_DEF_ADSP_BF561_proc__ */
|
#endif /* __BFIN_DEF_ADSP_BF561_proc__ */
|
||||||
|
|
|
@ -244,4 +244,6 @@
|
||||||
#define L1_INST_SRAM_SIZE 0x8000
|
#define L1_INST_SRAM_SIZE 0x8000
|
||||||
#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
|
#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
|
||||||
|
|
||||||
|
#define COREB_L1_CODE_START 0xFF600000
|
||||||
|
|
||||||
#endif /* __BFIN_DEF_ADSP_BF609_proc__ */
|
#endif /* __BFIN_DEF_ADSP_BF609_proc__ */
|
||||||
|
|
|
@ -98,6 +98,11 @@
|
||||||
*/
|
*/
|
||||||
#define CONFIG_UART_CONSOLE 0
|
#define CONFIG_UART_CONSOLE 0
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Run core 1 from L1 SRAM start address when init uboot on core 0
|
||||||
|
*/
|
||||||
|
/* #define CONFIG_CORE1_RUN 1 */
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Pull in common ADI header for remaining command/environment setup
|
* Pull in common ADI header for remaining command/environment setup
|
||||||
|
|
|
@ -155,6 +155,11 @@
|
||||||
#undef CONFIG_UART_CONSOLE_IS_JTAG
|
#undef CONFIG_UART_CONSOLE_IS_JTAG
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Run core 1 from L1 SRAM start address when init uboot on core 0
|
||||||
|
*/
|
||||||
|
/* #define CONFIG_CORE1_RUN 1 */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Pull in common ADI header for remaining command/environment setup
|
* Pull in common ADI header for remaining command/environment setup
|
||||||
*/
|
*/
|
||||||
|
|
Loading…
Reference in New Issue
Block a user