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https://github.com/brain-hackers/u-boot-brain
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net: eepro100: Fix camelcase
This is automated cleanup via checkpatch, no functional change. ./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c ./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This commit is contained in:
Marek Vasut
parent
b013173079
commit
f3878f5c28
@ -14,18 +14,18 @@
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#include <linux/delay.h>
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/* Ethernet chip registers. */
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#define SCBStatus 0 /* Rx/Command Unit Status *Word* */
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#define SCBIntAckByte 1 /* Rx/Command Unit STAT/ACK byte */
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#define SCBCmd 2 /* Rx/Command Unit Command *Word* */
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#define SCBIntrCtlByte 3 /* Rx/Command Unit Intr.Control Byte */
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#define SCBPointer 4 /* General purpose pointer. */
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#define SCBPort 8 /* Misc. commands and operands. */
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#define SCBflash 12 /* Flash memory control. */
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#define SCBeeprom 14 /* EEPROM memory control. */
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#define SCBCtrlMDI 16 /* MDI interface control. */
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#define SCBEarlyRx 20 /* Early receive byte count. */
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#define SCBGenControl 28 /* 82559 General Control Register */
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#define SCBGenStatus 29 /* 82559 General Status register */
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#define SCB_STATUS 0 /* Rx/Command Unit Status *Word* */
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#define SCB_INT_ACK_BYTE 1 /* Rx/Command Unit STAT/ACK byte */
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#define SCB_CMD 2 /* Rx/Command Unit Command *Word* */
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#define SCB_INTR_CTL_BYTE 3 /* Rx/Command Unit Intr.Control Byte */
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#define SCB_POINTER 4 /* General purpose pointer. */
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#define SCB_PORT 8 /* Misc. commands and operands. */
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#define SCB_FLASH 12 /* Flash memory control. */
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#define SCB_EEPROM 14 /* EEPROM memory control. */
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#define SCB_CTRL_MDI 16 /* MDI interface control. */
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#define SCB_EARLY_RX 20 /* Early receive byte count. */
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#define SCB_GEN_CONTROL 28 /* 82559 General Control Register */
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#define SCB_GEN_STATUS 29 /* 82559 General Status register */
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/* 82559 SCB status word defnitions */
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#define SCB_STATUS_CX 0x8000 /* CU finished command (transmit) */
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@ -101,10 +101,10 @@
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#define EE_ERASE_CMD (7 << addr_len)
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/* Receive frame descriptors. */
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struct RxFD {
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struct eepro100_rxfd {
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volatile u16 status;
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volatile u16 control;
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volatile u32 link; /* struct RxFD * */
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volatile u32 link; /* struct eepro100_rxfd * */
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volatile u32 rx_buf_addr; /* void * */
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volatile u32 count;
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@ -135,7 +135,7 @@ struct RxFD {
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#define RFD_RX_TCO 0x0001 /* TCO indication */
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/* Transmit frame descriptors */
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struct TxFD { /* Transmit frame descriptor set. */
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struct eepro100_txfd { /* Transmit frame descriptor set. */
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volatile u16 status;
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volatile u16 command;
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volatile u32 link; /* void * */
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@ -148,15 +148,15 @@ struct TxFD { /* Transmit frame descriptor set. */
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volatile s32 tx_buf_size1; /* Length of Tx frame. */
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};
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#define TxCB_CMD_TRANSMIT 0x0004 /* transmit command */
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#define TxCB_CMD_SF 0x0008 /* 0=simplified, 1=flexible mode */
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#define TxCB_CMD_NC 0x0010 /* 0=CRC insert by controller */
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#define TxCB_CMD_I 0x2000 /* generate interrupt on completion */
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#define TxCB_CMD_S 0x4000 /* suspend on completion */
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#define TxCB_CMD_EL 0x8000 /* last command block in CBL */
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#define TXCB_CMD_TRANSMIT 0x0004 /* transmit command */
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#define TXCB_CMD_SF 0x0008 /* 0=simplified, 1=flexible mode */
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#define TXCB_CMD_NC 0x0010 /* 0=CRC insert by controller */
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#define TXCB_CMD_I 0x2000 /* generate interrupt on completion */
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#define TXCB_CMD_S 0x4000 /* suspend on completion */
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#define TXCB_CMD_EL 0x8000 /* last command block in CBL */
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#define TxCB_COUNT_MASK 0x3fff
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#define TxCB_COUNT_EOF 0x8000
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#define TXCB_COUNT_MASK 0x3fff
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#define TXCB_COUNT_EOF 0x8000
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/* The Speedo3 Rx and Tx frame/buffer descriptors. */
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struct descriptor { /* A generic descriptor. */
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@ -182,8 +182,8 @@ struct descriptor { /* A generic descriptor. */
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#define TOUT_LOOP 1000000
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static struct RxFD rx_ring[NUM_RX_DESC]; /* RX descriptor ring */
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static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */
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static struct eepro100_rxfd rx_ring[NUM_RX_DESC]; /* RX descriptor ring */
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static struct eepro100_txfd tx_ring[NUM_TX_DESC]; /* TX descriptor ring */
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static int rx_next; /* RX descriptor ring pointer */
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static int tx_next; /* TX descriptor ring pointer */
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static int tx_threshold;
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@ -247,11 +247,11 @@ static int get_phyreg(struct eth_device *dev, unsigned char addr,
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/* read requested data */
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cmd = (2 << 26) | ((addr & 0x1f) << 21) | ((reg & 0x1f) << 16);
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OUTL(dev, cmd, SCBCtrlMDI);
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OUTL(dev, cmd, SCB_CTRL_MDI);
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do {
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udelay(1000);
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cmd = INL(dev, SCBCtrlMDI);
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cmd = INL(dev, SCB_CTRL_MDI);
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} while (!(cmd & (1 << 28)) && (--timeout));
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if (timeout == 0)
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@ -270,9 +270,9 @@ static int set_phyreg(struct eth_device *dev, unsigned char addr,
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/* write requested data */
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cmd = (1 << 26) | ((addr & 0x1f) << 21) | ((reg & 0x1f) << 16);
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OUTL(dev, cmd | value, SCBCtrlMDI);
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OUTL(dev, cmd | value, SCB_CTRL_MDI);
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while (!(INL(dev, SCBCtrlMDI) & (1 << 28)) && (--timeout))
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while (!(INL(dev, SCB_CTRL_MDI) & (1 << 28)) && (--timeout))
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udelay(1000);
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if (timeout == 0)
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@ -357,7 +357,7 @@ static int wait_for_eepro100(struct eth_device *dev)
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{
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int i;
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for (i = 0; INW(dev, SCBCmd) & (CU_CMD_MASK | RU_CMD_MASK); i++) {
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for (i = 0; INW(dev, SCB_CMD) & (CU_CMD_MASK | RU_CMD_MASK); i++) {
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if (i >= TOUT_LOOP)
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return 0;
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}
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@ -460,25 +460,25 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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struct descriptor *ias_cmd, *cfg_cmd;
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/* Reset the ethernet controller */
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OUTL(dev, I82559_SELECTIVE_RESET, SCBPort);
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OUTL(dev, I82559_SELECTIVE_RESET, SCB_PORT);
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udelay(20);
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OUTL(dev, I82559_RESET, SCBPort);
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OUTL(dev, I82559_RESET, SCB_PORT);
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udelay(20);
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if (!wait_for_eepro100(dev)) {
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printf("Error: Can not reset ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, 0, SCBPointer);
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OUTW(dev, SCB_M | RUC_ADDR_LOAD, SCBCmd);
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OUTL(dev, 0, SCB_POINTER);
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OUTW(dev, SCB_M | RUC_ADDR_LOAD, SCB_CMD);
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if (!wait_for_eepro100(dev)) {
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printf("Error: Can not reset ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, 0, SCBPointer);
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OUTW(dev, SCB_M | CU_ADDR_LOAD, SCBCmd);
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OUTL(dev, 0, SCB_POINTER);
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OUTW(dev, SCB_M | CU_ADDR_LOAD, SCB_CMD);
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/* Initialize Rx and Tx rings. */
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init_rx_ring(dev);
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@ -487,11 +487,11 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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/* Tell the adapter where the RX ring is located. */
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if (!wait_for_eepro100(dev)) {
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printf("Error: Can not reset ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, phys_to_bus((u32)&rx_ring[rx_next]), SCBPointer);
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OUTW(dev, SCB_M | RUC_START, SCBCmd);
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OUTL(dev, phys_to_bus((u32)&rx_ring[rx_next]), SCB_POINTER);
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OUTW(dev, SCB_M | RUC_START, SCB_CMD);
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/* Send the Configure frame */
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tx_cur = tx_next;
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@ -508,25 +508,25 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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if (!wait_for_eepro100(dev)) {
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printf("Error---CONFIG_SYS_CMD_CONFIGURE: Can not reset ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCBPointer);
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OUTW(dev, SCB_M | CU_START, SCBCmd);
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OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCB_POINTER);
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OUTW(dev, SCB_M | CU_START, SCB_CMD);
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for (i = 0;
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!(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C);
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i++) {
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if (i >= TOUT_LOOP) {
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printf("%s: Tx error buffer not ready\n", dev->name);
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goto Done;
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goto done;
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}
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}
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if (!(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_OK)) {
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printf("TX error status = 0x%08X\n",
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le16_to_cpu(tx_ring[tx_cur].status));
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goto Done;
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goto done;
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}
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/* Send the Individual Address Setup frame */
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@ -544,11 +544,11 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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/* Tell the adapter where the TX ring is located. */
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if (!wait_for_eepro100(dev)) {
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printf("Error: Can not reset ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCBPointer);
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OUTW(dev, SCB_M | CU_START, SCBCmd);
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OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCB_POINTER);
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OUTW(dev, SCB_M | CU_START, SCB_CMD);
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for (i = 0;
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!(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C);
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@ -556,19 +556,19 @@ static int eepro100_init(struct eth_device *dev, bd_t *bis)
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if (i >= TOUT_LOOP) {
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printf("%s: Tx error buffer not ready\n",
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dev->name);
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goto Done;
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goto done;
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}
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}
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if (!(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_OK)) {
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printf("TX error status = 0x%08X\n",
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le16_to_cpu(tx_ring[tx_cur].status));
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goto Done;
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goto done;
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}
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status = 0;
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Done:
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done:
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return status;
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}
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@ -579,16 +579,14 @@ static int eepro100_send(struct eth_device *dev, void *packet, int length)
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if (length <= 0) {
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printf("%s: bad packet size: %d\n", dev->name, length);
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goto Done;
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goto done;
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}
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tx_cur = tx_next;
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tx_next = (tx_next + 1) % NUM_TX_DESC;
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tx_ring[tx_cur].command = cpu_to_le16 (TxCB_CMD_TRANSMIT |
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TxCB_CMD_SF |
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TxCB_CMD_S |
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TxCB_CMD_EL);
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tx_ring[tx_cur].command = cpu_to_le16(TXCB_CMD_TRANSMIT | TXCB_CMD_SF |
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TXCB_CMD_S | TXCB_CMD_EL);
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tx_ring[tx_cur].status = 0;
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tx_ring[tx_cur].count = cpu_to_le32 (tx_threshold);
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tx_ring[tx_cur].link =
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@ -602,31 +600,31 @@ static int eepro100_send(struct eth_device *dev, void *packet, int length)
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if (!wait_for_eepro100(dev)) {
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printf("%s: Tx error ethernet controller not ready.\n",
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dev->name);
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goto Done;
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goto done;
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}
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/* Send the packet. */
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OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCBPointer);
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OUTW(dev, SCB_M | CU_START, SCBCmd);
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OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCB_POINTER);
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OUTW(dev, SCB_M | CU_START, SCB_CMD);
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for (i = 0;
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!(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C);
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i++) {
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if (i >= TOUT_LOOP) {
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printf("%s: Tx error buffer not ready\n", dev->name);
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goto Done;
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goto done;
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}
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}
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if (!(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_OK)) {
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printf("TX error status = 0x%08X\n",
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le16_to_cpu(tx_ring[tx_cur].status));
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goto Done;
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goto done;
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}
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status = length;
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Done:
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done:
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return status;
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}
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@ -635,8 +633,8 @@ static int eepro100_recv(struct eth_device *dev)
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u16 status, stat;
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int rx_prev, length = 0;
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stat = INW(dev, SCBStatus);
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OUTW(dev, stat & SCB_STATUS_RNR, SCBStatus);
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stat = INW(dev, SCB_STATUS);
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OUTW(dev, stat & SCB_STATUS_RNR, SCB_STATUS);
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for (;;) {
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status = le16_to_cpu(rx_ring[rx_next].status);
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@ -676,41 +674,41 @@ static int eepro100_recv(struct eth_device *dev)
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if (!wait_for_eepro100(dev)) {
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printf("Error: Can not restart ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, phys_to_bus((u32)&rx_ring[rx_next]), SCBPointer);
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OUTW(dev, SCB_M | RUC_START, SCBCmd);
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OUTL(dev, phys_to_bus((u32)&rx_ring[rx_next]), SCB_POINTER);
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OUTW(dev, SCB_M | RUC_START, SCB_CMD);
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}
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Done:
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done:
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return length;
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}
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static void eepro100_halt(struct eth_device *dev)
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{
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/* Reset the ethernet controller */
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OUTL(dev, I82559_SELECTIVE_RESET, SCBPort);
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OUTL(dev, I82559_SELECTIVE_RESET, SCB_PORT);
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udelay(20);
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OUTL(dev, I82559_RESET, SCBPort);
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OUTL(dev, I82559_RESET, SCB_PORT);
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udelay(20);
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if (!wait_for_eepro100(dev)) {
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printf("Error: Can not reset ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, 0, SCBPointer);
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OUTW(dev, SCB_M | RUC_ADDR_LOAD, SCBCmd);
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OUTL(dev, 0, SCB_POINTER);
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OUTW(dev, SCB_M | RUC_ADDR_LOAD, SCB_CMD);
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if (!wait_for_eepro100(dev)) {
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printf("Error: Can not reset ethernet controller.\n");
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goto Done;
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goto done;
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}
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OUTL(dev, 0, SCBPointer);
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OUTW(dev, SCB_M | CU_ADDR_LOAD, SCBCmd);
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OUTL(dev, 0, SCB_POINTER);
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OUTW(dev, SCB_M | CU_ADDR_LOAD, SCB_CMD);
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Done:
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done:
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return;
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}
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@ -721,31 +719,31 @@ static int read_eeprom(struct eth_device *dev, int location, int addr_len)
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int read_cmd = location | EE_READ_CMD;
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int i;
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OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
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OUTW(dev, EE_ENB, SCBeeprom);
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OUTW(dev, EE_ENB & ~EE_CS, SCB_EEPROM);
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OUTW(dev, EE_ENB, SCB_EEPROM);
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/* Shift the read command bits out. */
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for (i = 12; i >= 0; i--) {
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short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
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OUTW(dev, EE_ENB | dataval, SCBeeprom);
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OUTW(dev, EE_ENB | dataval, SCB_EEPROM);
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udelay(1);
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OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
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OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCB_EEPROM);
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udelay(1);
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}
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OUTW(dev, EE_ENB, SCBeeprom);
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OUTW(dev, EE_ENB, SCB_EEPROM);
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for (i = 15; i >= 0; i--) {
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OUTW(dev, EE_ENB | EE_SHIFT_CLK, SCBeeprom);
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OUTW(dev, EE_ENB | EE_SHIFT_CLK, SCB_EEPROM);
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udelay(1);
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retval = (retval << 1) |
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((INW(dev, SCBeeprom) & EE_DATA_READ) ? 1 : 0);
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OUTW(dev, EE_ENB, SCBeeprom);
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((INW(dev, SCB_EEPROM) & EE_DATA_READ) ? 1 : 0);
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OUTW(dev, EE_ENB, SCB_EEPROM);
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udelay(1);
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}
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/* Terminate the EEPROM access. */
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OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
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OUTW(dev, EE_ENB & ~EE_CS, SCB_EEPROM);
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return retval;
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}
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