From 3666afffe7baf859c6ae0ce2bebbc8ab7e512ddc Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 17 Jun 2007 19:03:21 +0200 Subject: [PATCH 01/73] [FIX] fix microblaze file permitission --- board/xilinx/ml401/xparameters.h | 0 cpu/microblaze/cache.c | 0 cpu/microblaze/interrupts.c | 0 cpu/microblaze/irq.S | 0 include/asm-microblaze/asm.h | 0 5 files changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 board/xilinx/ml401/xparameters.h mode change 100755 => 100644 cpu/microblaze/cache.c mode change 100755 => 100644 cpu/microblaze/interrupts.c mode change 100755 => 100644 cpu/microblaze/irq.S mode change 100755 => 100644 include/asm-microblaze/asm.h diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h old mode 100755 new mode 100644 diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c old mode 100755 new mode 100644 diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c old mode 100755 new mode 100644 diff --git a/cpu/microblaze/irq.S b/cpu/microblaze/irq.S old mode 100755 new mode 100644 diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h old mode 100755 new mode 100644 From 093172f08d6afb3f34d8a2f26ee0ee874261cf27 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 17 Jun 2007 19:04:11 +0200 Subject: [PATCH 02/73] [fix] email reparation --- cpu/microblaze/cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c index 4f36a84ec4..2f86a5440c 100644 --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. From 55e26ad62107d2f14f757de3ae0b14b9aa7aed94 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 13 Jul 2007 21:41:44 +0200 Subject: [PATCH 03/73] [FIX] correct help for rspr --- common/cmd_mfsl.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index ffa2666935..337dfbb24e 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -357,7 +357,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); val = (unsigned int)simple_strtoul (argv[2], NULL, 16); - if (argc < 1) { + if (argc < 2) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } @@ -382,6 +382,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("ESR"); break; default: + puts ("Unsupported register\n"); return 1; } printf (": 0x%08lx\n", val); @@ -408,10 +409,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 3 - blocking control write\n"); U_BOOT_CMD (rspr, 3, 1, do_rspr, - "rmsr - read/write special purpose register\n", + "rspr - read/write special purpose register\n", "- reg_num [write value] read/write special purpose register\n" - " 0 - MSR - Machine status register\n" - " 1 - EAR - Exception address register\n" - " 2 - ESR - Exception status register\n"); + " 1 - MSR - Machine status register\n" + " 3 - EAR - Exception address register\n" + " 5 - ESR - Exception status register\n"); #endif /* CONFIG_MICROBLAZE & CFG_CMD_MFSL */ From a476ca2ac2217ddd05a2bf0c514075814b10a3c0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 13 Jul 2007 21:43:55 +0200 Subject: [PATCH 04/73] [PATCH] Remove problem with disabled BARREL SHIFTER --- cpu/microblaze/start.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 3c027ff9bb..8740284ad8 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -33,15 +33,13 @@ _start: addi r1, r0, CFG_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ - addi r6, r0, 0xb000 /* hex b000 opcode imm */ - bslli r6, r6, 16 /* shift */ + addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ swi r6, r0, 0x0 /* reset address */ swi r6, r0, 0x8 /* user vector exception */ swi r6, r0, 0x10 /* interrupt */ swi r6, r0, 0x20 /* hardware exception */ - addi r6, r0, 0xb808 /* hew b808 opcode brai*/ - bslli r6, r6, 16 + addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/ swi r6, r0, 0x4 /* reset address */ swi r6, r0, 0xC /* user vector exception */ swi r6, r0, 0x14 /* interrupt */ From 5a2f1098d81ad58b309e5e558d0492643166a799 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sat, 14 Jul 2007 00:18:48 +0200 Subject: [PATCH 05/73] [PATCH] Support time without timer --- cpu/microblaze/timer.c | 7 +++++++ lib_microblaze/time.c | 8 ++++++++ 2 files changed, 15 insertions(+) diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c index ab1cb12749..b350453443 100644 --- a/cpu/microblaze/timer.c +++ b/cpu/microblaze/timer.c @@ -33,10 +33,17 @@ void reset_timer (void) timestamp = 0; } +#ifdef CFG_TIMER_0 ulong get_timer (ulong base) { return (timestamp - base); } +#else +ulong get_timer (ulong base) +{ + return (timestamp++ - base); +} +#endif void set_timer (ulong t) { diff --git a/lib_microblaze/time.c b/lib_microblaze/time.c index 3fa1b11262..0fef834992 100644 --- a/lib_microblaze/time.c +++ b/lib_microblaze/time.c @@ -26,9 +26,17 @@ #include +#ifdef CFG_TIMER_0 void udelay (unsigned long usec) { int i; i = get_timer (0); while ((get_timer (0) - i) < (usec / 1000)) ; } +#else +void udelay (unsigned long usec) +{ + unsigned int i; + for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++); +} +#endif From 91bb4ca665d2e0cf7f60c4b5b370990250ec0c43 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sat, 14 Jul 2007 12:41:23 +0200 Subject: [PATCH 06/73] [FS] Added support for ROMFS --- Makefile | 6 +- common/cmd_jffs2.c | 52 ++++++--- fs/Makefile | 2 +- fs/romfs/Makefile | 49 ++++++++ fs/romfs/romfs.c | 270 +++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 358 insertions(+), 21 deletions(-) create mode 100644 fs/romfs/Makefile create mode 100644 fs/romfs/romfs.c diff --git a/Makefile b/Makefile index bfa38460da..2d2a68535b 100644 --- a/Makefile +++ b/Makefile @@ -199,7 +199,7 @@ LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ - fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a + fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/romfs/libromfs.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += rtc/librtc.a @@ -316,14 +316,14 @@ depend dep: tags ctags: ctags -w -o $(OBJTREE)/ctags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 \ + fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` etags: etags -a -o $(OBJTREE)/etags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 \ + fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 7fd1fa33da..147ab10966 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -28,7 +28,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -85,7 +85,7 @@ */ /* - * JFFS2/CRAMFS support + * JFFS2/CRAMFS/ROMFS support */ #include #include @@ -110,7 +110,7 @@ #define DEBUG_JFFS #undef DEBUG_JFFS -#ifdef DEBUG_JFFS +#ifdef DEBUG_JFFS # define DEBUGF(fmt, args...) printf(fmt ,##args) #else # define DEBUGF(fmt, args...) @@ -175,6 +175,11 @@ extern int cramfs_load (char *loadoffset, struct part_info *info, char *filename extern int cramfs_ls (struct part_info *info, char *filename); extern int cramfs_info (struct part_info *info); +extern int romfs_check (struct part_info *info); +extern int romfs_load (char *loadoffset, struct part_info *info, char *filename); +extern int romfs_ls (struct part_info *info, char *filename); +extern int romfs_info (struct part_info *info); + static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num); /* command line only routines */ @@ -184,10 +189,10 @@ static struct mtdids* id_find_by_mtd_id(const char *mtd_id, unsigned int mtd_id_ static int device_del(struct mtd_device *dev); /** - * Parses a string into a number. The number stored at ptr is + * Parses a string into a number. The number stored at ptr is * potentially suffixed with K (for kilobytes, or 1024 bytes), * M (for megabytes, or 1048576 bytes), or G (for gigabytes, or - * 1073741824). If the number is suffixed with K, M, or G, then + * 1073741824). If the number is suffixed with K, M, or G, then * the return value is the number multiplied by one kilobyte, one * megabyte, or one gigabyte, respectively. * @@ -676,7 +681,7 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i return 1; } - /* allocate memory */ + /* allocate memory */ part = (struct part_info *)malloc(sizeof(struct part_info) + name_len); if (!part) { printf("out of memory\n"); @@ -1832,9 +1837,9 @@ static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int pa return NULL; } -/***************************************************/ -/* U-boot commands */ -/***************************************************/ +/*************************************************/ +/* U-boot commands */ +/*************************************************/ /** * Routine implementing fsload u-boot command. This routine tries to load @@ -1874,14 +1879,22 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ - /* check partition type for cramfs */ - fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); + /* check partition type for JFFS2, cramfs, romfs */ + if (cramfs_check(part)) { + fsname = "CRAMFS"; + } else if (romfs_check(part)) { + fsname = "ROMFS"; + } else { + fsname = "JFFS2"; + } printf("### %s loading '%s' to 0x%lx\n", fsname, filename, offset); if (cramfs_check(part)) { size = cramfs_load ((char *) offset, part, filename); + } else if (romfs_check(part)){ + size = romfs_load ((char *) offset, part, filename); } else { - /* if this is not cramfs assume jffs2 */ + /* if this is not cramfs or romfs assume jffs2 */ size = jffs2_1pass_load((char *)offset, part, filename); } @@ -1928,8 +1941,10 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* check partition type for cramfs */ if (cramfs_check(part)) { ret = cramfs_ls (part, filename); + } else if (romfs_check(part)) { + ret = romfs_ls (part, filename); } else { - /* if this is not cramfs assume jffs2 */ + /* if this is not cramfs or romfs assume jffs2 */ ret = jffs2_1pass_ls(part, filename); } @@ -1951,7 +1966,6 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { struct part_info *part; - char *fsname; int ret; /* make sure we are in sync with env variables */ @@ -1961,13 +1975,17 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ /* check partition type for cramfs */ - fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); - printf("### filesystem type is %s\n", fsname); + puts("### filesystem type is "); if (cramfs_check(part)) { + puts("CRAMFS\n"); ret = cramfs_info (part); + } else if (romfs_check(part)) { + puts("ROMFS\n"); + ret = romfs_info (part); } else { - /* if this is not cramfs assume jffs2 */ + /* if this is not cramfs or romfs assume jffs2 */ + puts("JFFS2\n"); ret = jffs2_1pass_info(part); } diff --git a/fs/Makefile b/fs/Makefile index 273d90e011..118ae78f2d 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,7 @@ # # -SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 +SUBDIRS := romfs jffs2 cramfs fdos fat reiserfs ext2 $(obj).depend all: @for dir in $(SUBDIRS) ; do \ diff --git a/fs/romfs/Makefile b/fs/romfs/Makefile new file mode 100644 index 0000000000..937d755940 --- /dev/null +++ b/fs/romfs/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)libromfs.a + +AOBJS = +COBJS = romfs.o + +SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS)) + +#CPPFLAGS += + +all: $(LIB) $(AOBJS) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/fs/romfs/romfs.c b/fs/romfs/romfs.c new file mode 100644 index 0000000000..b7d96964b5 --- /dev/null +++ b/fs/romfs/romfs.c @@ -0,0 +1,270 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) + +#include +#include +#include +#include + +#undef DEBUG_ROMFS + +/* ROMFS superblock */ +struct romfs_super { + u32 word0; + u32 word1; + u32 size; + u32 checksum; + char name[0]; +}; + +struct romfs_inode { + u32 next; + u32 spec; + u32 size; + u32 checksum; + char name[0]; +}; + +extern flash_info_t flash_info[]; +#define PART_OFFSET(x) (x->offset + flash_info[x->dev->id->num].start[0]) +#define ALIGN(x) (((x) & 0xfffffff0)) +#define HEADERSIZE(name) (0x20 + ALIGN(strlen(name))) + +static unsigned long romfs_resolve (unsigned long begin, unsigned long offset, + unsigned long size, int raw, char *filename) +{ + unsigned long inodeoffset = 0, nextoffset; + struct romfs_inode *inode; +#ifdef DEBUG_ROMFS + printf ("ROMFS_resolve: begin 0x%x, offset 0x%x, size 0x%x, raw 0x%x, \ + filename %s\n", begin, offset, size, raw, filename); +#endif + + while (inodeoffset < size) { + inode = (struct romfs_inode *)(begin + offset + inodeoffset); + offset = 0; + nextoffset = ALIGN (inode->next); +#ifdef DEBUG_ROMFS + printf("inode 0x%x, name %s - len 0x%x, next inode 0x%x, \ + compare names 0x%x\n", + inode, inode->name, strlen (inode->name), nextoffset, + strncmp (filename, inode->name, strlen (filename))); +#endif + if (!strncmp (filename, inode->name, strlen (inode->name))) { + char *p = strtok (NULL, "/"); + if (raw && (p == NULL || *p == '\0')) { + return offset + inodeoffset; + } + return romfs_resolve (begin, + inodeoffset + HEADERSIZE (inode->name), + size, raw, p); + } + inodeoffset = nextoffset; + } + + printf ("can't find corresponding entry\n"); + return 0; +} + +int romfs_load (char *loadoffset, struct part_info *info, char *filename) +{ + struct romfs_inode *inode; + struct romfs_super *sb; + char *data; + int pocet; + sb = (struct romfs_super *) PART_OFFSET (info); + + unsigned long offset; + + offset = romfs_resolve (PART_OFFSET (info), HEADERSIZE (sb->name), + sb->size, 1, strtok (filename, "/")); + if (offset <= 0) + return offset; + + inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); + data = (char *)((int)inode + HEADERSIZE (inode->name)); + pocet = inode->size; + while (pocet--) { + *loadoffset++ = *data++; + } + return inode->size; +} + +static int romfs_list_inode (struct part_info *info, unsigned long offset) +{ + struct romfs_inode *inode = + (struct romfs_inode *)(PART_OFFSET (info) + offset); + struct romfs_inode *hardlink = NULL; + char str[3], *data; + +/* mapping spec.info means + * 0 hard link link destination [file header] + * 1 directory first file's header + * 2 regular file unused, must be zero [MBZ] + * 3 symbolic link unused, MBZ (file data is the link content) + * 4 block device 16/16 bits major/minor number + * 5 char device - " - + * 6 socket unused, MBZ + * 7 fifo unused, MBZ + */ + switch (inode->next & 0x7) { + case 0: + str[0] = 'h'; + break; + case 1: + str[0] = 'd'; + break; + case 2: + str[0] = 'f'; + break; + case 3: + str[0] = 'l'; + break; + case 4: + str[0] = 'b'; + break; + case 5: + str[0] = 'c'; + break; + case 6: + str[0] = 's'; + break; + case 7: + str[0] = 'p'; + break; + default: + str[0] = '?'; + } + + if (inode->next & 0x8) { + str[1] = 'x'; + } else { + str[1] = '-'; + } + str[2] = '\0'; + + if ((str[0] == 'b') || (str[0] == 'c')) { +#ifdef DEBUG_ROMFS + printf (" %s %3d,%3d %12s 0x%08x 0x%08x", str, + (inode->spec & 0xffff0000) >> 16, + inode->spec & 0x0000ffff, inode->name, inode, + inode->spec); +#else + printf (" %s %3d,%3d %12s", str, + (inode->spec & 0xffff0000) >> 16, + inode->spec & 0x0000ffff); +#endif + } else { +#ifdef DEBUG_ROMFS + printf (" %s %7d %12s 0x%08x 0x%08x", str, inode->size, + inode->name, inode, inode->spec); +#else + printf (" %s %7d %12s", str, inode->size, inode->name); +#endif + if (str[0] == 'l') { + data = (char *)((int)inode + HEADERSIZE (inode->name)); + puts (" -> "); + puts (data); + } + if (str[0] == 'h') { + hardlink = (struct romfs_inode *)(PART_OFFSET (info) + + inode->spec); + puts (" -> "); + puts (hardlink->name); + } + } + puts ("\n"); + return ALIGN (inode->next); +} + +int romfs_ls (struct part_info *info, char *filename) +{ + struct romfs_inode *inode; + unsigned long inodeoffset = 0, nextoffset; + unsigned long offset, size; + struct romfs_super *sb; + sb = (struct romfs_super *)PART_OFFSET (info); + + if (strlen (filename) == 0 || !strcmp (filename, "/")) { + offset = HEADERSIZE (sb->name); + size = sb->size; + } else { + offset = romfs_resolve (PART_OFFSET (info), + HEADERSIZE (sb->name), sb->size, 1, + strtok (filename, "/")); + + if (offset == 0) { + return offset; + } + inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); + if ((inode->next & 0x7) != 1) { + return (romfs_list_inode (info, offset) > 0); + } + + size = sb->size; + offset = offset + HEADERSIZE (inode->name); + } + + inodeoffset = offset + inodeoffset; + while (inodeoffset < size) { + nextoffset = romfs_list_inode (info, inodeoffset); + if (nextoffset == 0) + break; + inodeoffset = nextoffset; + } + return 1; +} + +int romfs_info (struct part_info *info) +{ + struct romfs_super *sb; + sb = (struct romfs_super *)PART_OFFSET (info); + + printf ("name: \t\t%s, len %d B\n", sb->name, strlen (sb->name)); + printf ("size of SB:\t%d B\n", HEADERSIZE (sb->name)); + printf ("full size:\t%d B\n", sb->size); + printf ("checksum:\t0x%x\n", sb->checksum); + return 0; +} + +int romfs_check (struct part_info *info) +{ + struct romfs_super *sb; + if (info->dev->id->type != MTD_DEV_TYPE_NOR) + return 0; + + sb = (struct romfs_super *)PART_OFFSET (info); + if ((sb->word0 != 0x2D726F6D) || (sb->word1 != 0x3166732D)) { + return 0; + } + return 1; +} + +#endif From 5280f352c8da33b1d7fbf448768717d9e16ff9a1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sat, 14 Jul 2007 13:11:28 +0200 Subject: [PATCH 07/73] [FIX] support for simply measuring time --- include/configs/suzaku.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 8224555896..ca5c7519c6 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -97,4 +97,6 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define XILINX_CLOCK_FREQ 50000000 + #endif /* __CONFIG_H */ From 0c0a9cda1bde37106520476ed486bd67eb8d30ae Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 16 Jul 2007 00:31:07 +0200 Subject: [PATCH 08/73] [PATCH] Support for Xilinx EmacLite controller --- Makefile | 3 +- drivers/net/Makefile | 45 ++++ drivers/net/xilinx_emaclite.c | 378 ++++++++++++++++++++++++++++++++++ 3 files changed, 425 insertions(+), 1 deletion(-) create mode 100644 drivers/net/Makefile create mode 100644 drivers/net/xilinx_emaclite.c diff --git a/Makefile b/Makefile index 2d2a68535b..146f647d2c 100644 --- a/Makefile +++ b/Makefile @@ -143,7 +143,7 @@ ifeq ($(ARCH),m68k) CROSS_COMPILE = m68k-elf- endif ifeq ($(ARCH),microblaze) -CROSS_COMPILE = mb- +CROSS_COMPILE = microblaze-uclinux- endif ifeq ($(ARCH),blackfin) CROSS_COMPILE = bfin-uclinux- @@ -207,6 +207,7 @@ LIBS += dtt/libdtt.a LIBS += drivers/libdrivers.a LIBS += drivers/nand/libnand.a LIBS += drivers/nand_legacy/libnand_legacy.a +LIBS += drivers/net/libnetdrv.a ifeq ($(CPU),mpc83xx) LIBS += drivers/qe/qe.a endif diff --git a/drivers/net/Makefile b/drivers/net/Makefile new file mode 100644 index 0000000000..a10d0819f9 --- /dev/null +++ b/drivers/net/Makefile @@ -0,0 +1,45 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libnetdrv.a + +COBJS := xilinx_emaclite.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c new file mode 100644 index 0000000000..7e69211af9 --- /dev/null +++ b/drivers/net/xilinx_emaclite.c @@ -0,0 +1,378 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +#ifdef XILINX_EMACLITE_BASEADDR + +//#define DEBUG + +#define ENET_MAX_MTU PKTSIZE +#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN +#define ENET_ADDR_LENGTH 6 + +/* EmacLite constants */ +#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ +#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ +#define XEL_TSR_OFFSET 0x07FC /* Tx status */ +#define XEL_RSR_OFFSET 0x17FC /* Rx status */ +#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ + +/* Xmit complete */ +#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL +/* Xmit interrupt enable bit */ +#define XEL_TSR_XMIT_IE_MASK 0x00000008UL +/* Buffer is active, SW bit only */ +#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL +/* Program the MAC address */ +#define XEL_TSR_PROGRAM_MASK 0x00000002UL +/* define for programming the MAC address into the EMAC Lite */ +#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) + +/* Transmit packet length upper byte */ +#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL +/* Transmit packet length lower byte */ +#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL + +/* Recv complete */ +#define XEL_RSR_RECV_DONE_MASK 0x00000001UL +/* Recv interrupt enable bit */ +#define XEL_RSR_RECV_IE_MASK 0x00000008UL + +typedef struct { + unsigned int BaseAddress; /* Base address for device (IPIF) */ + unsigned int NextTxBufferToUse; /* Next TX buffer to write to */ + unsigned int NextRxBufferToUse; /* Next RX buffer to read from */ + unsigned char DeviceId; /* Unique ID of device - for future */ +} XEmacLite; + +static XEmacLite EmacLite; + +static char etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */ + +/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ +#ifdef CFG_ENV_IS_NOWHERE +static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; +#endif + +void XEmacLite_AlignedRead (u32 * SrcPtr, void *DestPtr, unsigned ByteCount) +{ + unsigned i; + unsigned Length = ByteCount; + u32 AlignBuffer; + u32 *To32Ptr; + u32 *From32Ptr; + u8 *To8Ptr; + u8 *From8Ptr; + + From32Ptr = (u32 *) SrcPtr; + + /* Word aligned buffer, no correction needed. */ + To32Ptr = (u32 *) DestPtr; + while (Length > 3) { + *To32Ptr++ = *From32Ptr++; + Length -= 4; + } + To8Ptr = (u8 *) To32Ptr; + + AlignBuffer = *From32Ptr++; + From8Ptr = (u8 *) & AlignBuffer; + + for (i = 0; i < Length; i++) { + *To8Ptr++ = *From8Ptr++; + } +} + +void XEmacLite_AlignedWrite (void *SrcPtr, u32 * DestPtr, unsigned ByteCount) +{ + unsigned i; + unsigned Length = ByteCount; + u32 AlignBuffer; + u32 *To32Ptr; + u32 *From32Ptr; + u8 *To8Ptr; + u8 *From8Ptr; + To32Ptr = DestPtr; + + From32Ptr = (u32 *) SrcPtr; + while (Length > 3) { + + *To32Ptr++ = *From32Ptr++; + Length -= 4; + } + + AlignBuffer = 0; + To8Ptr = (u8 *) & AlignBuffer; + From8Ptr = (u8 *) From32Ptr; + + for (i = 0; i < Length; i++) { + *To8Ptr++ = *From8Ptr++; + } + + *To32Ptr++ = AlignBuffer; +} + +void eth_halt (void) +{ +#ifdef DEBUG + puts ("eth_halt\n"); +#endif +} + +int eth_init (bd_t * bis) +{ +#ifdef DEBUG + puts ("EmacLite Initialization Started\n"); +#endif + memset (&EmacLite, 0, sizeof (XEmacLite)); + EmacLite.BaseAddress = XILINX_EMACLITE_BASEADDR; + +#ifdef CFG_ENV_IS_NOWHERE + memcpy (bis->bi_enetaddr, EMACAddr, ENET_ADDR_LENGTH); +#endif +/* + * TX - TX_PING & TX_PONG initialization + */ + /* Restart PING TX */ + out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0); + /* Copy MAC address */ + XEmacLite_AlignedWrite (bis->bi_enetaddr, + EmacLite.BaseAddress, ENET_ADDR_LENGTH); + /* Set the length */ + out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); + /* Update the MAC address in the EMAC Lite */ + out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); + /* Wait for EMAC Lite to finish with the MAC address update */ + while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET) & + XEL_TSR_PROG_MAC_ADDR) != 0) ; + +#ifdef XILINX_EMACLITE_TX_PING_PONG + /* The same operation with PONG TX */ + out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); + XEmacLite_AlignedWrite (bis->bi_enetaddr, + EmacLite.BaseAddress + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); + out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); + out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, + XEL_TSR_PROG_MAC_ADDR); + while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + + XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; +#endif + +/* + * RX - RX_PING & RX_PONG initialization + */ + /* Write out the value to flush the RX buffer */ + out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); +#ifdef XILINX_EMACLITE_RX_PING_PONG + out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, + XEL_RSR_RECV_IE_MASK); +#endif + +#ifdef DEBUG + puts ("EmacLite Initialization complete\n"); +#endif + return 0; +} + +int XEmacLite_TxBufferAvailable (XEmacLite * InstancePtr) +{ + u32 Register; + u32 TxPingBusy; + u32 TxPongBusy; + /* + * Read the other buffer register + * and determine if the other buffer is available + */ + Register = in_be32 (InstancePtr->BaseAddress + + InstancePtr->NextTxBufferToUse + 0); + TxPingBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) == + XEL_TSR_XMIT_BUSY_MASK); + + Register = in_be32 (InstancePtr->BaseAddress + + (InstancePtr->NextTxBufferToUse ^ XEL_TSR_OFFSET) + 0); + TxPongBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) == + XEL_TSR_XMIT_BUSY_MASK); + + return (!(TxPingBusy && TxPongBusy)); +} + +int eth_send (volatile void *ptr, int len) { + + unsigned int Register; + unsigned int BaseAddress; + + unsigned maxtry = 1000; + + if (len > ENET_MAX_MTU) + len = ENET_MAX_MTU; + + while (!XEmacLite_TxBufferAvailable (&EmacLite) && maxtry) { + udelay (10); + maxtry--; + } + + if (!maxtry) { + printf ("Error: Timeout waiting for ethernet TX buffer\n"); + /* Restart PING TX */ + out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0); +#ifdef XILINX_EMACLITE_TX_PING_PONG + out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + + XEL_BUFFER_OFFSET, 0); +#endif + return 0; + } + + /* Determine the expected TX buffer address */ + BaseAddress = (EmacLite.BaseAddress + EmacLite.NextTxBufferToUse); + + /* Determine if the expected buffer address is empty */ + Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); + if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0) + && ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET) + & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { + +#ifdef XILINX_EMACLITE_TX_PING_PONG + EmacLite.NextTxBufferToUse ^= XEL_BUFFER_OFFSET; +#endif +#ifdef DEBUG + printf ("Send packet from 0x%x\n", BaseAddress); +#endif + /* Write the frame to the buffer */ + XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len); + out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len & + (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); + Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); + Register |= XEL_TSR_XMIT_BUSY_MASK; + if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) { + Register |= XEL_TSR_XMIT_ACTIVE_MASK; + } + out_be32 (BaseAddress + XEL_TSR_OFFSET, Register); + return 1; + } +#ifdef XILINX_EMACLITE_TX_PING_PONG + /* Switch to second buffer */ + BaseAddress ^= XEL_BUFFER_OFFSET; + /* Determine if the expected buffer address is empty */ + Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); + if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0) + && ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET) + & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { +#ifdef DEBUG + printf ("Send packet from 0x%x\n", BaseAddress); +#endif + /* Write the frame to the buffer */ + XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len); + out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len & + (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); + Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); + Register |= XEL_TSR_XMIT_BUSY_MASK; + if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) { + Register |= XEL_TSR_XMIT_ACTIVE_MASK; + } + out_be32 (BaseAddress + XEL_TSR_OFFSET, Register); + return 1; + } +#endif + puts ("Error while sending frame\n"); + return 0; +} + +int eth_rx (void) +{ + unsigned int Length; + unsigned int Register; + unsigned int BaseAddress; + + BaseAddress = EmacLite.BaseAddress + EmacLite.NextRxBufferToUse; + Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); +#ifdef DEBUG +// printf ("Testing data at address 0x%x\n", BaseAddress); +#endif + if ((Register & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { +#ifdef XILINX_EMACLITE_RX_PING_PONG + EmacLite.NextRxBufferToUse ^= XEL_BUFFER_OFFSET; +#endif + } else { +#ifndef XILINX_EMACLITE_RX_PING_PONG +#ifdef DEBUG +// printf ("No data was available - address 0x%x\n", BaseAddress); +#endif + return 0; +#else + BaseAddress ^= XEL_BUFFER_OFFSET; + Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); + if ((Register & XEL_RSR_RECV_DONE_MASK) != + XEL_RSR_RECV_DONE_MASK) { +#ifdef DEBUG +// printf ("No data was available - address 0x%x\n", +// BaseAddress); +#endif + return 0; + } +#endif + } + /* Get the length of the frame that arrived */ + switch(((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0xC)) & + 0xFFFF0000 ) >> 16) { + case 0x806: + Length = 42 + 20; /* FIXME size of ARP */ +#ifdef DEBUG + puts ("ARP Packet\n"); +#endif + break; + case 0x800: + Length = 14 + 14 + + (((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0x10)) & + 0xFFFF0000) >> 16); /* FIXME size of IP packet */ +#ifdef DEBUG + puts("IP Packet\n"); +#endif + break; + default: +#ifdef DEBUG + puts("Other Packet\n"); +#endif + Length = ENET_MAX_MTU; + break; + } + + XEmacLite_AlignedRead ((BaseAddress + XEL_RXBUFF_OFFSET), + etherrxbuff, Length); + + /* Acknowledge the frame */ + Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); + Register &= ~XEL_RSR_RECV_DONE_MASK; + out_be32 (BaseAddress + XEL_RSR_OFFSET, Register); + +#ifdef DEBUG + printf ("Packet receive from 0x%x, length %dB\n", BaseAddress, Length); +#endif + NetReceive ((uchar *) etherrxbuff, Length); + return 1; + +} +#endif From 537091b4eed9302865d03fef3f7212b4fe5cf28f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 5 Aug 2007 15:53:50 +0200 Subject: [PATCH 09/73] [PATCH] Added support for Xilinx Emac community driver --- drivers/net/Makefile | 2 +- drivers/net/xilinx_emac.c | 372 ++++++++++++++++++++++++++++++++++++++ drivers/net/xilinx_emac.h | 128 +++++++++++++ 3 files changed, 501 insertions(+), 1 deletion(-) create mode 100644 drivers/net/xilinx_emac.c create mode 100644 drivers/net/xilinx_emac.h diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a10d0819f9..7342dc8ce6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libnetdrv.a -COBJS := xilinx_emaclite.o +COBJS := xilinx_emaclite.o xilinx_emac.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/net/xilinx_emac.c b/drivers/net/xilinx_emac.c new file mode 100644 index 0000000000..d44f31e8af --- /dev/null +++ b/drivers/net/xilinx_emac.c @@ -0,0 +1,372 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Based on Xilinx drivers + * + */ + +#include +#include +#include +#include +#include +#include "xilinx_emac.h" + +#ifdef XILINX_EMAC + +#undef DEBUG + +#define ENET_MAX_MTU PKTSIZE +#define ENET_ADDR_LENGTH 6 + +static unsigned int etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ + +static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; + +static XEmac Emac; + +void eth_halt(void) +{ + return; +} + +int eth_init(bd_t * bis) +{ + u32 HelpReg; +#ifdef DEBUG + printf("EMAC Initialization Started\n\r"); +#endif + if (Emac.IsStarted) { + puts("Emac is started\n"); + return 0; + } + + memset (&Emac, 0, sizeof (XEmac)); + + Emac.BaseAddress = XILINX_EMAC_BASEADDR; + + /* Setting up FIFOs */ + Emac.RecvFifo.RegBaseAddress = Emac.BaseAddress + + XEM_PFIFO_RXREG_OFFSET; + Emac.RecvFifo.DataBaseAddress = Emac.BaseAddress + + XEM_PFIFO_RXDATA_OFFSET; + out_be32 (Emac.RecvFifo.RegBaseAddress, XPF_RESET_FIFO_MASK); + + Emac.SendFifo.RegBaseAddress = Emac.BaseAddress + + XEM_PFIFO_TXREG_OFFSET; + Emac.SendFifo.DataBaseAddress = Emac.BaseAddress + + XEM_PFIFO_TXDATA_OFFSET; + out_be32 (Emac.SendFifo.RegBaseAddress, XPF_RESET_FIFO_MASK); + + /* Reset the entire IPIF */ + out_be32 (Emac.BaseAddress + XIIF_V123B_RESETR_OFFSET, + XIIF_V123B_RESET_MASK); + + /* Stopping EMAC for setting up MAC */ + HelpReg = in_be32 (Emac.BaseAddress + XEM_ECR_OFFSET); + HelpReg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); + out_be32 (Emac.BaseAddress + XEM_ECR_OFFSET, HelpReg); + + if (!getenv("ethaddr")) { + memcpy(bis->bi_enetaddr, EMACAddr, ENET_ADDR_LENGTH); + } + + /* Set the device station address high and low registers */ + HelpReg = (bis->bi_enetaddr[0] << 8) | bis->bi_enetaddr[1]; + out_be32 (Emac.BaseAddress + XEM_SAH_OFFSET, HelpReg); + HelpReg = (bis->bi_enetaddr[2] << 24) | (bis->bi_enetaddr[3] << 16) | + (bis->bi_enetaddr[4] << 8) | bis->bi_enetaddr[5]; + out_be32 (Emac.BaseAddress + XEM_SAL_OFFSET, HelpReg); + + + HelpReg = XEM_ECR_UNICAST_ENABLE_MASK | XEM_ECR_BROAD_ENABLE_MASK | + XEM_ECR_FULL_DUPLEX_MASK | XEM_ECR_XMIT_FCS_ENABLE_MASK | + XEM_ECR_XMIT_PAD_ENABLE_MASK | XEM_ECR_PHY_ENABLE_MASK; + out_be32 (Emac.BaseAddress + XEM_ECR_OFFSET, HelpReg); + + Emac.IsStarted = 1; + + /* Enable the transmitter, and receiver */ + HelpReg = in_be32 (Emac.BaseAddress + XEM_ECR_OFFSET); + HelpReg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); + HelpReg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); + out_be32 (Emac.BaseAddress + XEM_ECR_OFFSET, HelpReg); + + printf("EMAC Initialization complete\n\r"); + return 0; +} + +int eth_send(volatile void *ptr, int len) +{ + u32 IntrStatus; + u32 XmitStatus; + u32 FifoCount; + u32 WordCount; + u32 ExtraByteCount; + u32 *WordBuffer = (u32 *) ptr; + + if (len > ENET_MAX_MTU) + len = ENET_MAX_MTU; + + /* + * Check for overruns and underruns for the transmit status and length + * FIFOs and make sure the send packet FIFO is not deadlocked. + * Any of these conditions is bad enough that we do not want to + * continue. The upper layer software should reset the device to resolve + * the error. + */ + IntrStatus = in_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET); + if (IntrStatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | + XEM_EIR_XMIT_LFIFO_OVER_MASK)) { +#ifdef DEBUG + puts ("Transmitting overrun error\n"); +#endif + return 0; + } else if (IntrStatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | + XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { +#ifdef DEBUG + puts ("Transmitting underrun error\n"); +#endif + return 0; + } else if (in_be32 (Emac.SendFifo.RegBaseAddress + + XPF_COUNT_STATUS_REG_OFFSET) & XPF_DEADLOCK_MASK) { +#ifdef DEBUG + puts("Transmitting fifo error\n"); +#endif + return 0; + } + + /* + * Before writing to the data FIFO, make sure the length FIFO is not + * full. The data FIFO might not be full yet even though the length FIFO + * is. This avoids an overrun condition on the length FIFO and keeps the + * FIFOs in sync. + * + * Clear the latched LFIFO_FULL bit so next time around the most + * current status is represented + */ + if (IntrStatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) { + out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, IntrStatus + & XEM_EIR_XMIT_LFIFO_FULL_MASK); +#ifdef DEBUG + puts ("Fifo is full\n"); +#endif + return 0; + } + + /* get the count of how many words may be inserted into the FIFO */ + FifoCount = in_be32 (Emac.SendFifo.RegBaseAddress + + XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; + WordCount = len >> 2; + ExtraByteCount = len & 0x3; + + if (FifoCount < WordCount) { +#ifdef DEBUG + puts ("Sending packet is larger then size of FIFO\n"); +#endif + return 0; + } + + for (FifoCount = 0; FifoCount < WordCount; FifoCount++) { + out_be32 (Emac.SendFifo.DataBaseAddress, WordBuffer[FifoCount]); + } + if (ExtraByteCount > 0) { + u32 LastWord = 0; + u8 *ExtraBytesBuffer = (u8 *) (WordBuffer + WordCount); + + if (ExtraByteCount == 1) { + LastWord = ExtraBytesBuffer[0] << 24; + } else if (ExtraByteCount == 2) { + LastWord = ExtraBytesBuffer[0] << 24 | + ExtraBytesBuffer[1] << 16; + } else if (ExtraByteCount == 3) { + LastWord = ExtraBytesBuffer[0] << 24 | + ExtraBytesBuffer[1] << 16 | + ExtraBytesBuffer[2] << 8; + } + out_be32 (Emac.SendFifo.DataBaseAddress, LastWord); + } + + /* Loop on the MAC's status to wait for any pause to complete */ + IntrStatus = in_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET); + while ((IntrStatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) { + IntrStatus = in_be32 ((Emac.BaseAddress) + + XIIF_V123B_IISR_OFFSET); + /* Clear the pause status from the transmit status register */ + out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, + IntrStatus & XEM_EIR_XMIT_PAUSE_MASK); + } + + /* + * Set the MAC's transmit packet length register to tell it to transmit + */ + out_be32 (Emac.BaseAddress + XEM_TPLR_OFFSET, len); + + /* + * Loop on the MAC's status to wait for the transmit to complete. + * The transmit status is in the FIFO when the XMIT_DONE bit is set. + */ + do { + IntrStatus = in_be32 ((Emac.BaseAddress) + + XIIF_V123B_IISR_OFFSET); + } + while ((IntrStatus & XEM_EIR_XMIT_DONE_MASK) == 0); + + XmitStatus = in_be32 (Emac.BaseAddress + XEM_TSR_OFFSET); + + if (IntrStatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | + XEM_EIR_XMIT_LFIFO_OVER_MASK)) { +#ifdef DEBUG + puts ("Transmitting overrun error\n"); +#endif + return 0; + } else if (IntrStatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | + XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { +#ifdef DEBUG + puts ("Transmitting underrun error\n"); +#endif + return 0; + } + + /* Clear the interrupt status register of transmit statuses */ + out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, + IntrStatus & XEM_EIR_XMIT_ALL_MASK); + + /* + * Collision errors are stored in the transmit status register + * instead of the interrupt status register + */ + if ((XmitStatus & XEM_TSR_EXCESS_DEFERRAL_MASK) || + (XmitStatus & XEM_TSR_LATE_COLLISION_MASK)) { +#ifdef DEBUG + puts ("Transmitting collision error\n"); +#endif + return 0; + } + return 1; +} + +int eth_rx(void) +{ + u32 PktLength; + u32 IntrStatus; + u32 FifoCount; + u32 WordCount; + u32 ExtraByteCount; + u32 LastWord; + u8 *ExtraBytesBuffer; + + if (in_be32 (Emac.RecvFifo.RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) + & XPF_DEADLOCK_MASK) { + out_be32 (Emac.RecvFifo.RegBaseAddress, XPF_RESET_FIFO_MASK); +#ifdef DEBUG + puts ("Receiving FIFO deadlock\n"); +#endif + return 0; + } + + /* + * Get the interrupt status to know what happened (whether an error occurred + * and/or whether frames have been received successfully). When clearing the + * intr status register, clear only statuses that pertain to receive. + */ + IntrStatus = in_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET); + /* + * Before reading from the length FIFO, make sure the length FIFO is not + * empty. We could cause an underrun error if we try to read from an + * empty FIFO. + */ + if (!(IntrStatus & XEM_EIR_RECV_DONE_MASK)) { +#ifdef DEBUG + /* puts("Receiving FIFO is empty\n"); */ +#endif + return 0; + } + + /* + * Determine, from the MAC, the length of the next packet available + * in the data FIFO (there should be a non-zero length here) + */ + PktLength = in_be32 (Emac.BaseAddress + XEM_RPLR_OFFSET); + if (!PktLength) { + return 0; + } + + /* + * Write the RECV_DONE bit in the status register to clear it. This bit + * indicates the RPLR is non-empty, and we know it's set at this point. + * We clear it so that subsequent entry into this routine will reflect + * the current status. This is done because the non-empty bit is latched + * in the IPIF, which means it may indicate a non-empty condition even + * though there is something in the FIFO. + */ + out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, + XEM_EIR_RECV_DONE_MASK); + + FifoCount = in_be32 (Emac.RecvFifo.RegBaseAddress + + XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; + + if ((FifoCount * 4) < PktLength) { +#ifdef DEBUG + puts ("Receiving FIFO is smaller than packet size.\n"); +#endif + return 0; + } + + WordCount = PktLength >> 2; + ExtraByteCount = PktLength & 0x3; + + for (FifoCount = 0; FifoCount < WordCount; FifoCount++) { + etherrxbuff[FifoCount] = + in_be32 (Emac.RecvFifo.DataBaseAddress); + } + + /* + * if there are extra bytes to handle, read the last word from the FIFO + * and insert the extra bytes into the buffer + */ + if (ExtraByteCount > 0) { + ExtraBytesBuffer = (u8 *) (etherrxbuff + WordCount); + + LastWord = in_be32 (Emac.RecvFifo.DataBaseAddress); + + /* + * one extra byte in the last word, put the byte into the next + * location of the buffer, bytes in a word of the FIFO are + * ordered from most significant byte to least + */ + if (ExtraByteCount == 1) { + ExtraBytesBuffer[0] = (u8) (LastWord >> 24); + } else if (ExtraByteCount == 2) { + ExtraBytesBuffer[0] = (u8) (LastWord >> 24); + ExtraBytesBuffer[1] = (u8) (LastWord >> 16); + } else if (ExtraByteCount == 3) { + ExtraBytesBuffer[0] = (u8) (LastWord >> 24); + ExtraBytesBuffer[1] = (u8) (LastWord >> 16); + ExtraBytesBuffer[2] = (u8) (LastWord >> 8); + } + } + NetReceive((uchar *)etherrxbuff, PktLength); + return 1; +} +#endif diff --git a/drivers/net/xilinx_emac.h b/drivers/net/xilinx_emac.h new file mode 100644 index 0000000000..ab4d2121f1 --- /dev/null +++ b/drivers/net/xilinx_emac.h @@ -0,0 +1,128 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Based on Xilinx drivers + * + */ + +typedef struct { + u32 RegBaseAddress; /* Base address of registers */ + u32 DataBaseAddress; /* Base address of data for FIFOs */ +} XPacketFifoV100b; + +typedef struct { + u32 BaseAddress; /* Base address (of IPIF) */ + u32 IsStarted; /* Device is currently started 0-no, 1-yes */ + XPacketFifoV100b RecvFifo; /* FIFO used to receive frames */ + XPacketFifoV100b SendFifo; /* FIFO used to send frames */ + +} XEmac; + +#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ +#define XIIF_V123B_RESET_MASK 0xAUL +#define XIIF_V123B_RESETR_OFFSET 64UL /* reset register */ + +/* This constant is used with the Reset Register */ +#define XPF_RESET_FIFO_MASK 0x0000000A +#define XPF_COUNT_STATUS_REG_OFFSET 4UL + +/* * These constants are used with the Occupancy/Vacancy Count Register. This + * register also contains FIFO status */ +#define XPF_COUNT_MASK 0x0000FFFF +#define XPF_DEADLOCK_MASK 0x20000000 + +/* Offset of the MAC registers from the IPIF base address */ +#define XEM_REG_OFFSET 0x1100UL + +/* + * Register offsets for the Ethernet MAC. Each register is 32 bits. + */ +#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ +#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ +#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ +#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ +#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ +#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ + + + +#define XEM_PFIFO_OFFSET 0x2000UL +#define XEM_PFIFO_TXREG_OFFSET (XEM_PFIFO_OFFSET + 0x0) /* Tx registers */ +#define XEM_PFIFO_RXREG_OFFSET (XEM_PFIFO_OFFSET + 0x10) /* Rx registers */ +#define XEM_PFIFO_TXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x100) /* Tx keyhole */ +#define XEM_PFIFO_RXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x200) /* Rx keyhole */ + + +/* + * EMAC Interrupt Registers (Status and Enable) masks. These registers are + * part of the IPIF IP Interrupt registers + */ +/* A mask for all transmit interrupts, used in polled mode */ +#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK | \ + XEM_EIR_XMIT_ERROR_MASK | \ + XEM_EIR_XMIT_SFIFO_EMPTY_MASK | \ + XEM_EIR_XMIT_LFIFO_FULL_MASK) + +#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL /* Xmit complete */ +#define XEM_EIR_RECV_DONE_MASK 0x00000002UL /* Recv complete */ +#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL /* Xmit error */ +#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL /* Recv error */ +#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL /* Xmit status fifo empty */ +#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL /* Recv length fifo empty */ +#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL /* Xmit length fifo full */ +#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL /* Recv length fifo + * overrun */ +#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL /* Recv length fifo + * underrun */ +#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL /* Xmit status fifo + * overrun */ +#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL /* Transmit status fifo + * underrun */ +#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL /* Transmit length fifo + * overrun */ +#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL /* Transmit length fifo + * underrun */ +#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* Transmit pause pkt + * received */ + +/* + * EMAC Control Register (ECR) + */ +#define XEM_ECR_FULL_DUPLEX_MASK 0x80000000UL /* Full duplex mode */ +#define XEM_ECR_XMIT_RESET_MASK 0x40000000UL /* Reset transmitter */ +#define XEM_ECR_XMIT_ENABLE_MASK 0x20000000UL /* Enable transmitter */ +#define XEM_ECR_RECV_RESET_MASK 0x10000000UL /* Reset receiver */ +#define XEM_ECR_RECV_ENABLE_MASK 0x08000000UL /* Enable receiver */ +#define XEM_ECR_PHY_ENABLE_MASK 0x04000000UL /* Enable PHY */ +#define XEM_ECR_XMIT_PAD_ENABLE_MASK 0x02000000UL /* Enable xmit pad + * insert */ +#define XEM_ECR_XMIT_FCS_ENABLE_MASK 0x01000000UL /* Enable xmit FCS + * insert */ +#define XEM_ECR_UNICAST_ENABLE_MASK 0x00020000UL /* Enable unicast + * addr */ +#define XEM_ECR_BROAD_ENABLE_MASK 0x00008000UL /* Enable broadcast + * addr */ + +/* Transmit Status Register (TSR) */ +#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL /* Transmit excess deferral */ +#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL /* Transmit late collision */ From 98889edd50aadf862071eb5664747ad0d568a20e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 5 Aug 2007 15:54:53 +0200 Subject: [PATCH 10/73] [FIX] Change configuration for XUPV2P Microblaze board --- board/xilinx/xupv2p/Makefile | 21 ++---------- board/xilinx/xupv2p/config.mk | 6 ++-- board/xilinx/xupv2p/xparameters.h | 27 ++++++++------- include/configs/xupv2p.h | 57 +++++++++++++++++++++++++++---- 4 files changed, 72 insertions(+), 39 deletions(-) diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile index 9ab5633626..99e7047350 100644 --- a/board/xilinx/xupv2p/Makefile +++ b/board/xilinx/xupv2p/Makefile @@ -22,32 +22,17 @@ # include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -$(shell mkdir -p $(obj)../xilinx_enet) -endif - -INCS := -I../common -I../xilinx_enet -CFLAGS += $(INCS) -HOST_CFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o \ - ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ - ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ - ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ - ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ - ../common/xbasic_types.o ../common/xdma_channel.o \ - ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ - ../common/xversion.o \ +COBJS = $(BOARD).o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $^ +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk index c07b0b35b1..eedfb24d4f 100644 --- a/board/xilinx/xupv2p/config.mk +++ b/board/xilinx/xupv2p/config.mk @@ -25,8 +25,8 @@ # Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 # -TEXT_BASE = 0x38000000 +TEXT_BASE = 0x30000000 +PLATFORM_CPPFLAGS += -mxl-pattern-compare PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mno-xl-soft-div -PLATFORM_CPPFLAGS += -mxl-barrel-shift +PLATFORM_CPPFLAGS += -mcpu=v5.00.c diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h index a96c693c55..0bb7a805f4 100644 --- a/board/xilinx/xupv2p/xparameters.h +++ b/board/xilinx/xupv2p/xparameters.h @@ -28,17 +28,24 @@ /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 +/* Microblaze is microblaze_0 */ +#define XILINX_USE_MSR_INSTR 1 +#define XILINX_PVR 0 +#define XILINX_FSL_NUMBER 0 + /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 11 +#define XILINX_INTC_NUM_INTR_INPUTS 7 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 1 +#define XILINX_TIMER_IRQ 0 /* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UART_BASEADDR 0x40600000 -#define XILINX_UART_BAUDRATE 115200 +#define XILINX_UARTLITE_BASEADDR 0x40600000 +#define XILINX_UARTLITE_BAUDRATE 115200 + +/* IIC doesn't exist */ /* GPIO is LEDs_4Bit*/ #define XILINX_GPIO_BASEADDR 0x40000000 @@ -51,14 +58,10 @@ /* Sysace Controller is SysACE_CompactFlash */ #define XILINX_SYSACE_BASEADDR 0x41800000 -#define XILINX_SYSACE_HIGHADDR 0x4180ffff #define XILINX_SYSACE_MEM_WIDTH 16 /* Ethernet controller is Ethernet_MAC */ -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 +#define XILINX_EMAC_BASEADDR 0x40c00000 +#define XILINX_EMAC_DMA_PRESENT 3 +#define XILINX_EMAC_HALF_DUPLEX_EXIST 1 +#define XILINX_EMAC_MII_EXIST 1 diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index b4c720d18b..25fa495641 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,13 +31,33 @@ #define CONFIG_XUPV2P 1 /* uart */ -#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR -#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE +#ifdef XILINX_UARTLITE_BASEADDR +#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR +#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } +#else +#ifdef XILINX_UART16550_BASEADDR +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 +#define CONFIG_CONS_INDEX 1 +#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR +#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ + +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600, 115200 } +#endif +#endif /* ethernet */ -#define CONFIG_EMAC 1 -#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES +#ifdef XILINX_EMAC_BASEADDR +#define XILINX_EMAC 1 +#else +#ifdef XILINX_EMACLITE_BASEADDR +#define XILINX_EMACLITE 1 +#endif +#endif +#undef ET_DEBUG /* * setting reset address @@ -48,11 +68,13 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -#define CFG_RESET_ADDRESS 0x36000000 +/* #define CFG_RESET_ADDRESS 0x36000000 */ /* gpio */ +#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -118,6 +140,25 @@ #define CFG_ENV_IS_NOWHERE 1 #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) +#ifndef XILINX_SYSACE_BASEADDR +#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ + CFG_CMD_MEMORY |\ + CFG_CMD_IRQ |\ + CFG_CMD_BDI |\ + CFG_CMD_NET |\ + CFG_CMD_IMI |\ + CFG_CMD_ECHO |\ + CFG_CMD_CACHE |\ + CFG_CMD_RUN |\ + CFG_CMD_AUTOSCRIPT |\ + CFG_CMD_ASKENV |\ + CFG_CMD_LOADS |\ + CFG_CMD_LOADB |\ + CFG_CMD_MISC |\ + CFG_CMD_MFSL |\ + CFG_CMD_PING \ + ) +#else #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ CFG_CMD_MEMORY |\ CFG_CMD_IRQ |\ @@ -134,8 +175,10 @@ CFG_CMD_MISC |\ CFG_CMD_FAT |\ CFG_CMD_EXT2 |\ + CFG_CMD_MFSL |\ CFG_CMD_PING \ ) +#endif /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -150,7 +193,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" +#define CONFIG_HOSTNAME "xupv2p" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -166,11 +209,13 @@ "echo" /* system ace */ +#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION +#endif #endif /* __CONFIG_H */ From af8377d4eb3a0ac5a831830d5ce63fbf65fecb7f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 5 Aug 2007 16:13:31 +0200 Subject: [PATCH 11/73] [FIX] Xilinx Uartlite driver Because PPC405 can use UARTLITE serial interface and Microblaze can use Uart16550 serial interface not only Uartlite. --- drivers/serial_xuartlite.c | 2 +- include/configs/ml401.h | 1 + include/configs/suzaku.h | 1 + include/configs/xupv2p.h | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index ed59abea86..1f3aaae403 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include -#ifdef CONFIG_MICROBLAZE +#ifdef XILINX_UARTLITE #include diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 3db287784d..a6026528b3 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -32,6 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ +#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index ca5c7519c6..9661726b2b 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,6 +48,7 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) +#define XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 25fa495641..bac31f476b 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -32,6 +32,7 @@ /* uart */ #ifdef XILINX_UARTLITE_BASEADDR +#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } From a274ca4f6d68830e7c916f897561cff8c4101c38 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 5 Aug 2007 22:33:05 +0200 Subject: [PATCH 12/73] [FIX] Coding style cleanup --- drivers/net/xilinx_emac.h | 71 +++++++++++++++++------------------ drivers/net/xilinx_emaclite.c | 10 ++--- include/configs/ml401.h | 10 ++--- 3 files changed, 45 insertions(+), 46 deletions(-) diff --git a/drivers/net/xilinx_emac.h b/drivers/net/xilinx_emac.h index ab4d2121f1..7c00eebf04 100644 --- a/drivers/net/xilinx_emac.h +++ b/drivers/net/xilinx_emac.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. @@ -13,7 +13,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -35,34 +35,33 @@ typedef struct { u32 IsStarted; /* Device is currently started 0-no, 1-yes */ XPacketFifoV100b RecvFifo; /* FIFO used to receive frames */ XPacketFifoV100b SendFifo; /* FIFO used to send frames */ - } XEmac; -#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ +#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ #define XIIF_V123B_RESET_MASK 0xAUL #define XIIF_V123B_RESETR_OFFSET 64UL /* reset register */ /* This constant is used with the Reset Register */ -#define XPF_RESET_FIFO_MASK 0x0000000A -#define XPF_COUNT_STATUS_REG_OFFSET 4UL +#define XPF_RESET_FIFO_MASK 0x0000000A +#define XPF_COUNT_STATUS_REG_OFFSET 4UL -/* * These constants are used with the Occupancy/Vacancy Count Register. This - * register also contains FIFO status */ -#define XPF_COUNT_MASK 0x0000FFFF -#define XPF_DEADLOCK_MASK 0x20000000 +/* These constants are used with the Occupancy/Vacancy Count Register. This + * register also contains FIFO status */ +#define XPF_COUNT_MASK 0x0000FFFF +#define XPF_DEADLOCK_MASK 0x20000000 /* Offset of the MAC registers from the IPIF base address */ -#define XEM_REG_OFFSET 0x1100UL +#define XEM_REG_OFFSET 0x1100UL /* * Register offsets for the Ethernet MAC. Each register is 32 bits. */ -#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ -#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ -#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ -#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ -#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ -#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ +#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ +#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ +#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ +#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ +#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ +#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ @@ -78,31 +77,31 @@ typedef struct { * part of the IPIF IP Interrupt registers */ /* A mask for all transmit interrupts, used in polled mode */ -#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK | \ - XEM_EIR_XMIT_ERROR_MASK | \ - XEM_EIR_XMIT_SFIFO_EMPTY_MASK | \ +#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK |\ + XEM_EIR_XMIT_ERROR_MASK | \ + XEM_EIR_XMIT_SFIFO_EMPTY_MASK |\ XEM_EIR_XMIT_LFIFO_FULL_MASK) -#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL /* Xmit complete */ -#define XEM_EIR_RECV_DONE_MASK 0x00000002UL /* Recv complete */ -#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL /* Xmit error */ -#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL /* Recv error */ -#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL /* Xmit status fifo empty */ -#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL /* Recv length fifo empty */ -#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL /* Xmit length fifo full */ -#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL /* Recv length fifo +#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL /* Xmit complete */ +#define XEM_EIR_RECV_DONE_MASK 0x00000002UL /* Recv complete */ +#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL /* Xmit error */ +#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL /* Recv error */ +#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL /* Xmit status fifo empty */ +#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL /* Recv length fifo empty */ +#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL /* Xmit length fifo full */ +#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL /* Recv length fifo * overrun */ -#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL /* Recv length fifo +#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL /* Recv length fifo * underrun */ -#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL /* Xmit status fifo +#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL /* Xmit status fifo * overrun */ -#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL /* Transmit status fifo +#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL /* Transmit status fifo * underrun */ -#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL /* Transmit length fifo +#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL /* Transmit length fifo * overrun */ -#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL /* Transmit length fifo +#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL /* Transmit length fifo * underrun */ -#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* Transmit pause pkt +#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* Transmit pause pkt * received */ /* @@ -124,5 +123,5 @@ typedef struct { * addr */ /* Transmit Status Register (TSR) */ -#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL /* Transmit excess deferral */ -#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL /* Transmit late collision */ +#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL /* Transmit excess deferral */ +#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL /* Transmit late collision */ diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 7e69211af9..99e70354b6 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -29,7 +29,7 @@ #ifdef XILINX_EMACLITE_BASEADDR -//#define DEBUG +#undef DEBUG #define ENET_MAX_MTU PKTSIZE #define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN @@ -310,7 +310,7 @@ int eth_rx (void) BaseAddress = EmacLite.BaseAddress + EmacLite.NextRxBufferToUse; Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); #ifdef DEBUG -// printf ("Testing data at address 0x%x\n", BaseAddress); + printf ("Testing data at address 0x%x\n", BaseAddress); #endif if ((Register & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { #ifdef XILINX_EMACLITE_RX_PING_PONG @@ -319,7 +319,7 @@ int eth_rx (void) } else { #ifndef XILINX_EMACLITE_RX_PING_PONG #ifdef DEBUG -// printf ("No data was available - address 0x%x\n", BaseAddress); + printf ("No data was available - address 0x%x\n", BaseAddress); #endif return 0; #else @@ -328,8 +328,8 @@ int eth_rx (void) if ((Register & XEL_RSR_RECV_DONE_MASK) != XEL_RSR_RECV_DONE_MASK) { #ifdef DEBUG -// printf ("No data was available - address 0x%x\n", -// BaseAddress); + printf ("No data was available - address 0x%x\n", + BaseAddress); #endif return 0; } diff --git a/include/configs/ml401.h b/include/configs/ml401.h index a6026528b3..8b74b7c686 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -87,7 +87,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -100,7 +100,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -243,10 +243,10 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ From ab4b956d3143f8f8174089053f5dfabbb04762b0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Aug 2007 23:31:49 +0200 Subject: [PATCH 13/73] [FIX] Coding style cleanup - Wolfgang's suggestions --- Makefile | 5 +++-- common/cmd_jffs2.c | 16 ++++++++-------- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/Makefile b/Makefile index e88a0e9c3f..4a0e9f59d2 100644 --- a/Makefile +++ b/Makefile @@ -198,8 +198,9 @@ ifeq ($(CPU),ixp) LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a -LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ - fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/romfs/libromfs.a +LIBS += fs/cramfs/libcramfs.a fs/ext2/libext2fs.a fs/fat/libfat.a \ + fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a \ + fs/romfs/libromfs.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += rtc/librtc.a diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 147ab10966..8ea683d997 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -28,7 +28,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -110,7 +110,7 @@ #define DEBUG_JFFS #undef DEBUG_JFFS -#ifdef DEBUG_JFFS +#ifdef DEBUG_JFFS # define DEBUGF(fmt, args...) printf(fmt ,##args) #else # define DEBUGF(fmt, args...) @@ -189,10 +189,10 @@ static struct mtdids* id_find_by_mtd_id(const char *mtd_id, unsigned int mtd_id_ static int device_del(struct mtd_device *dev); /** - * Parses a string into a number. The number stored at ptr is + * Parses a string into a number. The number stored at ptr is * potentially suffixed with K (for kilobytes, or 1024 bytes), * M (for megabytes, or 1048576 bytes), or G (for gigabytes, or - * 1073741824). If the number is suffixed with K, M, or G, then + * 1073741824). If the number is suffixed with K, M, or G, then * the return value is the number multiplied by one kilobyte, one * megabyte, or one gigabyte, respectively. * @@ -681,7 +681,7 @@ static int part_parse(const char *const partdef, const char **ret, struct part_i return 1; } - /* allocate memory */ + /* allocate memory */ part = (struct part_info *)malloc(sizeof(struct part_info) + name_len); if (!part) { printf("out of memory\n"); @@ -1837,9 +1837,9 @@ static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int pa return NULL; } -/*************************************************/ -/* U-boot commands */ -/*************************************************/ +/***************************************************/ +/* U-boot commands */ +/***************************************************/ /** * Routine implementing fsload u-boot command. This routine tries to load From f500d9fdeb576288656dac427052ad2c5ca0ad1a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Aug 2007 23:35:26 +0200 Subject: [PATCH 14/73] [FIX] Fix romfs code --- fs/romfs/romfs.c | 40 +++++----------------------------------- 1 file changed, 5 insertions(+), 35 deletions(-) diff --git a/fs/romfs/romfs.c b/fs/romfs/romfs.c index b7d96964b5..34917bec36 100644 --- a/fs/romfs/romfs.c +++ b/fs/romfs/romfs.c @@ -124,7 +124,8 @@ static int romfs_list_inode (struct part_info *info, unsigned long offset) struct romfs_inode *hardlink = NULL; char str[3], *data; -/* mapping spec.info means +/* + * mapping spec.info means * 0 hard link link destination [file header] * 1 directory first file's header * 2 regular file unused, must be zero [MBZ] @@ -134,40 +135,9 @@ static int romfs_list_inode (struct part_info *info, unsigned long offset) * 6 socket unused, MBZ * 7 fifo unused, MBZ */ - switch (inode->next & 0x7) { - case 0: - str[0] = 'h'; - break; - case 1: - str[0] = 'd'; - break; - case 2: - str[0] = 'f'; - break; - case 3: - str[0] = 'l'; - break; - case 4: - str[0] = 'b'; - break; - case 5: - str[0] = 'c'; - break; - case 6: - str[0] = 's'; - break; - case 7: - str[0] = 'p'; - break; - default: - str[0] = '?'; - } - - if (inode->next & 0x8) { - str[1] = 'x'; - } else { - str[1] = '-'; - } + char attributes[] = "hdflbcsp"; + str[0] = attributes[inode->next & 0x7]; + str[1] = (inode->next & 0x8) ? 'x' : '-'; str[2] = '\0'; if ((str[0] == 'b') || (str[0] == 'c')) { From 706714d97a0d08d59eda4de2268c39f504688329 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Aug 2007 23:41:53 +0200 Subject: [PATCH 15/73] [FIX] remove cute code --- drivers/net/xilinx_emac.c | 229 +++++++++++++++--------------- drivers/net/xilinx_emac.h | 121 +++++++++------- drivers/net/xilinx_emaclite.c | 256 +++++++++++++++++----------------- 3 files changed, 314 insertions(+), 292 deletions(-) diff --git a/drivers/net/xilinx_emac.c b/drivers/net/xilinx_emac.c index d44f31e8af..23567cc40a 100644 --- a/drivers/net/xilinx_emac.c +++ b/drivers/net/xilinx_emac.c @@ -41,76 +41,78 @@ static unsigned int etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ -static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; +static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; -static XEmac Emac; +static xemac emac; void eth_halt(void) { - return; +#ifdef DEBUG + puts ("eth_halt\n"); +#endif } int eth_init(bd_t * bis) { - u32 HelpReg; + u32 helpreg; #ifdef DEBUG printf("EMAC Initialization Started\n\r"); #endif - if (Emac.IsStarted) { + if (emac.isstarted) { puts("Emac is started\n"); return 0; } - memset (&Emac, 0, sizeof (XEmac)); + memset (&emac, 0, sizeof (xemac)); - Emac.BaseAddress = XILINX_EMAC_BASEADDR; + emac.baseaddress = XILINX_EMAC_BASEADDR; /* Setting up FIFOs */ - Emac.RecvFifo.RegBaseAddress = Emac.BaseAddress + + emac.recvfifo.regbaseaddress = emac.baseaddress + XEM_PFIFO_RXREG_OFFSET; - Emac.RecvFifo.DataBaseAddress = Emac.BaseAddress + + emac.recvfifo.databaseaddress = emac.baseaddress + XEM_PFIFO_RXDATA_OFFSET; - out_be32 (Emac.RecvFifo.RegBaseAddress, XPF_RESET_FIFO_MASK); + out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); - Emac.SendFifo.RegBaseAddress = Emac.BaseAddress + + emac.sendfifo.regbaseaddress = emac.baseaddress + XEM_PFIFO_TXREG_OFFSET; - Emac.SendFifo.DataBaseAddress = Emac.BaseAddress + + emac.sendfifo.databaseaddress = emac.baseaddress + XEM_PFIFO_TXDATA_OFFSET; - out_be32 (Emac.SendFifo.RegBaseAddress, XPF_RESET_FIFO_MASK); + out_be32 (emac.sendfifo.regbaseaddress, XPF_RESET_FIFO_MASK); /* Reset the entire IPIF */ - out_be32 (Emac.BaseAddress + XIIF_V123B_RESETR_OFFSET, + out_be32 (emac.baseaddress + XIIF_V123B_RESETR_OFFSET, XIIF_V123B_RESET_MASK); /* Stopping EMAC for setting up MAC */ - HelpReg = in_be32 (Emac.BaseAddress + XEM_ECR_OFFSET); - HelpReg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (Emac.BaseAddress + XEM_ECR_OFFSET, HelpReg); + helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); + helpreg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); + out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); if (!getenv("ethaddr")) { - memcpy(bis->bi_enetaddr, EMACAddr, ENET_ADDR_LENGTH); + memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); } /* Set the device station address high and low registers */ - HelpReg = (bis->bi_enetaddr[0] << 8) | bis->bi_enetaddr[1]; - out_be32 (Emac.BaseAddress + XEM_SAH_OFFSET, HelpReg); - HelpReg = (bis->bi_enetaddr[2] << 24) | (bis->bi_enetaddr[3] << 16) | + helpreg = (bis->bi_enetaddr[0] << 8) | bis->bi_enetaddr[1]; + out_be32 (emac.baseaddress + XEM_SAH_OFFSET, helpreg); + helpreg = (bis->bi_enetaddr[2] << 24) | (bis->bi_enetaddr[3] << 16) | (bis->bi_enetaddr[4] << 8) | bis->bi_enetaddr[5]; - out_be32 (Emac.BaseAddress + XEM_SAL_OFFSET, HelpReg); + out_be32 (emac.baseaddress + XEM_SAL_OFFSET, helpreg); - HelpReg = XEM_ECR_UNICAST_ENABLE_MASK | XEM_ECR_BROAD_ENABLE_MASK | + helpreg = XEM_ECR_UNICAST_ENABLE_MASK | XEM_ECR_BROAD_ENABLE_MASK | XEM_ECR_FULL_DUPLEX_MASK | XEM_ECR_XMIT_FCS_ENABLE_MASK | XEM_ECR_XMIT_PAD_ENABLE_MASK | XEM_ECR_PHY_ENABLE_MASK; - out_be32 (Emac.BaseAddress + XEM_ECR_OFFSET, HelpReg); + out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - Emac.IsStarted = 1; + emac.isstarted = 1; /* Enable the transmitter, and receiver */ - HelpReg = in_be32 (Emac.BaseAddress + XEM_ECR_OFFSET); - HelpReg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); - HelpReg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (Emac.BaseAddress + XEM_ECR_OFFSET, HelpReg); + helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); + helpreg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); + helpreg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); + out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); printf("EMAC Initialization complete\n\r"); return 0; @@ -118,12 +120,12 @@ int eth_init(bd_t * bis) int eth_send(volatile void *ptr, int len) { - u32 IntrStatus; - u32 XmitStatus; - u32 FifoCount; - u32 WordCount; - u32 ExtraByteCount; - u32 *WordBuffer = (u32 *) ptr; + u32 intrstatus; + u32 xmitstatus; + u32 fifocount; + u32 wordcount; + u32 extrabytecount; + u32 *wordbuffer = (u32 *) ptr; if (len > ENET_MAX_MTU) len = ENET_MAX_MTU; @@ -135,20 +137,20 @@ int eth_send(volatile void *ptr, int len) * continue. The upper layer software should reset the device to resolve * the error. */ - IntrStatus = in_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET); - if (IntrStatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | + intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); + if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | XEM_EIR_XMIT_LFIFO_OVER_MASK)) { #ifdef DEBUG puts ("Transmitting overrun error\n"); #endif return 0; - } else if (IntrStatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | + } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { #ifdef DEBUG puts ("Transmitting underrun error\n"); #endif return 0; - } else if (in_be32 (Emac.SendFifo.RegBaseAddress + + } else if (in_be32 (emac.sendfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET) & XPF_DEADLOCK_MASK) { #ifdef DEBUG puts("Transmitting fifo error\n"); @@ -165,9 +167,9 @@ int eth_send(volatile void *ptr, int len) * Clear the latched LFIFO_FULL bit so next time around the most * current status is represented */ - if (IntrStatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) { - out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, IntrStatus - & XEM_EIR_XMIT_LFIFO_FULL_MASK); + if (intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) { + out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, + intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK); #ifdef DEBUG puts ("Fifo is full\n"); #endif @@ -175,72 +177,72 @@ int eth_send(volatile void *ptr, int len) } /* get the count of how many words may be inserted into the FIFO */ - FifoCount = in_be32 (Emac.SendFifo.RegBaseAddress + + fifocount = in_be32 (emac.sendfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - WordCount = len >> 2; - ExtraByteCount = len & 0x3; + wordcount = len >> 2; + extrabytecount = len & 0x3; - if (FifoCount < WordCount) { + if (fifocount < wordcount) { #ifdef DEBUG puts ("Sending packet is larger then size of FIFO\n"); #endif return 0; } - for (FifoCount = 0; FifoCount < WordCount; FifoCount++) { - out_be32 (Emac.SendFifo.DataBaseAddress, WordBuffer[FifoCount]); + for (fifocount = 0; fifocount < wordcount; fifocount++) { + out_be32 (emac.sendfifo.databaseaddress, wordbuffer[fifocount]); } - if (ExtraByteCount > 0) { - u32 LastWord = 0; - u8 *ExtraBytesBuffer = (u8 *) (WordBuffer + WordCount); + if (extrabytecount > 0) { + u32 lastword = 0; + u8 *extrabytesbuffer = (u8 *) (wordbuffer + wordcount); - if (ExtraByteCount == 1) { - LastWord = ExtraBytesBuffer[0] << 24; - } else if (ExtraByteCount == 2) { - LastWord = ExtraBytesBuffer[0] << 24 | - ExtraBytesBuffer[1] << 16; - } else if (ExtraByteCount == 3) { - LastWord = ExtraBytesBuffer[0] << 24 | - ExtraBytesBuffer[1] << 16 | - ExtraBytesBuffer[2] << 8; + if (extrabytecount == 1) { + lastword = extrabytesbuffer[0] << 24; + } else if (extrabytecount == 2) { + lastword = extrabytesbuffer[0] << 24 | + extrabytesbuffer[1] << 16; + } else if (extrabytecount == 3) { + lastword = extrabytesbuffer[0] << 24 | + extrabytesbuffer[1] << 16 | + extrabytesbuffer[2] << 8; } - out_be32 (Emac.SendFifo.DataBaseAddress, LastWord); + out_be32 (emac.sendfifo.databaseaddress, lastword); } /* Loop on the MAC's status to wait for any pause to complete */ - IntrStatus = in_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET); - while ((IntrStatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) { - IntrStatus = in_be32 ((Emac.BaseAddress) + + intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); + while ((intrstatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) { + intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); /* Clear the pause status from the transmit status register */ - out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, - IntrStatus & XEM_EIR_XMIT_PAUSE_MASK); + out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, + intrstatus & XEM_EIR_XMIT_PAUSE_MASK); } /* * Set the MAC's transmit packet length register to tell it to transmit */ - out_be32 (Emac.BaseAddress + XEM_TPLR_OFFSET, len); + out_be32 (emac.baseaddress + XEM_TPLR_OFFSET, len); /* * Loop on the MAC's status to wait for the transmit to complete. * The transmit status is in the FIFO when the XMIT_DONE bit is set. */ do { - IntrStatus = in_be32 ((Emac.BaseAddress) + + intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); } - while ((IntrStatus & XEM_EIR_XMIT_DONE_MASK) == 0); + while ((intrstatus & XEM_EIR_XMIT_DONE_MASK) == 0); - XmitStatus = in_be32 (Emac.BaseAddress + XEM_TSR_OFFSET); + xmitstatus = in_be32 (emac.baseaddress + XEM_TSR_OFFSET); - if (IntrStatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | + if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | XEM_EIR_XMIT_LFIFO_OVER_MASK)) { #ifdef DEBUG puts ("Transmitting overrun error\n"); #endif return 0; - } else if (IntrStatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | + } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { #ifdef DEBUG puts ("Transmitting underrun error\n"); @@ -249,15 +251,15 @@ int eth_send(volatile void *ptr, int len) } /* Clear the interrupt status register of transmit statuses */ - out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, - IntrStatus & XEM_EIR_XMIT_ALL_MASK); + out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, + intrstatus & XEM_EIR_XMIT_ALL_MASK); /* * Collision errors are stored in the transmit status register * instead of the interrupt status register */ - if ((XmitStatus & XEM_TSR_EXCESS_DEFERRAL_MASK) || - (XmitStatus & XEM_TSR_LATE_COLLISION_MASK)) { + if ((xmitstatus & XEM_TSR_EXCESS_DEFERRAL_MASK) || + (xmitstatus & XEM_TSR_LATE_COLLISION_MASK)) { #ifdef DEBUG puts ("Transmitting collision error\n"); #endif @@ -268,17 +270,17 @@ int eth_send(volatile void *ptr, int len) int eth_rx(void) { - u32 PktLength; - u32 IntrStatus; - u32 FifoCount; - u32 WordCount; - u32 ExtraByteCount; - u32 LastWord; - u8 *ExtraBytesBuffer; + u32 pktlength; + u32 intrstatus; + u32 fifocount; + u32 wordcount; + u32 extrabytecount; + u32 lastword; + u8 *extrabytesbuffer; - if (in_be32 (Emac.RecvFifo.RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) + if (in_be32 (emac.recvfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET) & XPF_DEADLOCK_MASK) { - out_be32 (Emac.RecvFifo.RegBaseAddress, XPF_RESET_FIFO_MASK); + out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); #ifdef DEBUG puts ("Receiving FIFO deadlock\n"); #endif @@ -286,17 +288,18 @@ int eth_rx(void) } /* - * Get the interrupt status to know what happened (whether an error occurred - * and/or whether frames have been received successfully). When clearing the - * intr status register, clear only statuses that pertain to receive. + * Get the interrupt status to know what happened (whether an error + * occurred and/or whether frames have been received successfully). + * When clearing the intr status register, clear only statuses that + * pertain to receive. */ - IntrStatus = in_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET); + intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); /* * Before reading from the length FIFO, make sure the length FIFO is not * empty. We could cause an underrun error if we try to read from an * empty FIFO. */ - if (!(IntrStatus & XEM_EIR_RECV_DONE_MASK)) { + if (!(intrstatus & XEM_EIR_RECV_DONE_MASK)) { #ifdef DEBUG /* puts("Receiving FIFO is empty\n"); */ #endif @@ -307,8 +310,8 @@ int eth_rx(void) * Determine, from the MAC, the length of the next packet available * in the data FIFO (there should be a non-zero length here) */ - PktLength = in_be32 (Emac.BaseAddress + XEM_RPLR_OFFSET); - if (!PktLength) { + pktlength = in_be32 (emac.baseaddress + XEM_RPLR_OFFSET); + if (!pktlength) { return 0; } @@ -320,53 +323,53 @@ int eth_rx(void) * in the IPIF, which means it may indicate a non-empty condition even * though there is something in the FIFO. */ - out_be32 ((Emac.BaseAddress) + XIIF_V123B_IISR_OFFSET, + out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, XEM_EIR_RECV_DONE_MASK); - FifoCount = in_be32 (Emac.RecvFifo.RegBaseAddress + + fifocount = in_be32 (emac.recvfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - if ((FifoCount * 4) < PktLength) { + if ((fifocount * 4) < pktlength) { #ifdef DEBUG puts ("Receiving FIFO is smaller than packet size.\n"); #endif return 0; } - WordCount = PktLength >> 2; - ExtraByteCount = PktLength & 0x3; + wordcount = pktlength >> 2; + extrabytecount = pktlength & 0x3; - for (FifoCount = 0; FifoCount < WordCount; FifoCount++) { - etherrxbuff[FifoCount] = - in_be32 (Emac.RecvFifo.DataBaseAddress); + for (fifocount = 0; fifocount < wordcount; fifocount++) { + etherrxbuff[fifocount] = + in_be32 (emac.recvfifo.databaseaddress); } /* * if there are extra bytes to handle, read the last word from the FIFO * and insert the extra bytes into the buffer */ - if (ExtraByteCount > 0) { - ExtraBytesBuffer = (u8 *) (etherrxbuff + WordCount); + if (extrabytecount > 0) { + extrabytesbuffer = (u8 *) (etherrxbuff + wordcount); - LastWord = in_be32 (Emac.RecvFifo.DataBaseAddress); + lastword = in_be32 (emac.recvfifo.databaseaddress); /* * one extra byte in the last word, put the byte into the next * location of the buffer, bytes in a word of the FIFO are * ordered from most significant byte to least */ - if (ExtraByteCount == 1) { - ExtraBytesBuffer[0] = (u8) (LastWord >> 24); - } else if (ExtraByteCount == 2) { - ExtraBytesBuffer[0] = (u8) (LastWord >> 24); - ExtraBytesBuffer[1] = (u8) (LastWord >> 16); - } else if (ExtraByteCount == 3) { - ExtraBytesBuffer[0] = (u8) (LastWord >> 24); - ExtraBytesBuffer[1] = (u8) (LastWord >> 16); - ExtraBytesBuffer[2] = (u8) (LastWord >> 8); + if (extrabytecount == 1) { + extrabytesbuffer[0] = (u8) (lastword >> 24); + } else if (extrabytecount == 2) { + extrabytesbuffer[0] = (u8) (lastword >> 24); + extrabytesbuffer[1] = (u8) (lastword >> 16); + } else if (extrabytecount == 3) { + extrabytesbuffer[0] = (u8) (lastword >> 24); + extrabytesbuffer[1] = (u8) (lastword >> 16); + extrabytesbuffer[2] = (u8) (lastword >> 8); } } - NetReceive((uchar *)etherrxbuff, PktLength); + NetReceive((uchar *)etherrxbuff, pktlength); return 1; } #endif diff --git a/drivers/net/xilinx_emac.h b/drivers/net/xilinx_emac.h index 7c00eebf04..966598e27a 100644 --- a/drivers/net/xilinx_emac.h +++ b/drivers/net/xilinx_emac.h @@ -26,16 +26,16 @@ */ typedef struct { - u32 RegBaseAddress; /* Base address of registers */ - u32 DataBaseAddress; /* Base address of data for FIFOs */ -} XPacketFifoV100b; + u32 regbaseaddress; /* Base address of registers */ + u32 databaseaddress; /* Base address of data for FIFOs */ +} xpacketfifov100b; typedef struct { - u32 BaseAddress; /* Base address (of IPIF) */ - u32 IsStarted; /* Device is currently started 0-no, 1-yes */ - XPacketFifoV100b RecvFifo; /* FIFO used to receive frames */ - XPacketFifoV100b SendFifo; /* FIFO used to send frames */ -} XEmac; + u32 baseaddress; /* Base address (of IPIF) */ + u32 isstarted; /* Device is currently started 0-no, 1-yes */ + xpacketfifov100b recvfifo; /* FIFO used to receive frames */ + xpacketfifov100b sendfifo; /* FIFO used to send frames */ +} xemac; #define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ #define XIIF_V123B_RESET_MASK 0xAUL @@ -66,10 +66,14 @@ typedef struct { #define XEM_PFIFO_OFFSET 0x2000UL -#define XEM_PFIFO_TXREG_OFFSET (XEM_PFIFO_OFFSET + 0x0) /* Tx registers */ -#define XEM_PFIFO_RXREG_OFFSET (XEM_PFIFO_OFFSET + 0x10) /* Rx registers */ -#define XEM_PFIFO_TXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x100) /* Tx keyhole */ -#define XEM_PFIFO_RXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x200) /* Rx keyhole */ +/* Tx registers */ +#define XEM_PFIFO_TXREG_OFFSET (XEM_PFIFO_OFFSET + 0x0) +/* Rx registers */ +#define XEM_PFIFO_RXREG_OFFSET (XEM_PFIFO_OFFSET + 0x10) +/* Tx keyhole */ +#define XEM_PFIFO_TXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x100) +/* Rx keyhole */ +#define XEM_PFIFO_RXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x200) /* @@ -82,46 +86,63 @@ typedef struct { XEM_EIR_XMIT_SFIFO_EMPTY_MASK |\ XEM_EIR_XMIT_LFIFO_FULL_MASK) -#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL /* Xmit complete */ -#define XEM_EIR_RECV_DONE_MASK 0x00000002UL /* Recv complete */ -#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL /* Xmit error */ -#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL /* Recv error */ -#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL /* Xmit status fifo empty */ -#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL /* Recv length fifo empty */ -#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL /* Xmit length fifo full */ -#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL /* Recv length fifo - * overrun */ -#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL /* Recv length fifo - * underrun */ -#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL /* Xmit status fifo - * overrun */ -#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL /* Transmit status fifo - * underrun */ -#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL /* Transmit length fifo - * overrun */ -#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL /* Transmit length fifo - * underrun */ -#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* Transmit pause pkt - * received */ +/* Xmit complete */ +#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL +/* Recv complete */ +#define XEM_EIR_RECV_DONE_MASK 0x00000002UL +/* Xmit error */ +#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL +/* Recv error */ +#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL +/* Xmit status fifo empty */ +#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL +/* Recv length fifo empty */ +#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL +/* Xmit length fifo full */ +#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL +/* Recv length fifo overrun */ +#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL +/* Recv length fifo underrun */ +#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL +/* Xmit status fifo overrun */ +#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL +/* Transmit status fifo underrun */ +#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL +/* Transmit length fifo overrun */ +#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL +/* Transmit length fifo underrun */ +#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL +/* Transmit pause pkt received */ +#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* * EMAC Control Register (ECR) */ -#define XEM_ECR_FULL_DUPLEX_MASK 0x80000000UL /* Full duplex mode */ -#define XEM_ECR_XMIT_RESET_MASK 0x40000000UL /* Reset transmitter */ -#define XEM_ECR_XMIT_ENABLE_MASK 0x20000000UL /* Enable transmitter */ -#define XEM_ECR_RECV_RESET_MASK 0x10000000UL /* Reset receiver */ -#define XEM_ECR_RECV_ENABLE_MASK 0x08000000UL /* Enable receiver */ -#define XEM_ECR_PHY_ENABLE_MASK 0x04000000UL /* Enable PHY */ -#define XEM_ECR_XMIT_PAD_ENABLE_MASK 0x02000000UL /* Enable xmit pad - * insert */ -#define XEM_ECR_XMIT_FCS_ENABLE_MASK 0x01000000UL /* Enable xmit FCS - * insert */ -#define XEM_ECR_UNICAST_ENABLE_MASK 0x00020000UL /* Enable unicast - * addr */ -#define XEM_ECR_BROAD_ENABLE_MASK 0x00008000UL /* Enable broadcast - * addr */ +/* Full duplex mode */ +#define XEM_ECR_FULL_DUPLEX_MASK 0x80000000UL +/* Reset transmitter */ +#define XEM_ECR_XMIT_RESET_MASK 0x40000000UL +/* Enable transmitter */ +#define XEM_ECR_XMIT_ENABLE_MASK 0x20000000UL +/* Reset receiver */ +#define XEM_ECR_RECV_RESET_MASK 0x10000000UL +/* Enable receiver */ +#define XEM_ECR_RECV_ENABLE_MASK 0x08000000UL +/* Enable PHY */ +#define XEM_ECR_PHY_ENABLE_MASK 0x04000000UL +/* Enable xmit pad insert */ +#define XEM_ECR_XMIT_PAD_ENABLE_MASK 0x02000000UL +/* Enable xmit FCS insert */ +#define XEM_ECR_XMIT_FCS_ENABLE_MASK 0x01000000UL +/* Enable unicast addr */ +#define XEM_ECR_UNICAST_ENABLE_MASK 0x00020000UL +/* Enable broadcast addr */ +#define XEM_ECR_BROAD_ENABLE_MASK 0x00008000UL -/* Transmit Status Register (TSR) */ -#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL /* Transmit excess deferral */ -#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL /* Transmit late collision */ +/* + * Transmit Status Register (TSR) + */ +/* Transmit excess deferral */ +#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL +/* Transmit late collision */ +#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 99e70354b6..5d8eaa5182 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -64,76 +64,73 @@ #define XEL_RSR_RECV_IE_MASK 0x00000008UL typedef struct { - unsigned int BaseAddress; /* Base address for device (IPIF) */ - unsigned int NextTxBufferToUse; /* Next TX buffer to write to */ - unsigned int NextRxBufferToUse; /* Next RX buffer to read from */ - unsigned char DeviceId; /* Unique ID of device - for future */ -} XEmacLite; + unsigned int baseaddress; /* Base address for device (IPIF) */ + unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ + unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ + unsigned char deviceid; /* Unique ID of device - for future */ +} xemaclite; -static XEmacLite EmacLite; +static xemaclite emaclite; -static char etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */ +static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ /* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ #ifdef CFG_ENV_IS_NOWHERE -static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; +static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; #endif -void XEmacLite_AlignedRead (u32 * SrcPtr, void *DestPtr, unsigned ByteCount) +void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) { - unsigned i; - unsigned Length = ByteCount; - u32 AlignBuffer; - u32 *To32Ptr; - u32 *From32Ptr; - u8 *To8Ptr; - u8 *From8Ptr; + unsigned int i; + u32 alignbuffer; + u32 *to32ptr; + u32 *from32ptr; + u8 *to8ptr; + u8 *from8ptr; - From32Ptr = (u32 *) SrcPtr; + from32ptr = (u32 *) srcptr; /* Word aligned buffer, no correction needed. */ - To32Ptr = (u32 *) DestPtr; - while (Length > 3) { - *To32Ptr++ = *From32Ptr++; - Length -= 4; + to32ptr = (u32 *) destptr; + while (bytecount > 3) { + *to32ptr++ = *from32ptr++; + bytecount -= 4; } - To8Ptr = (u8 *) To32Ptr; + to8ptr = (u8 *) to32ptr; - AlignBuffer = *From32Ptr++; - From8Ptr = (u8 *) & AlignBuffer; + alignbuffer = *from32ptr++; + from8ptr = (u8 *) & alignbuffer; - for (i = 0; i < Length; i++) { - *To8Ptr++ = *From8Ptr++; + for (i = 0; i < bytecount; i++) { + *to8ptr++ = *from8ptr++; } } -void XEmacLite_AlignedWrite (void *SrcPtr, u32 * DestPtr, unsigned ByteCount) +void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) { unsigned i; - unsigned Length = ByteCount; - u32 AlignBuffer; - u32 *To32Ptr; - u32 *From32Ptr; - u8 *To8Ptr; - u8 *From8Ptr; - To32Ptr = DestPtr; + u32 alignbuffer; + u32 *to32ptr = (u32 *) destptr; + u32 *from32ptr; + u8 *to8ptr; + u8 *from8ptr; - From32Ptr = (u32 *) SrcPtr; - while (Length > 3) { + from32ptr = (u32 *) srcptr; + while (bytecount > 3) { - *To32Ptr++ = *From32Ptr++; - Length -= 4; + *to32ptr++ = *from32ptr++; + bytecount -= 4; } - AlignBuffer = 0; - To8Ptr = (u8 *) & AlignBuffer; - From8Ptr = (u8 *) From32Ptr; + alignbuffer = 0; + to8ptr = (u8 *) & alignbuffer; + from8ptr = (u8 *) from32ptr; - for (i = 0; i < Length; i++) { - *To8Ptr++ = *From8Ptr++; + for (i = 0; i < bytecount; i++) { + *to8ptr++ = *from8ptr++; } - *To32Ptr++ = AlignBuffer; + *to32ptr++ = alignbuffer; } void eth_halt (void) @@ -148,37 +145,38 @@ int eth_init (bd_t * bis) #ifdef DEBUG puts ("EmacLite Initialization Started\n"); #endif - memset (&EmacLite, 0, sizeof (XEmacLite)); - EmacLite.BaseAddress = XILINX_EMACLITE_BASEADDR; + memset (&emaclite, 0, sizeof (xemaclite)); + emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; + + if (!getenv("ethaddr")) { + memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); + } -#ifdef CFG_ENV_IS_NOWHERE - memcpy (bis->bi_enetaddr, EMACAddr, ENET_ADDR_LENGTH); -#endif /* * TX - TX_PING & TX_PONG initialization */ /* Restart PING TX */ - out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0); + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); /* Copy MAC address */ - XEmacLite_AlignedWrite (bis->bi_enetaddr, - EmacLite.BaseAddress, ENET_ADDR_LENGTH); + xemaclite_alignedwrite (bis->bi_enetaddr, + emaclite.baseaddress, ENET_ADDR_LENGTH); /* Set the length */ - out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); + out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); /* Update the MAC address in the EMAC Lite */ - out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); /* Wait for EMAC Lite to finish with the MAC address update */ - while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET) & + while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; #ifdef XILINX_EMACLITE_TX_PING_PONG /* The same operation with PONG TX */ - out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); - XEmacLite_AlignedWrite (bis->bi_enetaddr, - EmacLite.BaseAddress + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); - out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); - out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); + xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress + + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); + out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, XEL_TSR_PROG_MAC_ADDR); - while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + + while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; #endif @@ -186,9 +184,9 @@ int eth_init (bd_t * bis) * RX - RX_PING & RX_PONG initialization */ /* Write out the value to flush the RX buffer */ - out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); + out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); #ifdef XILINX_EMACLITE_RX_PING_PONG - out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, + out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, XEL_RSR_RECV_IE_MASK); #endif @@ -198,39 +196,39 @@ int eth_init (bd_t * bis) return 0; } -int XEmacLite_TxBufferAvailable (XEmacLite * InstancePtr) +int xemaclite_txbufferavailable (xemaclite * instanceptr) { - u32 Register; - u32 TxPingBusy; - u32 TxPongBusy; + u32 reg; + u32 txpingbusy; + u32 txpongbusy; /* * Read the other buffer register * and determine if the other buffer is available */ - Register = in_be32 (InstancePtr->BaseAddress + - InstancePtr->NextTxBufferToUse + 0); - TxPingBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) == + reg = in_be32 (instanceptr->baseaddress + + instanceptr->nexttxbuffertouse + 0); + txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == XEL_TSR_XMIT_BUSY_MASK); - Register = in_be32 (InstancePtr->BaseAddress + - (InstancePtr->NextTxBufferToUse ^ XEL_TSR_OFFSET) + 0); - TxPongBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) == + reg = in_be32 (instanceptr->baseaddress + + (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0); + txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == XEL_TSR_XMIT_BUSY_MASK); - return (!(TxPingBusy && TxPongBusy)); + return (!(txpingbusy && txpongbusy)); } int eth_send (volatile void *ptr, int len) { - unsigned int Register; - unsigned int BaseAddress; + unsigned int reg; + unsigned int baseaddress; unsigned maxtry = 1000; if (len > ENET_MAX_MTU) len = ENET_MAX_MTU; - while (!XEmacLite_TxBufferAvailable (&EmacLite) && maxtry) { + while (!xemaclite_txbufferavailable (&emaclite) && maxtry) { udelay (10); maxtry--; } @@ -238,62 +236,62 @@ int eth_send (volatile void *ptr, int len) { if (!maxtry) { printf ("Error: Timeout waiting for ethernet TX buffer\n"); /* Restart PING TX */ - out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0); + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); #ifdef XILINX_EMACLITE_TX_PING_PONG - out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + + out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); #endif return 0; } /* Determine the expected TX buffer address */ - BaseAddress = (EmacLite.BaseAddress + EmacLite.NextTxBufferToUse); + baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse); /* Determine if the expected buffer address is empty */ - Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); - if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET) + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) + && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { #ifdef XILINX_EMACLITE_TX_PING_PONG - EmacLite.NextTxBufferToUse ^= XEL_BUFFER_OFFSET; + emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET; #endif #ifdef DEBUG - printf ("Send packet from 0x%x\n", BaseAddress); + printf ("Send packet from 0x%x\n", baseaddress); #endif /* Write the frame to the buffer */ - XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len); - out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len & + xemaclite_alignedwrite ((void *) ptr, baseaddress, len); + out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); - Register |= XEL_TSR_XMIT_BUSY_MASK; - if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) { - Register |= XEL_TSR_XMIT_ACTIVE_MASK; + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + reg |= XEL_TSR_XMIT_BUSY_MASK; + if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { + reg |= XEL_TSR_XMIT_ACTIVE_MASK; } - out_be32 (BaseAddress + XEL_TSR_OFFSET, Register); + out_be32 (baseaddress + XEL_TSR_OFFSET, reg); return 1; } #ifdef XILINX_EMACLITE_TX_PING_PONG /* Switch to second buffer */ - BaseAddress ^= XEL_BUFFER_OFFSET; + baseaddress ^= XEL_BUFFER_OFFSET; /* Determine if the expected buffer address is empty */ - Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); - if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET) + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) + && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { #ifdef DEBUG - printf ("Send packet from 0x%x\n", BaseAddress); + printf ("Send packet from 0x%x\n", baseaddress); #endif /* Write the frame to the buffer */ - XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len); - out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len & + xemaclite_alignedwrite ((void *) ptr, baseaddress, len); + out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); - Register |= XEL_TSR_XMIT_BUSY_MASK; - if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) { - Register |= XEL_TSR_XMIT_ACTIVE_MASK; + reg = in_be32 (baseaddress + XEL_TSR_OFFSET); + reg |= XEL_TSR_XMIT_BUSY_MASK; + if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { + reg |= XEL_TSR_XMIT_ACTIVE_MASK; } - out_be32 (BaseAddress + XEL_TSR_OFFSET, Register); + out_be32 (baseaddress + XEL_TSR_OFFSET, reg); return 1; } #endif @@ -303,50 +301,50 @@ int eth_send (volatile void *ptr, int len) { int eth_rx (void) { - unsigned int Length; - unsigned int Register; - unsigned int BaseAddress; + unsigned int length; + unsigned int reg; + unsigned int baseaddress; - BaseAddress = EmacLite.BaseAddress + EmacLite.NextRxBufferToUse; - Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); + baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; + reg = in_be32 (baseaddress + XEL_RSR_OFFSET); #ifdef DEBUG - printf ("Testing data at address 0x%x\n", BaseAddress); + printf ("Testing data at address 0x%x\n", baseaddress); #endif - if ((Register & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { + if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { #ifdef XILINX_EMACLITE_RX_PING_PONG - EmacLite.NextRxBufferToUse ^= XEL_BUFFER_OFFSET; + emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET; #endif } else { #ifndef XILINX_EMACLITE_RX_PING_PONG #ifdef DEBUG - printf ("No data was available - address 0x%x\n", BaseAddress); + printf ("No data was available - address 0x%x\n", baseaddress); #endif return 0; #else - BaseAddress ^= XEL_BUFFER_OFFSET; - Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); - if ((Register & XEL_RSR_RECV_DONE_MASK) != + baseaddress ^= XEL_BUFFER_OFFSET; + reg = in_be32 (baseaddress + XEL_RSR_OFFSET); + if ((reg & XEL_RSR_RECV_DONE_MASK) != XEL_RSR_RECV_DONE_MASK) { #ifdef DEBUG printf ("No data was available - address 0x%x\n", - BaseAddress); + baseaddress); #endif return 0; } #endif } /* Get the length of the frame that arrived */ - switch(((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0xC)) & + switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & 0xFFFF0000 ) >> 16) { case 0x806: - Length = 42 + 20; /* FIXME size of ARP */ + length = 42 + 20; /* FIXME size of ARP */ #ifdef DEBUG puts ("ARP Packet\n"); #endif break; case 0x800: - Length = 14 + 14 + - (((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0x10)) & + length = 14 + 14 + + (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & 0xFFFF0000) >> 16); /* FIXME size of IP packet */ #ifdef DEBUG puts("IP Packet\n"); @@ -356,22 +354,22 @@ int eth_rx (void) #ifdef DEBUG puts("Other Packet\n"); #endif - Length = ENET_MAX_MTU; + length = ENET_MAX_MTU; break; } - XEmacLite_AlignedRead ((BaseAddress + XEL_RXBUFF_OFFSET), - etherrxbuff, Length); + xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET), + etherrxbuff, length); /* Acknowledge the frame */ - Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); - Register &= ~XEL_RSR_RECV_DONE_MASK; - out_be32 (BaseAddress + XEL_RSR_OFFSET, Register); + reg = in_be32 (baseaddress + XEL_RSR_OFFSET); + reg &= ~XEL_RSR_RECV_DONE_MASK; + out_be32 (baseaddress + XEL_RSR_OFFSET, reg); #ifdef DEBUG - printf ("Packet receive from 0x%x, length %dB\n", BaseAddress, Length); + printf ("Packet receive from 0x%x, length %dB\n", baseaddress, length); #endif - NetReceive ((uchar *) etherrxbuff, Length); + NetReceive ((uchar *) etherrxbuff, length); return 1; } From 7aa63d8cd30ab20ac2fd1ab86e60471de8b1f1e5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Aug 2007 21:03:41 +0200 Subject: [PATCH 16/73] [FIX] Correction command definition --- fs/romfs/romfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fs/romfs/romfs.c b/fs/romfs/romfs.c index 34917bec36..15de3e18ff 100644 --- a/fs/romfs/romfs.c +++ b/fs/romfs/romfs.c @@ -26,7 +26,7 @@ #include #include -#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) +#if defined(CONFIG_CMD_JFFS2) #include #include From d1ed28cf36ab6b1d4c479809de7252bf53d2f2d4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Aug 2007 21:05:07 +0200 Subject: [PATCH 17/73] [FIX] Correction command setting for Microblaze boards --- include/configs/ml401.h | 12 ++---------- include/configs/suzaku.h | 15 +++++---------- include/configs/xupv2p.h | 19 ++++++------------- 3 files changed, 13 insertions(+), 33 deletions(-) diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 831929882a..00599391af 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Czech Technical University. * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. @@ -160,21 +160,13 @@ #include #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT -#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL -#define CONFIG_CMD_NET #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN + #if defined(FLASH) #define CONFIG_CMD_ECHO diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 22c529b690..9a2eec1bb2 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -56,21 +56,16 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_ENV +#undef CONFIG_CMD_MEMORY +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index b93b3876bc..006a132881 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -155,21 +155,14 @@ */ #include -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_NET -#define CONFIG_CMD_IMI -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_RUN -#define CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MISC -#define CONFIG_CMD_PING +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL +#define CONFIG_CMD_PING #ifdef XILINX_SYSACE_BASEADDR #define CONFIG_CMD_EXT2 From 5b4de9309d7a03aa1db2e5391ab696363391f460 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Aug 2007 21:15:05 +0200 Subject: [PATCH 18/73] [FIX] Resolve problem with warnings microblaze toolchain don't support PRAGMA PACK. --- drivers/bios_emulator/besys.c | 3 ++- drivers/bios_emulator/bios.c | 3 ++- drivers/bios_emulator/biosemu.c | 3 ++- drivers/bios_emulator/x86emu/debug.c | 3 ++- drivers/bios_emulator/x86emu/decode.c | 4 ++-- drivers/bios_emulator/x86emu/ops.c | 4 ++-- drivers/bios_emulator/x86emu/ops2.c | 4 ++-- drivers/bios_emulator/x86emu/prim_ops.c | 3 ++- drivers/bios_emulator/x86emu/sys.c | 4 ++-- 9 files changed, 18 insertions(+), 13 deletions(-) diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c index 4c4bc8d7ba..5751eeb218 100644 --- a/drivers/bios_emulator/besys.c +++ b/drivers/bios_emulator/besys.c @@ -47,9 +47,10 @@ * ****************************************************************************/ +#if defined(CONFIG_BIOSEMU) + #include "biosemui.h" -#if defined(CONFIG_BIOSEMU) /*------------------------- Global Variables ------------------------------*/ #ifndef __i386__ diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c index 7aa1bfb2eb..d9ccbf8cd0 100644 --- a/drivers/bios_emulator/bios.c +++ b/drivers/bios_emulator/bios.c @@ -41,9 +41,10 @@ * ****************************************************************************/ +#if defined(CONFIG_BIOSEMU) + #include "biosemui.h" -#if defined(CONFIG_BIOSEMU) /*----------------------------- Implementation ----------------------------*/ /**************************************************************************** diff --git a/drivers/bios_emulator/biosemu.c b/drivers/bios_emulator/biosemu.c index 4c3aedf413..5ab9e74c38 100644 --- a/drivers/bios_emulator/biosemu.c +++ b/drivers/bios_emulator/biosemu.c @@ -45,11 +45,12 @@ * ****************************************************************************/ -#include "biosemui.h" #include #if defined(CONFIG_BIOSEMU) +#include "biosemui.h" + BE_sysEnv _BE_env = {{0}}; static X86EMU_memFuncs _BE_mem __attribute__((section(".got2"))) = { BE_rdb, diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c index 915739c5b0..3acc7e5008 100644 --- a/drivers/bios_emulator/x86emu/debug.c +++ b/drivers/bios_emulator/x86emu/debug.c @@ -37,11 +37,12 @@ * ****************************************************************************/ -#include "x86emu/x86emui.h" #include #if defined(CONFIG_BIOSEMU) +#include "x86emu/x86emui.h" + /*----------------------------- Implementation ----------------------------*/ #ifdef DEBUG diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c index 879f0a06d1..915645c083 100644 --- a/drivers/bios_emulator/x86emu/decode.c +++ b/drivers/bios_emulator/x86emu/decode.c @@ -37,10 +37,10 @@ * ****************************************************************************/ -#include "x86emu/x86emui.h" - #if defined(CONFIG_BIOSEMU) +#include "x86emu/x86emui.h" + /*----------------------------- Implementation ----------------------------*/ /**************************************************************************** diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c index d334fb5b1c..ff2f11963c 100644 --- a/drivers/bios_emulator/x86emu/ops.c +++ b/drivers/bios_emulator/x86emu/ops.c @@ -75,10 +75,10 @@ * ****************************************************************************/ -#include "x86emu/x86emui.h" - #if defined(CONFIG_BIOSEMU) +#include "x86emu/x86emui.h" + /*----------------------------- Implementation ----------------------------*/ /* constant arrays to do several instructions in just one function */ diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c index 81c0d49a33..c8b8517192 100644 --- a/drivers/bios_emulator/x86emu/ops2.c +++ b/drivers/bios_emulator/x86emu/ops2.c @@ -44,10 +44,10 @@ * ****************************************************************************/ -#include "x86emu/x86emui.h" - #if defined(CONFIG_BIOSEMU) +#include "x86emu/x86emui.h" + /*----------------------------- Implementation ----------------------------*/ /**************************************************************************** diff --git a/drivers/bios_emulator/x86emu/prim_ops.c b/drivers/bios_emulator/x86emu/prim_ops.c index c1152eae34..b3d82bb052 100644 --- a/drivers/bios_emulator/x86emu/prim_ops.c +++ b/drivers/bios_emulator/x86emu/prim_ops.c @@ -98,10 +98,11 @@ ****************************************************************************/ #define PRIM_OPS_NO_REDEFINE_ASM -#include "x86emu/x86emui.h" #if defined(CONFIG_BIOSEMU) +#include "x86emu/x86emui.h" + /*------------------------- Global Variables ------------------------------*/ static u32 x86emu_parity_tab[8] = diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c index 566389f586..6324cd3439 100644 --- a/drivers/bios_emulator/x86emu/sys.c +++ b/drivers/bios_emulator/x86emu/sys.c @@ -39,10 +39,10 @@ * ****************************************************************************/ -#include "x86emu/x86emui.h" - #if defined(CONFIG_BIOSEMU) +#include "x86emu/x86emui.h" + /*------------------------- Global Variables ------------------------------*/ X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */ From 6e0e2253f039344f8ebd2787285fdba90e6714e8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 16 Aug 2007 10:45:09 +0200 Subject: [PATCH 19/73] [FIX] Remove unused include file --- drivers/net/xilinx_emac.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/net/xilinx_emac.c b/drivers/net/xilinx_emac.c index 23567cc40a..36e627aae5 100644 --- a/drivers/net/xilinx_emac.c +++ b/drivers/net/xilinx_emac.c @@ -29,7 +29,6 @@ #include #include #include -#include #include "xilinx_emac.h" #ifdef XILINX_EMAC From 78cff50edba6b1508eb15c2f53ce966ac891eb9e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 16 Aug 2007 10:46:28 +0200 Subject: [PATCH 20/73] [FIX] Changes for bios_emulator code for others architecture --- drivers/bios_emulator/besys.c | 2 ++ drivers/bios_emulator/bios.c | 2 ++ drivers/bios_emulator/biosemu.c | 1 + drivers/bios_emulator/x86emu/debug.c | 1 + drivers/bios_emulator/x86emu/decode.c | 1 + drivers/bios_emulator/x86emu/ops.c | 2 ++ drivers/bios_emulator/x86emu/ops2.c | 2 ++ drivers/bios_emulator/x86emu/prim_ops.c | 2 ++ drivers/bios_emulator/x86emu/sys.c | 2 ++ 9 files changed, 15 insertions(+) diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c index 5751eeb218..8f1d8b29d5 100644 --- a/drivers/bios_emulator/besys.c +++ b/drivers/bios_emulator/besys.c @@ -47,6 +47,8 @@ * ****************************************************************************/ +#include + #if defined(CONFIG_BIOSEMU) #include "biosemui.h" diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c index d9ccbf8cd0..70e9ce143b 100644 --- a/drivers/bios_emulator/bios.c +++ b/drivers/bios_emulator/bios.c @@ -41,6 +41,8 @@ * ****************************************************************************/ +#include + #if defined(CONFIG_BIOSEMU) #include "biosemui.h" diff --git a/drivers/bios_emulator/biosemu.c b/drivers/bios_emulator/biosemu.c index 5ab9e74c38..ccfc872f78 100644 --- a/drivers/bios_emulator/biosemu.c +++ b/drivers/bios_emulator/biosemu.c @@ -46,6 +46,7 @@ ****************************************************************************/ #include +#include #if defined(CONFIG_BIOSEMU) diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c index 3acc7e5008..5cbcc95018 100644 --- a/drivers/bios_emulator/x86emu/debug.c +++ b/drivers/bios_emulator/x86emu/debug.c @@ -38,6 +38,7 @@ ****************************************************************************/ #include +#include #if defined(CONFIG_BIOSEMU) diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c index 915645c083..7a9a1ddbff 100644 --- a/drivers/bios_emulator/x86emu/decode.c +++ b/drivers/bios_emulator/x86emu/decode.c @@ -36,6 +36,7 @@ * instruction decoding and accessess of immediate data via IP. etc. * ****************************************************************************/ +#include #if defined(CONFIG_BIOSEMU) diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c index ff2f11963c..a77bd9b492 100644 --- a/drivers/bios_emulator/x86emu/ops.c +++ b/drivers/bios_emulator/x86emu/ops.c @@ -75,6 +75,8 @@ * ****************************************************************************/ +#include + #if defined(CONFIG_BIOSEMU) #include "x86emu/x86emui.h" diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c index c8b8517192..d6a210c973 100644 --- a/drivers/bios_emulator/x86emu/ops2.c +++ b/drivers/bios_emulator/x86emu/ops2.c @@ -44,6 +44,8 @@ * ****************************************************************************/ +#include + #if defined(CONFIG_BIOSEMU) #include "x86emu/x86emui.h" diff --git a/drivers/bios_emulator/x86emu/prim_ops.c b/drivers/bios_emulator/x86emu/prim_ops.c index b3d82bb052..2a254a4e67 100644 --- a/drivers/bios_emulator/x86emu/prim_ops.c +++ b/drivers/bios_emulator/x86emu/prim_ops.c @@ -97,6 +97,8 @@ * ****************************************************************************/ +#include + #define PRIM_OPS_NO_REDEFINE_ASM #if defined(CONFIG_BIOSEMU) diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c index 6324cd3439..dd44ff1e73 100644 --- a/drivers/bios_emulator/x86emu/sys.c +++ b/drivers/bios_emulator/x86emu/sys.c @@ -39,6 +39,8 @@ * ****************************************************************************/ +#include + #if defined(CONFIG_BIOSEMU) #include "x86emu/x86emui.h" From 2c05fd125744981e5f2828d24e66ccc20a77d25d Mon Sep 17 00:00:00 2001 From: Semih Hazar Date: Mon, 20 Aug 2007 19:00:01 +0300 Subject: [PATCH 21/73] AVR32: Change prototype of memset Signed-off-by: Semih Hazar Signed-off-by: Haavard Skinnemoen --- include/asm-avr32/string.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-avr32/string.h b/include/asm-avr32/string.h index 8b05d1a031..58582a3115 100644 --- a/include/asm-avr32/string.h +++ b/include/asm-avr32/string.h @@ -23,6 +23,6 @@ #define __ASM_AVR32_STRING_H #define __HAVE_ARCH_MEMSET -extern void *memset(void *s, int c, size_t n); +extern void *memset(void *s, int c, __kernel_size_t n); #endif /* __ASM_AVR32_STRING_H */ From 04625764cc93ce8a61625ac19d7fe2a2ceee8143 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 29 Aug 2007 16:31:18 +0200 Subject: [PATCH 22/73] ppc4xx: Change lwmon5 default environment to support Linux RTC The Linux PCF8563 RTC driver doesn't do autoprobing, so we need to supply the RTC I2C address as bootline parameter. This patch adds support for this rtc probing parameter to the bootargs: "rtc-pcf8563.probe=0,0x51" Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index be483245b9..50df848139 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -200,12 +200,13 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0"\ - "flash_nfs=run nfsargs addip addtty;" \ + "addmisc=setenv bootargs ${bootargs} rtc-pcf8563.probe=0,0x51\0"\ + "flash_nfs=run nfsargs addip addtty addmisc;" \ "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty;" \ + "flash_self=run ramargs addip addtty addmisc;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "net_nfs=tftp 200000 ${bootfile};" \ + "run nfsargs addip addtty addmisc;bootm\0" \ "rootpath=/opt/eldk/ppc_4xxFP\0" \ "bootfile=/tftpboot/lwmon5/uImage\0" \ "kernel_addr=FC000000\0" \ From c88b6e1cbf9a8ae2a34fb602f78a1bf4e6692b6a Mon Sep 17 00:00:00 2001 From: Hans-Christian Egtvedt Date: Thu, 30 Aug 2007 15:03:04 +0200 Subject: [PATCH 23/73] Remove double quotation marks around MAC address for STK1002 Signed-off-by: Hans-Christian Egtvedt Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index e1d8f74c5e..65736644b6 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -103,8 +103,8 @@ * generated and assigned to the environment variables "ethaddr" and * "eth1addr". */ -#define CONFIG_ETHADDR "6a:87:71:14:cd:cb" -#define CONFIG_ETH1ADDR "ca:f8:15:e6:3e:e6" +#define CONFIG_ETHADDR 6a:87:71:14:cd:cb +#define CONFIG_ETH1ADDR ca:f8:15:e6:3e:e6 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 #define CONFIG_NET_MULTI 1 From 696dd1307cd8e73a10e9bb3c51731bfd6f837bee Mon Sep 17 00:00:00 2001 From: Hans-Christian Egtvedt Date: Thu, 30 Aug 2007 15:03:05 +0200 Subject: [PATCH 24/73] Reduce BOOTDELAY variable to 1 second by default for STK1002 Signed-off-by: Hans-Christian Egtvedt Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 65736644b6..f7bf62c825 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -87,7 +87,7 @@ * Only interrupt autoboot if is pressed. Otherwise, garbage * data on the serial line may interrupt the boot sequence. */ -#define CONFIG_BOOTDELAY 2 +#define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 #define CONFIG_AUTOBOOT_PROMPT \ From 557ab89d294f08dd532f21d19861b40093200a33 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 4 Sep 2007 14:23:50 +0100 Subject: [PATCH 25/73] Rename CONFIG_CMD_MUX to CONFIG_CMD_AT91_SPIMUX --- include/config_cmd_all.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 => 100755 include/config_cmd_all.h diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h old mode 100644 new mode 100755 index 3d91e99b97..77ea025c09 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -76,6 +76,6 @@ #define CONFIG_CMD_USB /* USB Support */ #define CONFIG_CMD_VFD /* VFD support (TRAB) */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ -#define CONFIG_CMD_MUX /* AT91 MMC/SPI Mux Support */ +#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ #endif /* _CONFIG_CMD_ALL_H */ From 6e4bf9b24e57c15abc6542e685d06380bc64af27 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 4 Sep 2007 14:25:51 +0100 Subject: [PATCH 26/73] Ran Lindent on drivers/at45.c --- drivers/at45.c | 334 ++++++++++++++++++++++++------------------------- 1 file changed, 162 insertions(+), 172 deletions(-) diff --git a/drivers/at45.c b/drivers/at45.c index 507ff36d47..f48d31776f 100755 --- a/drivers/at45.c +++ b/drivers/at45.c @@ -27,50 +27,49 @@ /* * spi.c API */ -extern unsigned int AT91F_SpiWrite (AT91PS_DataflashDesc pDesc); -extern void AT91F_SpiEnable(int cs); +extern unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc); +extern void AT91F_SpiEnable(int cs); #define AT91C_TIMEOUT_WRDY 200000 - /*----------------------------------------------------------------------*/ /* \fn AT91F_DataFlashSendCommand */ /* \brief Generic function to send a command to the dataflash */ /*----------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashSendCommand( - AT91PS_DataFlash pDataFlash, - unsigned char OpCode, - unsigned int CmdSize, - unsigned int DataflashAddress) +AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, + unsigned char OpCode, + unsigned int CmdSize, + unsigned int DataflashAddress) { unsigned int adr; - if ( (pDataFlash->pDataFlashDesc->state) != IDLE) + if ((pDataFlash->pDataFlashDesc->state) != IDLE) return DATAFLASH_BUSY; /* process the address to obtain page address and byte address */ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << - pDataFlash->pDevice->page_offset) + (DataflashAddress % - (pDataFlash->pDevice->pages_size)); + pDataFlash->pDevice->page_offset) + (DataflashAddress % + (pDataFlash->pDevice-> + pages_size)); /* fill the command buffer */ pDataFlash->pDataFlashDesc->command[0] = OpCode; if (pDataFlash->pDevice->pages_number >= 16384) { pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x0F000000) >> 24); + (unsigned char)((adr & 0x0F000000) >> 24); pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x00FF0000) >> 16); + (unsigned char)((adr & 0x00FF0000) >> 16); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((adr & 0x0000FF00) >> 8); + (unsigned char)((adr & 0x0000FF00) >> 8); pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)(adr & 0x000000FF); + (unsigned char)(adr & 0x000000FF); } else { pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x00FF0000) >> 16); + (unsigned char)((adr & 0x00FF0000) >> 16); pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x0000FF00) >> 8); + (unsigned char)((adr & 0x0000FF00) >> 8); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(adr & 0x000000FF); + (unsigned char)(adr & 0x000000FF); pDataFlash->pDataFlashDesc->command[4] = 0; } pDataFlash->pDataFlashDesc->command[5] = 0; @@ -78,16 +77,16 @@ AT91S_DataFlashStatus AT91F_DataFlashSendCommand( pDataFlash->pDataFlashDesc->command[7] = 0; /* Initialize the SpiData structure for the spi write fuction */ - pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; - pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize; - pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; - pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize; + pDataFlash->pDataFlashDesc->tx_cmd_pt = + pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize; + pDataFlash->pDataFlashDesc->rx_cmd_pt = + pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize; /* send the command and read the data */ - return AT91F_SpiWrite (pDataFlash->pDataFlashDesc); } - + return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); +} /*----------------------------------------------------------------------*/ /* \fn AT91F_DataFlashGetStatus */ @@ -98,50 +97,49 @@ AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc) AT91S_DataFlashStatus status; /* if a transfert is in progress ==> return 0 */ - if( (pDesc->state) != IDLE) + if ((pDesc->state) != IDLE) return DATAFLASH_BUSY; /* first send the read status command (D7H) */ pDesc->command[0] = DB_STATUS; pDesc->command[1] = 0; - pDesc->DataFlash_state = GET_STATUS; - pDesc->tx_data_size = 0; /* Transmit the command */ - /* and receive response */ - pDesc->tx_cmd_pt = pDesc->command; - pDesc->rx_cmd_pt = pDesc->command; - pDesc->rx_cmd_size = 2; - pDesc->tx_cmd_size = 2; - status = AT91F_SpiWrite (pDesc); + pDesc->DataFlash_state = GET_STATUS; + pDesc->tx_data_size = 0; /* Transmit the command */ + /* and receive response */ + pDesc->tx_cmd_pt = pDesc->command; + pDesc->rx_cmd_pt = pDesc->command; + pDesc->rx_cmd_size = 2; + pDesc->tx_cmd_size = 2; + status = AT91F_SpiWrite(pDesc); - pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1); + pDesc->DataFlash_state = *((unsigned char *)(pDesc->rx_cmd_pt) + 1); return status; } - /*----------------------------------------------------------------------*/ /* \fn AT91F_DataFlashWaitReady */ /* \brief wait for dataflash ready (bit7 of the status register == 1) */ /*----------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc -pDataFlashDesc, unsigned int timeout) + pDataFlashDesc, + unsigned int timeout) { pDataFlashDesc->DataFlash_state = IDLE; do { AT91F_DataFlashGetStatus(pDataFlashDesc); timeout--; - } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && - (timeout > 0) ); + } while (((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && + (timeout > 0)); - if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) + if ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) return DATAFLASH_ERROR; return DATAFLASH_OK; } - /*--------------------------------------------------------------------------*/ /* Function Name : AT91F_DataFlashContinuousRead */ /* Object : Continuous stream Read */ @@ -151,17 +149,16 @@ pDataFlashDesc, unsigned int timeout) /* : = data buffer size */ /* Return value : State of the dataflash */ /*--------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashContinuousRead ( - AT91PS_DataFlash pDataFlash, - int src, - unsigned char *dataBuffer, - int sizeToRead ) +AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(AT91PS_DataFlash pDataFlash, + int src, + unsigned char *dataBuffer, + int sizeToRead) { AT91S_DataFlashStatus status; /* Test the size to read in the device */ - if ( (src + sizeToRead) > - (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) + if ((src + sizeToRead) > + (pDataFlash->pDevice->pages_size * + (pDataFlash->pDevice->pages_number))) return DATAFLASH_MEMORY_OVERFLOW; pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; @@ -170,12 +167,11 @@ AT91S_DataFlashStatus AT91F_DataFlashContinuousRead ( pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead; status = AT91F_DataFlashSendCommand - (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); + (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); /* Send the command to the dataflash */ - return(status); + return (status); } - /*---------------------------------------------------------------------------*/ /* Function Name : AT91F_DataFlashPagePgmBuf */ /* Object : Main memory page program thru buffer 1 or buffer 2 */ @@ -185,11 +181,10 @@ AT91S_DataFlashStatus AT91F_DataFlashContinuousRead ( /* : = data buffer size */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int SizeToWrite) +AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash, + unsigned char *src, + unsigned int dest, + unsigned int SizeToWrite) { int cmdsize; pDataFlash->pDataFlashDesc->tx_data_pt = src; @@ -201,9 +196,9 @@ AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf( /* Send the command to the dataflash */ if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, -cmdsize, dest)); } - + return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_PGM_BUF1, + cmdsize, dest)); +} /*---------------------------------------------------------------------------*/ /* Function Name : AT91F_MainMemoryToBufferTransfert */ @@ -213,15 +208,16 @@ cmdsize, dest)); } /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int page) +AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(AT91PS_DataFlash + pDataFlash, + unsigned char + BufferCommand, + unsigned int page) { int cmdsize; /* Test if the buffer command is legal */ if ((BufferCommand != DB_PAGE_2_BUF1_TRF) - && (BufferCommand != DB_PAGE_2_BUF2_TRF)) + && (BufferCommand != DB_PAGE_2_BUF2_TRF)) return DATAFLASH_BAD_COMMAND; /* no data to transmit or receive */ @@ -229,11 +225,11 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, -page*pDataFlash->pDevice->pages_size)); + return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, + page * + pDataFlash->pDevice->pages_size)); } - /*-------------------------------------------------------------------------- */ /* Function Name : AT91F_DataFlashWriteBuffer */ /* Object : Write data to the internal sram buffer 1 or 2 */ @@ -244,58 +240,59 @@ page*pDataFlash->pDevice->pages_size)); /* : = data buffer size */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer ( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned char *dataBuffer, - unsigned int bufferAddress, - int SizeToWrite ) +AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(AT91PS_DataFlash pDataFlash, + unsigned char BufferCommand, + unsigned char *dataBuffer, + unsigned int bufferAddress, + int SizeToWrite) { int cmdsize; /* Test if the buffer command is legal */ if ((BufferCommand != DB_BUF1_WRITE) - && (BufferCommand != DB_BUF2_WRITE)) + && (BufferCommand != DB_BUF2_WRITE)) return DATAFLASH_BAD_COMMAND; /* buffer address must be lower than page size */ if (bufferAddress > pDataFlash->pDevice->pages_size) return DATAFLASH_BAD_ADDRESS; - if ( (pDataFlash->pDataFlashDesc->state) != IDLE) + if ((pDataFlash->pDataFlashDesc->state) != IDLE) return DATAFLASH_BUSY; /* Send first Write Command */ pDataFlash->pDataFlashDesc->command[0] = BufferCommand; pDataFlash->pDataFlashDesc->command[1] = 0; if (pDataFlash->pDevice->pages_number >= 16384) { - pDataFlash->pDataFlashDesc->command[2] = 0; - pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice->byte_mask)) >> 8); - pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); + pDataFlash->pDataFlashDesc->command[2] = 0; + pDataFlash->pDataFlashDesc->command[3] = + (unsigned char)(((unsigned int)(bufferAddress & + pDataFlash->pDevice-> + byte_mask)) >> 8); + pDataFlash->pDataFlashDesc->command[4] = + (unsigned char)((unsigned int)bufferAddress & 0x00FF); cmdsize = 5; } else { - pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice->byte_mask)) >> 8); - pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); - pDataFlash->pDataFlashDesc->command[4] = 0; + pDataFlash->pDataFlashDesc->command[2] = + (unsigned char)(((unsigned int)(bufferAddress & + pDataFlash->pDevice-> + byte_mask)) >> 8); + pDataFlash->pDataFlashDesc->command[3] = + (unsigned char)((unsigned int)bufferAddress & 0x00FF); + pDataFlash->pDataFlashDesc->command[4] = 0; cmdsize = 4; } - pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->tx_cmd_pt = + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize; - pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->rx_cmd_pt = + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize; - pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite; - pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite; + pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; + pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; + pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite; + pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite; return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); } @@ -308,23 +305,22 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer ( /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PageErase( - AT91PS_DataFlash pDataFlash, - unsigned int page) +AT91S_DataFlashStatus AT91F_PageErase(AT91PS_DataFlash pDataFlash, + unsigned int page) { int cmdsize; /* Test if the buffer command is legal */ /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; + pDataFlash->pDataFlashDesc->tx_data_size = 0; cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, -page*pDataFlash->pDevice->pages_size)); + return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_ERASE, cmdsize, + page * + pDataFlash->pDevice->pages_size)); } - /*---------------------------------------------------------------------------*/ /* Function Name : AT91F_BlockErase */ /* Object : Erase a Block */ @@ -333,19 +329,19 @@ page*pDataFlash->pDevice->pages_size)); /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_BlockErase( - AT91PS_DataFlash pDataFlash, - unsigned int block) +AT91S_DataFlashStatus AT91F_BlockErase(AT91PS_DataFlash pDataFlash, + unsigned int block) { int cmdsize; /* Test if the buffer command is legal */ /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; + pDataFlash->pDataFlashDesc->tx_data_size = 0; cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, -block*8*pDataFlash->pDevice->pages_size)); + return (AT91F_DataFlashSendCommand(pDataFlash, DB_BLOCK_ERASE, cmdsize, + block * 8 * + pDataFlash->pDevice->pages_size)); } /*---------------------------------------------------------------------------*/ @@ -356,17 +352,16 @@ block*8*pDataFlash->pDevice->pages_size)); /* : = main memory address */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_WriteBufferToMain ( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int dest ) +AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, + unsigned char BufferCommand, + unsigned int dest) { int cmdsize; /* Test if the buffer command is correct */ if ((BufferCommand != DB_BUF1_PAGE_PGM) && (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && (BufferCommand != DB_BUF2_PAGE_PGM) && - (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) ) + (BufferCommand != DB_BUF2_PAGE_ERASE_PGM)) return DATAFLASH_BAD_COMMAND; /* no data to transmit or receive */ @@ -376,9 +371,9 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain ( if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; /* Send the command to the dataflash */ - return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, - dest)); } - + return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, + dest)); +} /*---------------------------------------------------------------------------*/ /* Function Name : AT91F_PartialPageWrite */ @@ -387,11 +382,10 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain ( /* : = adr to begin the fading */ /* : = Number of bytes to erase */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PartialPageWrite ( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int size) +AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, + unsigned char *src, + unsigned int dest, + unsigned int size) { unsigned int page; unsigned int AdrInPage; @@ -400,28 +394,28 @@ AT91S_DataFlashStatus AT91F_PartialPageWrite ( AdrInPage = dest % (pDataFlash->pDevice->pages_size); /* Read the contents of the page in the Sram Buffer */ - AT91F_MainMemoryToBufferTransfert(pDataFlash, - DB_PAGE_2_BUF1_TRF, page); + AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); /*Update the SRAM buffer */ AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, - AdrInPage, size); + AdrInPage, size); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); /* Erase page if a 128 Mbits device */ if (pDataFlash->pDevice->pages_number >= 16384) { AT91F_PageErase(pDataFlash, page); /* Rewrite the modified Sram Buffer in the main memory */ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); } /* Rewrite the modified Sram Buffer in the main memory */ - return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, - (page*pDataFlash->pDevice->pages_size))); + return (AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, + (page * + pDataFlash->pDevice->pages_size))); } /*---------------------------------------------------------------------------*/ @@ -431,11 +425,9 @@ AT91S_DataFlashStatus AT91F_PartialPageWrite ( /* : = dataflash adress */ /* : = data buffer size */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWrite( - AT91PS_DataFlash pDataFlash, - unsigned char *src, - int dest, - int size ) +AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, + unsigned char *src, + int dest, int size) { unsigned int length; unsigned int page; @@ -443,26 +435,24 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite( AT91F_SpiEnable(pDataFlash->pDevice->cs); - if ( (dest + size) > (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) + if ((dest + size) > (pDataFlash->pDevice->pages_size * + (pDataFlash->pDevice->pages_number))) return DATAFLASH_MEMORY_OVERFLOW; /* If destination does not fit a page start address */ - if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) - { + if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) { length = pDataFlash->pDevice->pages_size - - (dest % - ((unsigned int) - (pDataFlash->pDevice->pages_size))); + (dest % ((unsigned int) + (pDataFlash->pDevice->pages_size))); if (size < length) length = size; - if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length)) + if (!AT91F_PartialPageWrite(pDataFlash, src, dest, length)) return DATAFLASH_ERROR; AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); /* Update size, source and destination pointers */ size -= length; @@ -470,78 +460,77 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite( src += length; } - while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) { + while ((size - pDataFlash->pDevice->pages_size) >= 0) { /* program dataflash page */ page = (unsigned int)dest / (pDataFlash->pDevice->pages_size); status = AT91F_DataFlashWriteBuffer(pDataFlash, - DB_BUF1_WRITE, src, 0, - pDataFlash->pDevice->pages_size); + DB_BUF1_WRITE, src, 0, + pDataFlash->pDevice-> + pages_size); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); status = AT91F_PageErase(pDataFlash, page); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); if (!status) return DATAFLASH_ERROR; - status = AT91F_WriteBufferToMain (pDataFlash, - DB_BUF1_PAGE_PGM, dest); - if(!status) + status = AT91F_WriteBufferToMain(pDataFlash, + DB_BUF1_PAGE_PGM, dest); + if (!status) return DATAFLASH_ERROR; AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); /* Update size, source and destination pointers */ size -= pDataFlash->pDevice->pages_size; dest += pDataFlash->pDevice->pages_size; - src += pDataFlash->pDevice->pages_size; + src += pDataFlash->pDevice->pages_size; } /* If still some bytes to read */ - if ( size > 0 ) { + if (size > 0) { /* program dataflash page */ - if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) ) + if (!AT91F_PartialPageWrite(pDataFlash, src, dest, size)) return DATAFLASH_ERROR; AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); } return DATAFLASH_OK; } - /*---------------------------------------------------------------------------*/ /* Function Name : AT91F_DataFlashRead */ /* Object : Read a block in dataflash */ /* Input Parameters : */ /* Return value : */ /*---------------------------------------------------------------------------*/ -int AT91F_DataFlashRead( - AT91PS_DataFlash pDataFlash, - unsigned long addr, - unsigned long size, - char *buffer) +int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash, + unsigned long addr, unsigned long size, char *buffer) { unsigned long SizeToRead; AT91F_SpiEnable(pDataFlash->pDevice->cs); - if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) + if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, + AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) return -1; while (size) { - SizeToRead = (size < 0x8000)? size:0x8000; + SizeToRead = (size < 0x8000) ? size : 0x8000; if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) + AT91C_TIMEOUT_WRDY) != + DATAFLASH_OK) return -1; - if (AT91F_DataFlashContinuousRead (pDataFlash, addr, - (uchar *) buffer, SizeToRead) != DATAFLASH_OK) + if (AT91F_DataFlashContinuousRead(pDataFlash, addr, + (uchar *) buffer, + SizeToRead) != DATAFLASH_OK) return -1; size -= SizeToRead; @@ -558,9 +547,10 @@ int AT91F_DataFlashRead( /* Input Parameters : */ /* Return value : Dataflash status register */ /*---------------------------------------------------------------------------*/ -int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc) { +int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc) +{ AT91F_SpiEnable(cs); AT91F_DataFlashGetStatus(pDesc); - return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C); + return ((pDesc->command[1] == 0xFF) ? 0 : pDesc->command[1] & 0x3C); } #endif From 7462fe0d5a9d40cde083fb1a3cd73911996b5ecb Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 4 Sep 2007 14:49:28 +0100 Subject: [PATCH 27/73] Move include/led.h to board/at91rm9200dk --- {include => board/at91rm9200dk}/led.h | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename {include => board/at91rm9200dk}/led.h (100%) diff --git a/include/led.h b/board/at91rm9200dk/led.h similarity index 100% rename from include/led.h rename to board/at91rm9200dk/led.h From 9f5c3d3720e777a572dcdc8af2008b44c7243885 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 4 Sep 2007 16:18:38 +0100 Subject: [PATCH 28/73] Add coloured led interface for ARM boards. Use it in cpu/arm920t/start.S to indicate U-Boot code has been entered. --- cpu/arm920t/start.S | 14 +++++------ {board/at91rm9200dk => include/asm-arm}/led.h | 2 +- lib_arm/board.c | 24 +++++++++++++++++++ 3 files changed, 31 insertions(+), 9 deletions(-) mode change 100644 => 100755 cpu/arm920t/start.S rename {board/at91rm9200dk => include/asm-arm}/led.h (97%) mode change 100644 => 100755 mode change 100644 => 100755 lib_arm/board.c diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S old mode 100644 new mode 100755 index b9c364bc67..1bc6099b4e --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,9 +27,7 @@ #include #include -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) -#include -#endif +#include /* ************************************************************************* @@ -117,13 +115,13 @@ reset: bic r0,r0,#0x1f orr r0,r0,#0xd3 msr cpsr,r0 - -#if CONFIG_AT91RM9200 -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) - bl LED_init + /* + * if board has a red led use it to show U-Boot is running + */ + bl coloured_LED_init bl red_LED_on -#endif +#ifdef CONFIG_AT91RM9200 #ifdef CONFIG_BOOTBINFUNC /* code based on entry.S from ATMEL */ #define AT91C_BASE_CKGR 0xFFFFFC20 diff --git a/board/at91rm9200dk/led.h b/include/asm-arm/led.h old mode 100644 new mode 100755 similarity index 97% rename from board/at91rm9200dk/led.h rename to include/asm-arm/led.h index 57c2b4a377..f78a4b1004 --- a/board/at91rm9200dk/led.h +++ b/include/asm-arm/led.h @@ -26,7 +26,7 @@ #define __LED_H #ifndef __ASSEMBLY__ -extern void LED_init (void); +extern void coloured_LED_init (void); extern void red_LED_on(void); extern void red_LED_off(void); extern void green_LED_on(void); diff --git a/lib_arm/board.c b/lib_arm/board.c old mode 100644 new mode 100755 index d37e5dab35..6b49925a59 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -111,6 +111,30 @@ void *sbrk (ptrdiff_t increment) return ((void *) old); } +/************************************************************************ + * Coloured LED functionality + ************************************************************************ + * May be supplied by boards if desired + */ +void inline __coloured_LED_init (void) {} +void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); +void inline __red_LED_on (void) {} +void inline red_LED_on (void) __attribute__((weak, alias("__red_LED_on"))); +void inline __red_LED_off(void) {} +void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); +void inline __green_LED_on(void) {} +void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); +void inline __green_LED_off(void) {} +void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); +void inline __yellow_LED_on(void) {} +void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); +void inline __yellow_LED_off(void) {} +void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); + + + + + /************************************************************************ * Init Utilities * ************************************************************************ From 80767a6cead9990d9e77e62be947843c2c72f469 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Wed, 5 Sep 2007 16:04:41 +0100 Subject: [PATCH 29/73] Changed API name to coloured_led.h Removed code using deprecated ifdef CONFIG_BOOTBINFUNC Tidied other cpu/arm920t/start.S code --- board/at91rm9200dk/led.c | 2 +- cpu/arm920t/start.S | 126 ++++------------------ include/asm-arm/{led.h => coloured_led.h} | 0 3 files changed, 22 insertions(+), 106 deletions(-) rename include/asm-arm/{led.h => coloured_led.h} (100%) diff --git a/board/at91rm9200dk/led.c b/board/at91rm9200dk/led.c index 051891883f..47a3bfce68 100644 --- a/board/at91rm9200dk/led.c +++ b/board/at91rm9200dk/led.c @@ -66,7 +66,7 @@ void red_LED_off(void) } -void LED_init (void) +void coloured_LED_init (void) { AT91PS_PIO PIOB = AT91C_BASE_PIOB; AT91PS_PMC PMC = AT91C_BASE_PMC; diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 1bc6099b4e..df2ee20cbe 100755 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,7 +27,7 @@ #include #include -#include +#include /* ************************************************************************* @@ -39,7 +39,7 @@ .globl _start -_start: b reset +_start: b start_code ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -62,7 +62,7 @@ _fiq: .word fiq /* ************************************************************************* * - * Startup Code (reset vector) + * Startup Code (called from the ARM reset exception vector) * * do important init only if we don't start from memory! * relocate armboot to ram @@ -104,10 +104,10 @@ FIQ_STACK_START: /* - * the actual reset code + * the actual start code */ -reset: +start_code: /* * set the cpu to SVC32 mode */ @@ -115,59 +115,13 @@ reset: bic r0,r0,#0x1f orr r0,r0,#0xd3 msr cpsr,r0 - /* - * if board has a red led use it to show U-Boot is running - */ + bl coloured_LED_init bl red_LED_on -#ifdef CONFIG_AT91RM9200 -#ifdef CONFIG_BOOTBINFUNC -/* code based on entry.S from ATMEL */ -#define AT91C_BASE_CKGR 0xFFFFFC20 -#define CKGR_MOR 0 - /* Get the CKGR Base Address */ - ldr r1, =AT91C_BASE_CKGR - -/* Main oscillator Enable register APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */ -/* ldr r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */ - ldr r0, =0x0000FF01 - str r0, [r1, #CKGR_MOR] - /* Add loop to compensate Main Oscillator startup time */ - ldr r0, =0x00000010 -LoopOsc: - subs r0, r0, #1 - bhi LoopOsc - /* scratch stack */ - ldr r1, =0x00204000 - /* Insure word alignment */ - bic r1, r1, #3 - /* Init stack SYS */ - mov sp, r1 +#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) /* - * This does a lot more than just set up the memory, which - * is why it's called lowlevelinit - */ - bl lowlevelinit /* in memsetup.S */ - bl icache_enable; - /* ------------------------------------ - * Read/modify/write CP15 control register - * ------------------------------------- - * read cp15 control register (cp15 r1) in r0 - * ------------------------------------ - */ - mrc p15, 0, r0, c1, c0, 0 - /* Reset bit :Little Endian end fast bus mode */ - ldr r3, =0xC0000080 - /* Set bit :Asynchronous clock mode, Not Fast Bus */ - ldr r4, =0xC0000000 - bic r0, r0, r3 - orr r0, r0, r4 - /* write r0 in cp15 control register (cp15 r1) */ - mcr p15, 0, r0, c1, c0, 0 -#endif /* CONFIG_BOOTBINFUNC */ - /* - * relocate exeception table + * relocate exception table */ ldr r0, =_start ldr r1, =0x0 @@ -179,19 +133,20 @@ copyex: bne copyex #endif -/* turn off the watchdog */ -#if defined(CONFIG_S3C2400) -# define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ -# define CLKDIVN 0x14800014 /* clock divisor register */ -#elif defined(CONFIG_S3C2410) -# define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ -# define INTSUBMSK 0x4A00001C -# define CLKDIVN 0x4C000014 /* clock divisor register */ -#endif - #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) + /* turn off the watchdog */ + +# if defined(CONFIG_S3C2400) +# define pWTCON 0x15300000 +# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ +# define CLKDIVN 0x14800014 /* clock divisor register */ +#else +# define pWTCON 0x53000000 +# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ +# define INTSUBMSK 0x4A00001C +# define CLKDIVN 0x4C000014 /* clock divisor register */ +# endif + ldr r0, =pWTCON mov r1, #0x0 str r1, [r0] @@ -224,25 +179,7 @@ copyex: #endif #ifdef CONFIG_AT91RM9200 -#ifdef CONFIG_BOOTBINFUNC -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end addreee [r2] */ - ble copy_loop -#endif /* CONFIG_BOOTBINFUNC */ -#else #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -282,27 +219,6 @@ clbss_l:str r2, [r0] /* clear loop... */ cmp r0, r1 ble clbss_l -#if 0 - /* try doing this stuff after the relocation */ - ldr r0, =pWTCON - mov r1, #0x0 - str r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTMR - default - */ - mov r1, #0xffffffff - ldr r0, =INTMR - str r1, [r0] - - /* FCLK:HCLK:PCLK = 1:2:4 */ - /* default FCLK is 120 MHz ! */ - ldr r0, =CLKDIVN - mov r1, #3 - str r1, [r0] - /* END stuff after relocation */ -#endif - ldr pc, _start_armboot _start_armboot: .word start_armboot diff --git a/include/asm-arm/led.h b/include/asm-arm/coloured_led.h similarity index 100% rename from include/asm-arm/led.h rename to include/asm-arm/coloured_led.h From d45963854eff39d575124d859419bb4953ce2c87 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 11 Sep 2007 00:37:04 +0200 Subject: [PATCH 30/73] [FIX] Microblaze ML401 - repare FLASH handling --- include/configs/ml401.h | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 00599391af..74fe88867e 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -146,6 +146,16 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ +/* system ace */ +#ifdef XILINX_SYSACE_BASEADDR + #define CONFIG_SYSTEMACE + /* #define DEBUG_SYSTEMACE */ + #define SYSTEMACE_CONFIG_FPGA + #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR + #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH + #define CONFIG_DOS_PARTITION +#endif + /* * BOOTP options */ @@ -161,12 +171,14 @@ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT #define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL #define CONFIG_CMD_PING +#if defined(CONFIG_SYSTEMACE) + #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_FAT +#endif #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -178,6 +190,8 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif +#else + #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -212,14 +226,6 @@ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 -/* system ace */ -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION - #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ From d94c79e47011af5e8dd10ed6163c09b4cfc743cc Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 11 Sep 2007 15:35:01 +0100 Subject: [PATCH 31/73] Final tidy --- cpu/arm920t/start.S | 0 include/asm-arm/coloured_led.h | 0 include/config_cmd_all.h | 0 3 files changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 cpu/arm920t/start.S mode change 100755 => 100644 include/asm-arm/coloured_led.h mode change 100755 => 100644 include/config_cmd_all.h diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S old mode 100755 new mode 100644 diff --git a/include/asm-arm/coloured_led.h b/include/asm-arm/coloured_led.h old mode 100755 new mode 100644 diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h old mode 100755 new mode 100644 From e1f601b572db5de9aa81a0b77c68a86994fe24c4 Mon Sep 17 00:00:00 2001 From: Bartlomiej Sieka Date: Thu, 13 Sep 2007 16:33:59 +0200 Subject: [PATCH 32/73] tqm5200: Restore customary env. variable boot commands for powerpc kernels - update default definitions of kernel_addr and fdt_addr env. variables - make arch/powerpc booting the default scenario - update MTD partition layout to match the above Signed-off-by: Bartlomiej Sieka --- include/configs/TQM5200.h | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index e0c9d81be0..4e0e1517c5 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -238,13 +238,13 @@ "protect on FC000000 +${filesize}\0" #endif -#ifndef CONFIG_CAM5200 +#if defined(CONFIG_TQM5200) #define CUSTOM_ENV_SETTINGS \ + "hostname=tqm5200\0" \ "bootfile=/tftpboot/tqm5200/uImage\0" \ - "bootfile_fdt=/tftpboot/tqm5200/uImage_fdt\0" \ "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" -#else +#elif defined(CONFIG_CAM5200) #define CUSTOM_ENV_SETTINGS \ "bootfile=cam5200/uImage\0" \ "u-boot=cam5200/u-boot.bin\0" \ @@ -252,11 +252,13 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ - "console=ttyS0\0" \ - "kernel_addr=200000\0" \ - "fdt_addr=400000\0" \ - "hostname=tqm5200\0" \ "netdev=eth0\0" \ + "console=ttyPSC0\0" \ + "fdt_addr=FC0A0000\0" \ + "kernel_addr=FC0C0000\0" \ + "ramdisk_addr=FC300000\0" \ + "kernel_addr_r=200000\0" \ + "fdt_addr_r=400000\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ @@ -266,16 +268,20 @@ ":${hostname}:${netdev}:off panic=1\0" \ "addcons=setenv bootargs ${bootargs} " \ "console=${console},${baudrate}\0" \ - "flash_self=run ramargs addip addcons;" \ + "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "flash_nfs=run nfsargs addip addcons;" \ + "flash_self=run ramargs addip addcons;" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \ "bootm ${kernel_addr}\0" \ - "net_nfs=tftp ${kernel_addr} ${bootfile};" \ - "run nfsargs addip addcons;bootm\0" \ - "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt};" \ - "tftp ${fdt_addr} ${fdt_file};setenv console ttyPSC0;" \ - "run nfsargs addip addcons;" \ + "flash_nfs=run nfsargs addip addcons;" \ "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \ + "sete console ttyS0; run nfsargs addip addcons;bootm\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "tftp ${fdt_addr_r} ${fdt_file}; " \ + "run nfsargs addip addcons; " \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ CUSTOM_ENV_SETTINGS \ "load=tftp 200000 ${u-boot}\0" \ ENV_UPDT \ @@ -408,11 +414,12 @@ # endif /* CFG_LOWBOOT */ # else /* !CONFIG_TQM5200_B */ # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ - "1408k(kernel)," \ + "128k(dtb)," \ + "2304k(kernel)," \ "2m(initrd)," \ "4m(small-fs)," \ "8m(misc)," \ - "16m(big-fs)" + "15m(big-fs)" # endif /* CONFIG_TQM5200_B */ #elif defined (CONFIG_CAM5200) # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \ From 991b089d1ce5ad945725e3657a8f106dfa02a38e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sat, 15 Sep 2007 00:03:35 +0200 Subject: [PATCH 33/73] Synchronize with U-BOOT mainline --- Makefile | 11 +++--- board/xilinx/xupv2p/Makefile | 21 +++++++++-- board/xilinx/xupv2p/config.mk | 6 +-- board/xilinx/xupv2p/xparameters.h | 27 ++++++------- common/cmd_jffs2.c | 36 +++++------------- common/cmd_mfsl.c | 11 +++--- cpu/microblaze/cache.c | 2 +- cpu/microblaze/start.S | 6 ++- cpu/microblaze/timer.c | 7 ---- drivers/net/Makefile | 3 +- drivers/serial_xuartlite.c | 2 +- fs/Makefile | 2 +- include/configs/ml401.h | 50 ++++++++++++------------ include/configs/suzaku.h | 18 +++++---- include/configs/xupv2p.h | 63 +++++++++++-------------------- lib_microblaze/time.c | 8 ---- 16 files changed, 119 insertions(+), 154 deletions(-) diff --git a/Makefile b/Makefile index d3c96bcdcb..c1c64462f0 100644 --- a/Makefile +++ b/Makefile @@ -144,7 +144,7 @@ ifeq ($(ARCH),m68k) CROSS_COMPILE = m68k-elf- endif ifeq ($(ARCH),microblaze) -CROSS_COMPILE = microblaze-uclinux- +CROSS_COMPILE = mb- endif ifeq ($(ARCH),blackfin) CROSS_COMPILE = bfin-uclinux- @@ -201,9 +201,8 @@ ifeq ($(CPU),ixp) LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a -LIBS += fs/cramfs/libcramfs.a fs/ext2/libext2fs.a fs/fat/libfat.a \ - fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a \ - fs/romfs/libromfs.a +LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ + fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += rtc/librtc.a @@ -326,14 +325,14 @@ depend dep: tags ctags: ctags -w -o $(OBJTREE)/ctags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ + fs/cramfs fs/fat fs/fdos fs/jffs2 \ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` etags: etags -a -o $(OBJTREE)/etags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ + fs/cramfs fs/fat fs/fdos fs/jffs2 \ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile index 99e7047350..9ab5633626 100644 --- a/board/xilinx/xupv2p/Makefile +++ b/board/xilinx/xupv2p/Makefile @@ -22,17 +22,32 @@ # include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +$(shell mkdir -p $(obj)../xilinx_enet) +endif + +INCS := -I../common -I../xilinx_enet +CFLAGS += $(INCS) +HOST_CFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o +COBJS = $(BOARD).o \ + ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ + ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ + ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ + ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ + ../common/xbasic_types.o ../common/xdma_channel.o \ + ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ + ../common/xversion.o \ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $^ clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk index eedfb24d4f..c07b0b35b1 100644 --- a/board/xilinx/xupv2p/config.mk +++ b/board/xilinx/xupv2p/config.mk @@ -25,8 +25,8 @@ # Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 # -TEXT_BASE = 0x30000000 +TEXT_BASE = 0x38000000 -PLATFORM_CPPFLAGS += -mxl-pattern-compare PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mcpu=v5.00.c +PLATFORM_CPPFLAGS += -mno-xl-soft-div +PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h index 0bb7a805f4..a96c693c55 100644 --- a/board/xilinx/xupv2p/xparameters.h +++ b/board/xilinx/xupv2p/xparameters.h @@ -28,24 +28,17 @@ /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 -/* Microblaze is microblaze_0 */ -#define XILINX_USE_MSR_INSTR 1 -#define XILINX_PVR 0 -#define XILINX_FSL_NUMBER 0 - /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 7 +#define XILINX_INTC_NUM_INTR_INPUTS 11 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 0 +#define XILINX_TIMER_IRQ 1 /* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UARTLITE_BASEADDR 0x40600000 -#define XILINX_UARTLITE_BAUDRATE 115200 - -/* IIC doesn't exist */ +#define XILINX_UART_BASEADDR 0x40600000 +#define XILINX_UART_BAUDRATE 115200 /* GPIO is LEDs_4Bit*/ #define XILINX_GPIO_BASEADDR 0x40000000 @@ -58,10 +51,14 @@ /* Sysace Controller is SysACE_CompactFlash */ #define XILINX_SYSACE_BASEADDR 0x41800000 +#define XILINX_SYSACE_HIGHADDR 0x4180ffff #define XILINX_SYSACE_MEM_WIDTH 16 /* Ethernet controller is Ethernet_MAC */ -#define XILINX_EMAC_BASEADDR 0x40c00000 -#define XILINX_EMAC_DMA_PRESENT 3 -#define XILINX_EMAC_HALF_DUPLEX_EXIST 1 -#define XILINX_EMAC_MII_EXIST 1 +#define XPAR_XEMAC_NUM_INSTANCES 1 +#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 +#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 +#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff +#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 +#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 +#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 3e6061a520..513a226c43 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -85,7 +85,7 @@ */ /* - * JFFS2/CRAMFS/ROMFS support + * JFFS2/CRAMFS support */ #include #include @@ -175,11 +175,6 @@ extern int cramfs_load (char *loadoffset, struct part_info *info, char *filename extern int cramfs_ls (struct part_info *info, char *filename); extern int cramfs_info (struct part_info *info); -extern int romfs_check (struct part_info *info); -extern int romfs_load (char *loadoffset, struct part_info *info, char *filename); -extern int romfs_ls (struct part_info *info, char *filename); -extern int romfs_info (struct part_info *info); - static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num); /* command line only routines */ @@ -1879,22 +1874,14 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ - /* check partition type for JFFS2, cramfs, romfs */ - if (cramfs_check(part)) { - fsname = "CRAMFS"; - } else if (romfs_check(part)) { - fsname = "ROMFS"; - } else { - fsname = "JFFS2"; - } + /* check partition type for cramfs */ + fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); printf("### %s loading '%s' to 0x%lx\n", fsname, filename, offset); if (cramfs_check(part)) { size = cramfs_load ((char *) offset, part, filename); - } else if (romfs_check(part)){ - size = romfs_load ((char *) offset, part, filename); } else { - /* if this is not cramfs or romfs assume jffs2 */ + /* if this is not cramfs assume jffs2 */ size = jffs2_1pass_load((char *)offset, part, filename); } @@ -1941,10 +1928,8 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* check partition type for cramfs */ if (cramfs_check(part)) { ret = cramfs_ls (part, filename); - } else if (romfs_check(part)) { - ret = romfs_ls (part, filename); } else { - /* if this is not cramfs or romfs assume jffs2 */ + /* if this is not cramfs assume jffs2 */ ret = jffs2_1pass_ls(part, filename); } @@ -1966,6 +1951,7 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { struct part_info *part; + char *fsname; int ret; /* make sure we are in sync with env variables */ @@ -1975,17 +1961,13 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ /* check partition type for cramfs */ - puts("### filesystem type is "); + fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); + printf("### filesystem type is %s\n", fsname); if (cramfs_check(part)) { - puts("CRAMFS\n"); ret = cramfs_info (part); - } else if (romfs_check(part)) { - puts("ROMFS\n"); - ret = romfs_info (part); } else { - /* if this is not cramfs or romfs assume jffs2 */ - puts("JFFS2\n"); + /* if this is not cramfs assume jffs2 */ ret = jffs2_1pass_info(part); } diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 93cc873b05..8d4c1a38d7 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -357,7 +357,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); val = (unsigned int)simple_strtoul (argv[2], NULL, 16); - if (argc < 2) { + if (argc < 1) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } @@ -382,7 +382,6 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("ESR"); break; default: - puts ("Unsupported register\n"); return 1; } printf (": 0x%08lx\n", val); @@ -409,10 +408,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 3 - blocking control write\n"); U_BOOT_CMD (rspr, 3, 1, do_rspr, - "rspr - read/write special purpose register\n", + "rmsr - read/write special purpose register\n", "- reg_num [write value] read/write special purpose register\n" - " 1 - MSR - Machine status register\n" - " 3 - EAR - Exception address register\n" - " 5 - ESR - Exception status register\n"); + " 0 - MSR - Machine status register\n" + " 1 - EAR - Exception address register\n" + " 2 - ESR - Exception status register\n"); #endif diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c index 4b7866fae5..6ce0b55b24 100644 --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 8740284ad8..3c027ff9bb 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -33,13 +33,15 @@ _start: addi r1, r0, CFG_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ - addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ + addi r6, r0, 0xb000 /* hex b000 opcode imm */ + bslli r6, r6, 16 /* shift */ swi r6, r0, 0x0 /* reset address */ swi r6, r0, 0x8 /* user vector exception */ swi r6, r0, 0x10 /* interrupt */ swi r6, r0, 0x20 /* hardware exception */ - addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/ + addi r6, r0, 0xb808 /* hew b808 opcode brai*/ + bslli r6, r6, 16 swi r6, r0, 0x4 /* reset address */ swi r6, r0, 0xC /* user vector exception */ swi r6, r0, 0x14 /* interrupt */ diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c index b350453443..ab1cb12749 100644 --- a/cpu/microblaze/timer.c +++ b/cpu/microblaze/timer.c @@ -33,17 +33,10 @@ void reset_timer (void) timestamp = 0; } -#ifdef CFG_TIMER_0 ulong get_timer (ulong base) { return (timestamp - base); } -#else -ulong get_timer (ulong base) -{ - return (timestamp++ - base); -} -#endif void set_timer (ulong t) { diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 063985984e..37d69b9949 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -24,7 +24,8 @@ include $(TOPDIR)/config.mk LIB := $(obj)libnet.a -COBJS := mcffec.o xilinx_emac.o xilinx_emaclite.o + +COBJS := mcffec.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index 1f3aaae403..ed59abea86 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include -#ifdef XILINX_UARTLITE +#ifdef CONFIG_MICROBLAZE #include diff --git a/fs/Makefile b/fs/Makefile index 118ae78f2d..273d90e011 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,7 @@ # # -SUBDIRS := romfs jffs2 cramfs fdos fat reiserfs ext2 +SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 $(obj).depend all: @for dir in $(SUBDIRS) ; do \ diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 74fe88867e..7eeae708a7 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Czech Technical University. * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. @@ -32,7 +32,6 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -87,7 +86,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -100,7 +99,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -146,16 +145,6 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR - #define CONFIG_SYSTEMACE - /* #define DEBUG_SYSTEMACE */ - #define SYSTEMACE_CONFIG_FPGA - #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR - #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH - #define CONFIG_DOS_PARTITION -#endif - /* * BOOTP options */ @@ -164,21 +153,28 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME + /* * Command line configuration. */ #include #define CONFIG_CMD_ASKENV +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL +#define CONFIG_CMD_NET #define CONFIG_CMD_PING - -#if defined(CONFIG_SYSTEMACE) - #define CONFIG_CMD_EXT2 - #define CONFIG_CMD_FAT -#endif +#define CONFIG_CMD_RUN #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -190,8 +186,6 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif -#else - #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -216,16 +210,24 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 +/* system ace */ +#define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +#define SYSTEMACE_CONFIG_FPGA +#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +#define CONFIG_DOS_PARTITION + #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 9a2eec1bb2..08ac9cbd58 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,7 +48,6 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) -#define XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } @@ -56,16 +55,21 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + /* * Command line configuration. */ #include -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_ENV -#undef CONFIG_CMD_MEMORY -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE @@ -104,6 +108,4 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -#define XILINX_CLOCK_FREQ 50000000 - #endif /* __CONFIG_H */ diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 006a132881..35001d7ada 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,34 +31,13 @@ #define CONFIG_XUPV2P 1 /* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -#define XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR +#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CFG_NS16550 -#define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR -#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ - -#define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif /* ethernet */ -#ifdef XILINX_EMAC_BASEADDR -#define XILINX_EMAC 1 -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define XILINX_EMACLITE 1 -#endif -#endif -#undef ET_DEBUG +#define CONFIG_EMAC 1 +#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES /* * setting reset address @@ -69,13 +48,11 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -/* #define CFG_RESET_ADDRESS 0x36000000 */ +#define CFG_RESET_ADDRESS 0x36000000 /* gpio */ -#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -142,6 +119,7 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) + /* * BOOTP options */ @@ -150,24 +128,29 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME + /* * Command line configuration. */ #include -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE +#define CONFIG_CMD_MEMORY #define CONFIG_CMD_IRQ -#define CONFIG_CMD_MFSL +#define CONFIG_CMD_BDI +#define CONFIG_CMD_NET +#define CONFIG_CMD_IMI +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_RUN +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_MISC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_PING -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#endif /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " @@ -179,7 +162,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "xupv2p" +#define CONFIG_HOSTNAME "ml401" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -195,13 +178,11 @@ "echo" /* system ace */ -#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION -#endif #endif /* __CONFIG_H */ diff --git a/lib_microblaze/time.c b/lib_microblaze/time.c index 0fef834992..3fa1b11262 100644 --- a/lib_microblaze/time.c +++ b/lib_microblaze/time.c @@ -26,17 +26,9 @@ #include -#ifdef CFG_TIMER_0 void udelay (unsigned long usec) { int i; i = get_timer (0); while ((get_timer (0) - i) < (usec / 1000)) ; } -#else -void udelay (unsigned long usec) -{ - unsigned int i; - for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++); -} -#endif From b49c90df6e7cfcfb8b862b8bbf8448dff5eed9a5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 16 Sep 2007 20:51:57 +0200 Subject: [PATCH 34/73] [FIX] remove files form repository --- drivers/net/xilinx_emac.c | 374 --------------------------------- drivers/net/xilinx_emac.h | 148 ------------- drivers/net/xilinx_emaclite.c | 376 ---------------------------------- fs/romfs/Makefile | 49 ----- fs/romfs/romfs.c | 240 ---------------------- 5 files changed, 1187 deletions(-) delete mode 100644 drivers/net/xilinx_emac.c delete mode 100644 drivers/net/xilinx_emac.h delete mode 100644 drivers/net/xilinx_emaclite.c delete mode 100644 fs/romfs/Makefile delete mode 100644 fs/romfs/romfs.c diff --git a/drivers/net/xilinx_emac.c b/drivers/net/xilinx_emac.c deleted file mode 100644 index 36e627aae5..0000000000 --- a/drivers/net/xilinx_emac.c +++ /dev/null @@ -1,374 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Based on Xilinx drivers - * - */ - -#include -#include -#include -#include -#include "xilinx_emac.h" - -#ifdef XILINX_EMAC - -#undef DEBUG - -#define ENET_MAX_MTU PKTSIZE -#define ENET_ADDR_LENGTH 6 - -static unsigned int etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ - -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; - -static xemac emac; - -void eth_halt(void) -{ -#ifdef DEBUG - puts ("eth_halt\n"); -#endif -} - -int eth_init(bd_t * bis) -{ - u32 helpreg; -#ifdef DEBUG - printf("EMAC Initialization Started\n\r"); -#endif - if (emac.isstarted) { - puts("Emac is started\n"); - return 0; - } - - memset (&emac, 0, sizeof (xemac)); - - emac.baseaddress = XILINX_EMAC_BASEADDR; - - /* Setting up FIFOs */ - emac.recvfifo.regbaseaddress = emac.baseaddress + - XEM_PFIFO_RXREG_OFFSET; - emac.recvfifo.databaseaddress = emac.baseaddress + - XEM_PFIFO_RXDATA_OFFSET; - out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); - - emac.sendfifo.regbaseaddress = emac.baseaddress + - XEM_PFIFO_TXREG_OFFSET; - emac.sendfifo.databaseaddress = emac.baseaddress + - XEM_PFIFO_TXDATA_OFFSET; - out_be32 (emac.sendfifo.regbaseaddress, XPF_RESET_FIFO_MASK); - - /* Reset the entire IPIF */ - out_be32 (emac.baseaddress + XIIF_V123B_RESETR_OFFSET, - XIIF_V123B_RESET_MASK); - - /* Stopping EMAC for setting up MAC */ - helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); - helpreg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - if (!getenv("ethaddr")) { - memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); - } - - /* Set the device station address high and low registers */ - helpreg = (bis->bi_enetaddr[0] << 8) | bis->bi_enetaddr[1]; - out_be32 (emac.baseaddress + XEM_SAH_OFFSET, helpreg); - helpreg = (bis->bi_enetaddr[2] << 24) | (bis->bi_enetaddr[3] << 16) | - (bis->bi_enetaddr[4] << 8) | bis->bi_enetaddr[5]; - out_be32 (emac.baseaddress + XEM_SAL_OFFSET, helpreg); - - - helpreg = XEM_ECR_UNICAST_ENABLE_MASK | XEM_ECR_BROAD_ENABLE_MASK | - XEM_ECR_FULL_DUPLEX_MASK | XEM_ECR_XMIT_FCS_ENABLE_MASK | - XEM_ECR_XMIT_PAD_ENABLE_MASK | XEM_ECR_PHY_ENABLE_MASK; - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - emac.isstarted = 1; - - /* Enable the transmitter, and receiver */ - helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); - helpreg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); - helpreg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - printf("EMAC Initialization complete\n\r"); - return 0; -} - -int eth_send(volatile void *ptr, int len) -{ - u32 intrstatus; - u32 xmitstatus; - u32 fifocount; - u32 wordcount; - u32 extrabytecount; - u32 *wordbuffer = (u32 *) ptr; - - if (len > ENET_MAX_MTU) - len = ENET_MAX_MTU; - - /* - * Check for overruns and underruns for the transmit status and length - * FIFOs and make sure the send packet FIFO is not deadlocked. - * Any of these conditions is bad enough that we do not want to - * continue. The upper layer software should reset the device to resolve - * the error. - */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | - XEM_EIR_XMIT_LFIFO_OVER_MASK)) { -#ifdef DEBUG - puts ("Transmitting overrun error\n"); -#endif - return 0; - } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | - XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { -#ifdef DEBUG - puts ("Transmitting underrun error\n"); -#endif - return 0; - } else if (in_be32 (emac.sendfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_DEADLOCK_MASK) { -#ifdef DEBUG - puts("Transmitting fifo error\n"); -#endif - return 0; - } - - /* - * Before writing to the data FIFO, make sure the length FIFO is not - * full. The data FIFO might not be full yet even though the length FIFO - * is. This avoids an overrun condition on the length FIFO and keeps the - * FIFOs in sync. - * - * Clear the latched LFIFO_FULL bit so next time around the most - * current status is represented - */ - if (intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) { - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK); -#ifdef DEBUG - puts ("Fifo is full\n"); -#endif - return 0; - } - - /* get the count of how many words may be inserted into the FIFO */ - fifocount = in_be32 (emac.sendfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - wordcount = len >> 2; - extrabytecount = len & 0x3; - - if (fifocount < wordcount) { -#ifdef DEBUG - puts ("Sending packet is larger then size of FIFO\n"); -#endif - return 0; - } - - for (fifocount = 0; fifocount < wordcount; fifocount++) { - out_be32 (emac.sendfifo.databaseaddress, wordbuffer[fifocount]); - } - if (extrabytecount > 0) { - u32 lastword = 0; - u8 *extrabytesbuffer = (u8 *) (wordbuffer + wordcount); - - if (extrabytecount == 1) { - lastword = extrabytesbuffer[0] << 24; - } else if (extrabytecount == 2) { - lastword = extrabytesbuffer[0] << 24 | - extrabytesbuffer[1] << 16; - } else if (extrabytecount == 3) { - lastword = extrabytesbuffer[0] << 24 | - extrabytesbuffer[1] << 16 | - extrabytesbuffer[2] << 8; - } - out_be32 (emac.sendfifo.databaseaddress, lastword); - } - - /* Loop on the MAC's status to wait for any pause to complete */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - while ((intrstatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) { - intrstatus = in_be32 ((emac.baseaddress) + - XIIF_V123B_IISR_OFFSET); - /* Clear the pause status from the transmit status register */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_PAUSE_MASK); - } - - /* - * Set the MAC's transmit packet length register to tell it to transmit - */ - out_be32 (emac.baseaddress + XEM_TPLR_OFFSET, len); - - /* - * Loop on the MAC's status to wait for the transmit to complete. - * The transmit status is in the FIFO when the XMIT_DONE bit is set. - */ - do { - intrstatus = in_be32 ((emac.baseaddress) + - XIIF_V123B_IISR_OFFSET); - } - while ((intrstatus & XEM_EIR_XMIT_DONE_MASK) == 0); - - xmitstatus = in_be32 (emac.baseaddress + XEM_TSR_OFFSET); - - if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | - XEM_EIR_XMIT_LFIFO_OVER_MASK)) { -#ifdef DEBUG - puts ("Transmitting overrun error\n"); -#endif - return 0; - } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | - XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { -#ifdef DEBUG - puts ("Transmitting underrun error\n"); -#endif - return 0; - } - - /* Clear the interrupt status register of transmit statuses */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_ALL_MASK); - - /* - * Collision errors are stored in the transmit status register - * instead of the interrupt status register - */ - if ((xmitstatus & XEM_TSR_EXCESS_DEFERRAL_MASK) || - (xmitstatus & XEM_TSR_LATE_COLLISION_MASK)) { -#ifdef DEBUG - puts ("Transmitting collision error\n"); -#endif - return 0; - } - return 1; -} - -int eth_rx(void) -{ - u32 pktlength; - u32 intrstatus; - u32 fifocount; - u32 wordcount; - u32 extrabytecount; - u32 lastword; - u8 *extrabytesbuffer; - - if (in_be32 (emac.recvfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET) - & XPF_DEADLOCK_MASK) { - out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); -#ifdef DEBUG - puts ("Receiving FIFO deadlock\n"); -#endif - return 0; - } - - /* - * Get the interrupt status to know what happened (whether an error - * occurred and/or whether frames have been received successfully). - * When clearing the intr status register, clear only statuses that - * pertain to receive. - */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - /* - * Before reading from the length FIFO, make sure the length FIFO is not - * empty. We could cause an underrun error if we try to read from an - * empty FIFO. - */ - if (!(intrstatus & XEM_EIR_RECV_DONE_MASK)) { -#ifdef DEBUG - /* puts("Receiving FIFO is empty\n"); */ -#endif - return 0; - } - - /* - * Determine, from the MAC, the length of the next packet available - * in the data FIFO (there should be a non-zero length here) - */ - pktlength = in_be32 (emac.baseaddress + XEM_RPLR_OFFSET); - if (!pktlength) { - return 0; - } - - /* - * Write the RECV_DONE bit in the status register to clear it. This bit - * indicates the RPLR is non-empty, and we know it's set at this point. - * We clear it so that subsequent entry into this routine will reflect - * the current status. This is done because the non-empty bit is latched - * in the IPIF, which means it may indicate a non-empty condition even - * though there is something in the FIFO. - */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - XEM_EIR_RECV_DONE_MASK); - - fifocount = in_be32 (emac.recvfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - - if ((fifocount * 4) < pktlength) { -#ifdef DEBUG - puts ("Receiving FIFO is smaller than packet size.\n"); -#endif - return 0; - } - - wordcount = pktlength >> 2; - extrabytecount = pktlength & 0x3; - - for (fifocount = 0; fifocount < wordcount; fifocount++) { - etherrxbuff[fifocount] = - in_be32 (emac.recvfifo.databaseaddress); - } - - /* - * if there are extra bytes to handle, read the last word from the FIFO - * and insert the extra bytes into the buffer - */ - if (extrabytecount > 0) { - extrabytesbuffer = (u8 *) (etherrxbuff + wordcount); - - lastword = in_be32 (emac.recvfifo.databaseaddress); - - /* - * one extra byte in the last word, put the byte into the next - * location of the buffer, bytes in a word of the FIFO are - * ordered from most significant byte to least - */ - if (extrabytecount == 1) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - } else if (extrabytecount == 2) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - extrabytesbuffer[1] = (u8) (lastword >> 16); - } else if (extrabytecount == 3) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - extrabytesbuffer[1] = (u8) (lastword >> 16); - extrabytesbuffer[2] = (u8) (lastword >> 8); - } - } - NetReceive((uchar *)etherrxbuff, pktlength); - return 1; -} -#endif diff --git a/drivers/net/xilinx_emac.h b/drivers/net/xilinx_emac.h deleted file mode 100644 index 966598e27a..0000000000 --- a/drivers/net/xilinx_emac.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Based on Xilinx drivers - * - */ - -typedef struct { - u32 regbaseaddress; /* Base address of registers */ - u32 databaseaddress; /* Base address of data for FIFOs */ -} xpacketfifov100b; - -typedef struct { - u32 baseaddress; /* Base address (of IPIF) */ - u32 isstarted; /* Device is currently started 0-no, 1-yes */ - xpacketfifov100b recvfifo; /* FIFO used to receive frames */ - xpacketfifov100b sendfifo; /* FIFO used to send frames */ -} xemac; - -#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ -#define XIIF_V123B_RESET_MASK 0xAUL -#define XIIF_V123B_RESETR_OFFSET 64UL /* reset register */ - -/* This constant is used with the Reset Register */ -#define XPF_RESET_FIFO_MASK 0x0000000A -#define XPF_COUNT_STATUS_REG_OFFSET 4UL - -/* These constants are used with the Occupancy/Vacancy Count Register. This - * register also contains FIFO status */ -#define XPF_COUNT_MASK 0x0000FFFF -#define XPF_DEADLOCK_MASK 0x20000000 - -/* Offset of the MAC registers from the IPIF base address */ -#define XEM_REG_OFFSET 0x1100UL - -/* - * Register offsets for the Ethernet MAC. Each register is 32 bits. - */ -#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ -#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ -#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ -#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ -#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ -#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ - - - -#define XEM_PFIFO_OFFSET 0x2000UL -/* Tx registers */ -#define XEM_PFIFO_TXREG_OFFSET (XEM_PFIFO_OFFSET + 0x0) -/* Rx registers */ -#define XEM_PFIFO_RXREG_OFFSET (XEM_PFIFO_OFFSET + 0x10) -/* Tx keyhole */ -#define XEM_PFIFO_TXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x100) -/* Rx keyhole */ -#define XEM_PFIFO_RXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x200) - - -/* - * EMAC Interrupt Registers (Status and Enable) masks. These registers are - * part of the IPIF IP Interrupt registers - */ -/* A mask for all transmit interrupts, used in polled mode */ -#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK |\ - XEM_EIR_XMIT_ERROR_MASK | \ - XEM_EIR_XMIT_SFIFO_EMPTY_MASK |\ - XEM_EIR_XMIT_LFIFO_FULL_MASK) - -/* Xmit complete */ -#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL -/* Recv complete */ -#define XEM_EIR_RECV_DONE_MASK 0x00000002UL -/* Xmit error */ -#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL -/* Recv error */ -#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL -/* Xmit status fifo empty */ -#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL -/* Recv length fifo empty */ -#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL -/* Xmit length fifo full */ -#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL -/* Recv length fifo overrun */ -#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL -/* Recv length fifo underrun */ -#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL -/* Xmit status fifo overrun */ -#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL -/* Transmit status fifo underrun */ -#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL -/* Transmit length fifo overrun */ -#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL -/* Transmit length fifo underrun */ -#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL -/* Transmit pause pkt received */ -#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL - -/* - * EMAC Control Register (ECR) - */ -/* Full duplex mode */ -#define XEM_ECR_FULL_DUPLEX_MASK 0x80000000UL -/* Reset transmitter */ -#define XEM_ECR_XMIT_RESET_MASK 0x40000000UL -/* Enable transmitter */ -#define XEM_ECR_XMIT_ENABLE_MASK 0x20000000UL -/* Reset receiver */ -#define XEM_ECR_RECV_RESET_MASK 0x10000000UL -/* Enable receiver */ -#define XEM_ECR_RECV_ENABLE_MASK 0x08000000UL -/* Enable PHY */ -#define XEM_ECR_PHY_ENABLE_MASK 0x04000000UL -/* Enable xmit pad insert */ -#define XEM_ECR_XMIT_PAD_ENABLE_MASK 0x02000000UL -/* Enable xmit FCS insert */ -#define XEM_ECR_XMIT_FCS_ENABLE_MASK 0x01000000UL -/* Enable unicast addr */ -#define XEM_ECR_UNICAST_ENABLE_MASK 0x00020000UL -/* Enable broadcast addr */ -#define XEM_ECR_BROAD_ENABLE_MASK 0x00008000UL - -/* - * Transmit Status Register (TSR) - */ -/* Transmit excess deferral */ -#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL -/* Transmit late collision */ -#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c deleted file mode 100644 index 5d8eaa5182..0000000000 --- a/drivers/net/xilinx_emaclite.c +++ /dev/null @@ -1,376 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include - -#ifdef XILINX_EMACLITE_BASEADDR - -#undef DEBUG - -#define ENET_MAX_MTU PKTSIZE -#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN -#define ENET_ADDR_LENGTH 6 - -/* EmacLite constants */ -#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ -#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ -#define XEL_TSR_OFFSET 0x07FC /* Tx status */ -#define XEL_RSR_OFFSET 0x17FC /* Rx status */ -#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ - -/* Xmit complete */ -#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL -/* Xmit interrupt enable bit */ -#define XEL_TSR_XMIT_IE_MASK 0x00000008UL -/* Buffer is active, SW bit only */ -#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL -/* Program the MAC address */ -#define XEL_TSR_PROGRAM_MASK 0x00000002UL -/* define for programming the MAC address into the EMAC Lite */ -#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) - -/* Transmit packet length upper byte */ -#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL -/* Transmit packet length lower byte */ -#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL - -/* Recv complete */ -#define XEL_RSR_RECV_DONE_MASK 0x00000001UL -/* Recv interrupt enable bit */ -#define XEL_RSR_RECV_IE_MASK 0x00000008UL - -typedef struct { - unsigned int baseaddress; /* Base address for device (IPIF) */ - unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ - unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ - unsigned char deviceid; /* Unique ID of device - for future */ -} xemaclite; - -static xemaclite emaclite; - -static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ - -/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ -#ifdef CFG_ENV_IS_NOWHERE -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; -#endif - -void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) -{ - unsigned int i; - u32 alignbuffer; - u32 *to32ptr; - u32 *from32ptr; - u8 *to8ptr; - u8 *from8ptr; - - from32ptr = (u32 *) srcptr; - - /* Word aligned buffer, no correction needed. */ - to32ptr = (u32 *) destptr; - while (bytecount > 3) { - *to32ptr++ = *from32ptr++; - bytecount -= 4; - } - to8ptr = (u8 *) to32ptr; - - alignbuffer = *from32ptr++; - from8ptr = (u8 *) & alignbuffer; - - for (i = 0; i < bytecount; i++) { - *to8ptr++ = *from8ptr++; - } -} - -void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) -{ - unsigned i; - u32 alignbuffer; - u32 *to32ptr = (u32 *) destptr; - u32 *from32ptr; - u8 *to8ptr; - u8 *from8ptr; - - from32ptr = (u32 *) srcptr; - while (bytecount > 3) { - - *to32ptr++ = *from32ptr++; - bytecount -= 4; - } - - alignbuffer = 0; - to8ptr = (u8 *) & alignbuffer; - from8ptr = (u8 *) from32ptr; - - for (i = 0; i < bytecount; i++) { - *to8ptr++ = *from8ptr++; - } - - *to32ptr++ = alignbuffer; -} - -void eth_halt (void) -{ -#ifdef DEBUG - puts ("eth_halt\n"); -#endif -} - -int eth_init (bd_t * bis) -{ -#ifdef DEBUG - puts ("EmacLite Initialization Started\n"); -#endif - memset (&emaclite, 0, sizeof (xemaclite)); - emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; - - if (!getenv("ethaddr")) { - memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); - } - -/* - * TX - TX_PING & TX_PONG initialization - */ - /* Restart PING TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); - /* Copy MAC address */ - xemaclite_alignedwrite (bis->bi_enetaddr, - emaclite.baseaddress, ENET_ADDR_LENGTH); - /* Set the length */ - out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); - /* Update the MAC address in the EMAC Lite */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); - /* Wait for EMAC Lite to finish with the MAC address update */ - while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) & - XEL_TSR_PROG_MAC_ADDR) != 0) ; - -#ifdef XILINX_EMACLITE_TX_PING_PONG - /* The same operation with PONG TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); - xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress + - XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); - out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, - XEL_TSR_PROG_MAC_ADDR); - while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + - XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; -#endif - -/* - * RX - RX_PING & RX_PONG initialization - */ - /* Write out the value to flush the RX buffer */ - out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); -#ifdef XILINX_EMACLITE_RX_PING_PONG - out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, - XEL_RSR_RECV_IE_MASK); -#endif - -#ifdef DEBUG - puts ("EmacLite Initialization complete\n"); -#endif - return 0; -} - -int xemaclite_txbufferavailable (xemaclite * instanceptr) -{ - u32 reg; - u32 txpingbusy; - u32 txpongbusy; - /* - * Read the other buffer register - * and determine if the other buffer is available - */ - reg = in_be32 (instanceptr->baseaddress + - instanceptr->nexttxbuffertouse + 0); - txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == - XEL_TSR_XMIT_BUSY_MASK); - - reg = in_be32 (instanceptr->baseaddress + - (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0); - txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == - XEL_TSR_XMIT_BUSY_MASK); - - return (!(txpingbusy && txpongbusy)); -} - -int eth_send (volatile void *ptr, int len) { - - unsigned int reg; - unsigned int baseaddress; - - unsigned maxtry = 1000; - - if (len > ENET_MAX_MTU) - len = ENET_MAX_MTU; - - while (!xemaclite_txbufferavailable (&emaclite) && maxtry) { - udelay (10); - maxtry--; - } - - if (!maxtry) { - printf ("Error: Timeout waiting for ethernet TX buffer\n"); - /* Restart PING TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); -#ifdef XILINX_EMACLITE_TX_PING_PONG - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + - XEL_BUFFER_OFFSET, 0); -#endif - return 0; - } - - /* Determine the expected TX buffer address */ - baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse); - - /* Determine if the expected buffer address is empty */ - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) - & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { - -#ifdef XILINX_EMACLITE_TX_PING_PONG - emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET; -#endif -#ifdef DEBUG - printf ("Send packet from 0x%x\n", baseaddress); -#endif - /* Write the frame to the buffer */ - xemaclite_alignedwrite ((void *) ptr, baseaddress, len); - out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - reg |= XEL_TSR_XMIT_BUSY_MASK; - if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { - reg |= XEL_TSR_XMIT_ACTIVE_MASK; - } - out_be32 (baseaddress + XEL_TSR_OFFSET, reg); - return 1; - } -#ifdef XILINX_EMACLITE_TX_PING_PONG - /* Switch to second buffer */ - baseaddress ^= XEL_BUFFER_OFFSET; - /* Determine if the expected buffer address is empty */ - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) - & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { -#ifdef DEBUG - printf ("Send packet from 0x%x\n", baseaddress); -#endif - /* Write the frame to the buffer */ - xemaclite_alignedwrite ((void *) ptr, baseaddress, len); - out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - reg |= XEL_TSR_XMIT_BUSY_MASK; - if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { - reg |= XEL_TSR_XMIT_ACTIVE_MASK; - } - out_be32 (baseaddress + XEL_TSR_OFFSET, reg); - return 1; - } -#endif - puts ("Error while sending frame\n"); - return 0; -} - -int eth_rx (void) -{ - unsigned int length; - unsigned int reg; - unsigned int baseaddress; - - baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); -#ifdef DEBUG - printf ("Testing data at address 0x%x\n", baseaddress); -#endif - if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { -#ifdef XILINX_EMACLITE_RX_PING_PONG - emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET; -#endif - } else { -#ifndef XILINX_EMACLITE_RX_PING_PONG -#ifdef DEBUG - printf ("No data was available - address 0x%x\n", baseaddress); -#endif - return 0; -#else - baseaddress ^= XEL_BUFFER_OFFSET; - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); - if ((reg & XEL_RSR_RECV_DONE_MASK) != - XEL_RSR_RECV_DONE_MASK) { -#ifdef DEBUG - printf ("No data was available - address 0x%x\n", - baseaddress); -#endif - return 0; - } -#endif - } - /* Get the length of the frame that arrived */ - switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & - 0xFFFF0000 ) >> 16) { - case 0x806: - length = 42 + 20; /* FIXME size of ARP */ -#ifdef DEBUG - puts ("ARP Packet\n"); -#endif - break; - case 0x800: - length = 14 + 14 + - (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & - 0xFFFF0000) >> 16); /* FIXME size of IP packet */ -#ifdef DEBUG - puts("IP Packet\n"); -#endif - break; - default: -#ifdef DEBUG - puts("Other Packet\n"); -#endif - length = ENET_MAX_MTU; - break; - } - - xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET), - etherrxbuff, length); - - /* Acknowledge the frame */ - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); - reg &= ~XEL_RSR_RECV_DONE_MASK; - out_be32 (baseaddress + XEL_RSR_OFFSET, reg); - -#ifdef DEBUG - printf ("Packet receive from 0x%x, length %dB\n", baseaddress, length); -#endif - NetReceive ((uchar *) etherrxbuff, length); - return 1; - -} -#endif diff --git a/fs/romfs/Makefile b/fs/romfs/Makefile deleted file mode 100644 index 937d755940..0000000000 --- a/fs/romfs/Makefile +++ /dev/null @@ -1,49 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)libromfs.a - -AOBJS = -COBJS = romfs.o - -SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS)) - -#CPPFLAGS += - -all: $(LIB) $(AOBJS) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/fs/romfs/romfs.c b/fs/romfs/romfs.c deleted file mode 100644 index 15de3e18ff..0000000000 --- a/fs/romfs/romfs.c +++ /dev/null @@ -1,240 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -#if defined(CONFIG_CMD_JFFS2) - -#include -#include -#include -#include - -#undef DEBUG_ROMFS - -/* ROMFS superblock */ -struct romfs_super { - u32 word0; - u32 word1; - u32 size; - u32 checksum; - char name[0]; -}; - -struct romfs_inode { - u32 next; - u32 spec; - u32 size; - u32 checksum; - char name[0]; -}; - -extern flash_info_t flash_info[]; -#define PART_OFFSET(x) (x->offset + flash_info[x->dev->id->num].start[0]) -#define ALIGN(x) (((x) & 0xfffffff0)) -#define HEADERSIZE(name) (0x20 + ALIGN(strlen(name))) - -static unsigned long romfs_resolve (unsigned long begin, unsigned long offset, - unsigned long size, int raw, char *filename) -{ - unsigned long inodeoffset = 0, nextoffset; - struct romfs_inode *inode; -#ifdef DEBUG_ROMFS - printf ("ROMFS_resolve: begin 0x%x, offset 0x%x, size 0x%x, raw 0x%x, \ - filename %s\n", begin, offset, size, raw, filename); -#endif - - while (inodeoffset < size) { - inode = (struct romfs_inode *)(begin + offset + inodeoffset); - offset = 0; - nextoffset = ALIGN (inode->next); -#ifdef DEBUG_ROMFS - printf("inode 0x%x, name %s - len 0x%x, next inode 0x%x, \ - compare names 0x%x\n", - inode, inode->name, strlen (inode->name), nextoffset, - strncmp (filename, inode->name, strlen (filename))); -#endif - if (!strncmp (filename, inode->name, strlen (inode->name))) { - char *p = strtok (NULL, "/"); - if (raw && (p == NULL || *p == '\0')) { - return offset + inodeoffset; - } - return romfs_resolve (begin, - inodeoffset + HEADERSIZE (inode->name), - size, raw, p); - } - inodeoffset = nextoffset; - } - - printf ("can't find corresponding entry\n"); - return 0; -} - -int romfs_load (char *loadoffset, struct part_info *info, char *filename) -{ - struct romfs_inode *inode; - struct romfs_super *sb; - char *data; - int pocet; - sb = (struct romfs_super *) PART_OFFSET (info); - - unsigned long offset; - - offset = romfs_resolve (PART_OFFSET (info), HEADERSIZE (sb->name), - sb->size, 1, strtok (filename, "/")); - if (offset <= 0) - return offset; - - inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); - data = (char *)((int)inode + HEADERSIZE (inode->name)); - pocet = inode->size; - while (pocet--) { - *loadoffset++ = *data++; - } - return inode->size; -} - -static int romfs_list_inode (struct part_info *info, unsigned long offset) -{ - struct romfs_inode *inode = - (struct romfs_inode *)(PART_OFFSET (info) + offset); - struct romfs_inode *hardlink = NULL; - char str[3], *data; - -/* - * mapping spec.info means - * 0 hard link link destination [file header] - * 1 directory first file's header - * 2 regular file unused, must be zero [MBZ] - * 3 symbolic link unused, MBZ (file data is the link content) - * 4 block device 16/16 bits major/minor number - * 5 char device - " - - * 6 socket unused, MBZ - * 7 fifo unused, MBZ - */ - char attributes[] = "hdflbcsp"; - str[0] = attributes[inode->next & 0x7]; - str[1] = (inode->next & 0x8) ? 'x' : '-'; - str[2] = '\0'; - - if ((str[0] == 'b') || (str[0] == 'c')) { -#ifdef DEBUG_ROMFS - printf (" %s %3d,%3d %12s 0x%08x 0x%08x", str, - (inode->spec & 0xffff0000) >> 16, - inode->spec & 0x0000ffff, inode->name, inode, - inode->spec); -#else - printf (" %s %3d,%3d %12s", str, - (inode->spec & 0xffff0000) >> 16, - inode->spec & 0x0000ffff); -#endif - } else { -#ifdef DEBUG_ROMFS - printf (" %s %7d %12s 0x%08x 0x%08x", str, inode->size, - inode->name, inode, inode->spec); -#else - printf (" %s %7d %12s", str, inode->size, inode->name); -#endif - if (str[0] == 'l') { - data = (char *)((int)inode + HEADERSIZE (inode->name)); - puts (" -> "); - puts (data); - } - if (str[0] == 'h') { - hardlink = (struct romfs_inode *)(PART_OFFSET (info) + - inode->spec); - puts (" -> "); - puts (hardlink->name); - } - } - puts ("\n"); - return ALIGN (inode->next); -} - -int romfs_ls (struct part_info *info, char *filename) -{ - struct romfs_inode *inode; - unsigned long inodeoffset = 0, nextoffset; - unsigned long offset, size; - struct romfs_super *sb; - sb = (struct romfs_super *)PART_OFFSET (info); - - if (strlen (filename) == 0 || !strcmp (filename, "/")) { - offset = HEADERSIZE (sb->name); - size = sb->size; - } else { - offset = romfs_resolve (PART_OFFSET (info), - HEADERSIZE (sb->name), sb->size, 1, - strtok (filename, "/")); - - if (offset == 0) { - return offset; - } - inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); - if ((inode->next & 0x7) != 1) { - return (romfs_list_inode (info, offset) > 0); - } - - size = sb->size; - offset = offset + HEADERSIZE (inode->name); - } - - inodeoffset = offset + inodeoffset; - while (inodeoffset < size) { - nextoffset = romfs_list_inode (info, inodeoffset); - if (nextoffset == 0) - break; - inodeoffset = nextoffset; - } - return 1; -} - -int romfs_info (struct part_info *info) -{ - struct romfs_super *sb; - sb = (struct romfs_super *)PART_OFFSET (info); - - printf ("name: \t\t%s, len %d B\n", sb->name, strlen (sb->name)); - printf ("size of SB:\t%d B\n", HEADERSIZE (sb->name)); - printf ("full size:\t%d B\n", sb->size); - printf ("checksum:\t0x%x\n", sb->checksum); - return 0; -} - -int romfs_check (struct part_info *info) -{ - struct romfs_super *sb; - if (info->dev->id->type != MTD_DEV_TYPE_NOR) - return 0; - - sb = (struct romfs_super *)PART_OFFSET (info); - if ((sb->word0 != 0x2D726F6D) || (sb->word1 != 0x3166732D)) { - return 0; - } - return 1; -} - -#endif From 916527f4809a7bcd811f1f1daf34af184e31dd8c Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Mon, 10 Sep 2007 17:13:49 +0900 Subject: [PATCH 35/73] OneNAND support (take #2) [PATCH 1/3] OneNAND support (take #2) OneNAND support at U-Boot Signed-off-by: Kyungmin Park --- drivers/onenand/onenand_base.c | 1294 ++++++++++++++++++++++++++++++++ 1 file changed, 1294 insertions(+) create mode 100644 drivers/onenand/onenand_base.c diff --git a/drivers/onenand/onenand_base.c b/drivers/onenand/onenand_base.c new file mode 100644 index 0000000000..7983a4a0d8 --- /dev/null +++ b/drivers/onenand/onenand_base.c @@ -0,0 +1,1294 @@ +/* + * linux/drivers/mtd/onenand/onenand_base.c + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#ifdef CONFIG_CMD_ONENAND + +#include +#include +#include + +#include +#include + +static const unsigned char ffchars[] = { + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ +}; + +/** + * onenand_readw - [OneNAND Interface] Read OneNAND register + * @param addr address to read + * + * Read OneNAND register + */ +static unsigned short onenand_readw(void __iomem * addr) +{ + return readw(addr); +} + +/** + * onenand_writew - [OneNAND Interface] Write OneNAND register with value + * @param value value to write + * @param addr address to write + * + * Write OneNAND register with value + */ +static void onenand_writew(unsigned short value, void __iomem * addr) +{ + writew(value, addr); +} + +/** + * onenand_block_address - [DEFAULT] Get block address + * @param device the device id + * @param block the block + * @return translated block address if DDP, otherwise same + * + * Setup Start Address 1 Register (F100h) + */ +static int onenand_block_address(int device, int block) +{ + if (device & ONENAND_DEVICE_IS_DDP) { + /* Device Flash Core select, NAND Flash Block Address */ + int dfs = 0, density, mask; + + density = device >> ONENAND_DEVICE_DENSITY_SHIFT; + mask = (1 << (density + 6)); + + if (block & mask) + dfs = 1; + + return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1)); + } + + return block; +} + +/** + * onenand_bufferram_address - [DEFAULT] Get bufferram address + * @param device the device id + * @param block the block + * @return set DBS value if DDP, otherwise 0 + * + * Setup Start Address 2 Register (F101h) for DDP + */ +static int onenand_bufferram_address(int device, int block) +{ + if (device & ONENAND_DEVICE_IS_DDP) { + /* Device BufferRAM Select */ + int dbs = 0, density, mask; + + density = device >> ONENAND_DEVICE_DENSITY_SHIFT; + mask = (1 << (density + 6)); + + if (block & mask) + dbs = 1; + + return (dbs << ONENAND_DDP_SHIFT); + } + + return 0; +} + +/** + * onenand_page_address - [DEFAULT] Get page address + * @param page the page address + * @param sector the sector address + * @return combined page and sector address + * + * Setup Start Address 8 Register (F107h) + */ +static int onenand_page_address(int page, int sector) +{ + /* Flash Page Address, Flash Sector Address */ + int fpa, fsa; + + fpa = page & ONENAND_FPA_MASK; + fsa = sector & ONENAND_FSA_MASK; + + return ((fpa << ONENAND_FPA_SHIFT) | fsa); +} + +/** + * onenand_buffer_address - [DEFAULT] Get buffer address + * @param dataram1 DataRAM index + * @param sectors the sector address + * @param count the number of sectors + * @return the start buffer value + * + * Setup Start Buffer Register (F200h) + */ +static int onenand_buffer_address(int dataram1, int sectors, int count) +{ + int bsa, bsc; + + /* BufferRAM Sector Address */ + bsa = sectors & ONENAND_BSA_MASK; + + if (dataram1) + bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ + else + bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ + + /* BufferRAM Sector Count */ + bsc = count & ONENAND_BSC_MASK; + + return ((bsa << ONENAND_BSA_SHIFT) | bsc); +} + +/** + * onenand_command - [DEFAULT] Send command to OneNAND device + * @param mtd MTD device structure + * @param cmd the command to be sent + * @param addr offset to read from or write to + * @param len number of bytes to read or write + * + * Send command to OneNAND device. This function is used for middle/large page + * devices (1KB/2KB Bytes per page) + */ +static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, + size_t len) +{ + struct onenand_chip *this = mtd->priv; + int value, readcmd = 0; + int block, page; + /* Now we use page size operation */ + int sectors = 4, count = 4; + + /* Address translation */ + switch (cmd) { + case ONENAND_CMD_UNLOCK: + case ONENAND_CMD_LOCK: + case ONENAND_CMD_LOCK_TIGHT: + block = -1; + page = -1; + break; + + case ONENAND_CMD_ERASE: + case ONENAND_CMD_BUFFERRAM: + block = (int)(addr >> this->erase_shift); + page = -1; + break; + + default: + block = (int)(addr >> this->erase_shift); + page = (int)(addr >> this->page_shift); + page &= this->page_mask; + break; + } + + /* NOTE: The setting order of the registers is very important! */ + if (cmd == ONENAND_CMD_BUFFERRAM) { + /* Select DataRAM for DDP */ + value = onenand_bufferram_address(this->device_id, block); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS2); + + /* Switch to the next data buffer */ + ONENAND_SET_NEXT_BUFFERRAM(this); + + return 0; + } + + if (block != -1) { + /* Write 'DFS, FBA' of Flash */ + value = onenand_block_address(this->device_id, block); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS1); + } + + if (page != -1) { + int dataram; + + switch (cmd) { + case ONENAND_CMD_READ: + case ONENAND_CMD_READOOB: + dataram = ONENAND_SET_NEXT_BUFFERRAM(this); + readcmd = 1; + break; + + default: + dataram = ONENAND_CURRENT_BUFFERRAM(this); + break; + } + + /* Write 'FPA, FSA' of Flash */ + value = onenand_page_address(page, sectors); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS8); + + /* Write 'BSA, BSC' of DataRAM */ + value = onenand_buffer_address(dataram, sectors, count); + this->write_word(value, this->base + ONENAND_REG_START_BUFFER); + + if (readcmd) { + /* Select DataRAM for DDP */ + value = + onenand_bufferram_address(this->device_id, block); + this->write_word(value, + this->base + + ONENAND_REG_START_ADDRESS2); + } + } + + /* Interrupt clear */ + this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); + /* Write command */ + this->write_word(cmd, this->base + ONENAND_REG_COMMAND); + + return 0; +} + +/** + * onenand_wait - [DEFAULT] wait until the command is done + * @param mtd MTD device structure + * @param state state to select the max. timeout value + * + * Wait for command done. This applies to all OneNAND command + * Read can take up to 30us, erase up to 2ms and program up to 350us + * according to general OneNAND specs + */ +static int onenand_wait(struct mtd_info *mtd, int state) +{ + struct onenand_chip *this = mtd->priv; + unsigned int flags = ONENAND_INT_MASTER; + unsigned int interrupt = 0; + unsigned int ctrl, ecc; + + while (1) { + interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); + if (interrupt & flags) + break; + } + + ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); + + if (ctrl & ONENAND_CTRL_ERROR) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_wait: controller error = 0x%04x\n", ctrl); + return -EAGAIN; + } + + if (ctrl & ONENAND_CTRL_LOCK) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_wait: it's locked error = 0x%04x\n", ctrl); + return -EIO; + } + + if (interrupt & ONENAND_INT_READ) { + ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); + if (ecc & ONENAND_ECC_2BIT_ALL) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_wait: ECC error = 0x%04x\n", ecc); + return -EBADMSG; + } + } + + return 0; +} + +/** + * onenand_bufferram_offset - [DEFAULT] BufferRAM offset + * @param mtd MTD data structure + * @param area BufferRAM area + * @return offset given area + * + * Return BufferRAM offset given area + */ +static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) +{ + struct onenand_chip *this = mtd->priv; + + if (ONENAND_CURRENT_BUFFERRAM(this)) { + if (area == ONENAND_DATARAM) + return mtd->oobblock; + if (area == ONENAND_SPARERAM) + return mtd->oobsize; + } + + return 0; +} + +/** + * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area + * @param mtd MTD data structure + * @param area BufferRAM area + * @param buffer the databuffer to put/get data + * @param offset offset to read from or write to + * @param count number of bytes to read/write + * + * Read the BufferRAM area + */ +static int onenand_read_bufferram(struct mtd_info *mtd, int area, + unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + memcpy(buffer, bufferram + offset, count); + + return 0; +} + +/** + * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode + * @param mtd MTD data structure + * @param area BufferRAM area + * @param buffer the databuffer to put/get data + * @param offset offset to read from or write to + * @param count number of bytes to read/write + * + * Read the BufferRAM area with Sync. Burst Mode + */ +static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, + unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); + + memcpy(buffer, bufferram + offset, count); + + this->mmcontrol(mtd, 0); + + return 0; +} + +/** + * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area + * @param mtd MTD data structure + * @param area BufferRAM area + * @param buffer the databuffer to put/get data + * @param offset offset to read from or write to + * @param count number of bytes to read/write + * + * Write the BufferRAM area + */ +static int onenand_write_bufferram(struct mtd_info *mtd, int area, + const unsigned char *buffer, int offset, + size_t count) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *bufferram; + + bufferram = this->base + area; + bufferram += onenand_bufferram_offset(mtd, area); + + memcpy(bufferram + offset, buffer, count); + + return 0; +} + +/** + * onenand_check_bufferram - [GENERIC] Check BufferRAM information + * @param mtd MTD data structure + * @param addr address to check + * @return 1 if there are valid data, otherwise 0 + * + * Check bufferram if there is data we required + */ +static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) +{ + struct onenand_chip *this = mtd->priv; + int block, page; + int i; + + block = (int)(addr >> this->erase_shift); + page = (int)(addr >> this->page_shift); + page &= this->page_mask; + + i = ONENAND_CURRENT_BUFFERRAM(this); + + /* Is there valid data? */ + if (this->bufferram[i].block == block && + this->bufferram[i].page == page && this->bufferram[i].valid) + return 1; + + return 0; +} + +/** + * onenand_update_bufferram - [GENERIC] Update BufferRAM information + * @param mtd MTD data structure + * @param addr address to update + * @param valid valid flag + * + * Update BufferRAM information + */ +static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, + int valid) +{ + struct onenand_chip *this = mtd->priv; + int block, page; + int i; + + block = (int)(addr >> this->erase_shift); + page = (int)(addr >> this->page_shift); + page &= this->page_mask; + + /* Invalidate BufferRAM */ + for (i = 0; i < MAX_BUFFERRAM; i++) { + if (this->bufferram[i].block == block && + this->bufferram[i].page == page) + this->bufferram[i].valid = 0; + } + + /* Update BufferRAM */ + i = ONENAND_CURRENT_BUFFERRAM(this); + this->bufferram[i].block = block; + this->bufferram[i].page = page; + this->bufferram[i].valid = valid; + + return 0; +} + +/** + * onenand_get_device - [GENERIC] Get chip for selected access + * @param mtd MTD device structure + * @param new_state the state which is requested + * + * Get the device and lock it for exclusive access + */ +static void onenand_get_device(struct mtd_info *mtd, int new_state) +{ + /* Do nothing */ +} + +/** + * onenand_release_device - [GENERIC] release chip + * @param mtd MTD device structure + * + * Deselect, release chip lock and wake up anyone waiting on the device + */ +static void onenand_release_device(struct mtd_info *mtd) +{ + /* Do nothing */ +} + +/** + * onenand_read_ecc - [MTD Interface] Read data with ECC + * @param mtd MTD device structure + * @param from offset to read from + * @param len number of bytes to read + * @param retlen pointer to variable to store the number of read bytes + * @param buf the databuffer to put data + * @param oob_buf filesystem supplied oob data buffer + * @param oobsel oob selection structure + * + * OneNAND read with ECC + */ +static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf, + u_char * oob_buf, struct nand_oobinfo *oobsel) +{ + struct onenand_chip *this = mtd->priv; + int read = 0, column; + int thislen; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", + (unsigned int)from, (int)len); + + /* Do not allow reads past end of device */ + if ((from + len) > mtd->size) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_ecc: Attempt read beyond end of device\n"); + *retlen = 0; + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_READING); + + while (read < len) { + thislen = min_t(int, mtd->oobblock, len - read); + + column = from & (mtd->oobblock - 1); + if (column + thislen > mtd->oobblock) + thislen = mtd->oobblock - column; + + if (!onenand_check_bufferram(mtd, from)) { + this->command(mtd, ONENAND_CMD_READ, from, + mtd->oobblock); + ret = this->wait(mtd, FL_READING); + /* First copy data and check return value for ECC handling */ + onenand_update_bufferram(mtd, from, 1); + } + + this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, + thislen); + + read += thislen; + if (read == len) + break; + + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_ecc: read failed = %d\n", ret); + break; + } + + from += thislen; + buf += thislen; + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + /* + * Return success, if no ECC failures, else -EBADMSG + * fs driver will take care of that, because + * retlen == desired len and result == -EBADMSG + */ + *retlen = read; + return ret; +} + +/** + * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc + * @param mtd MTD device structure + * @param from offset to read from + * @param len number of bytes to read + * @param retlen pointer to variable to store the number of read bytes + * @param buf the databuffer to put data + * + * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL +*/ +int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf) +{ + return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL); +} + +/** + * onenand_read_oob - [MTD Interface] OneNAND read out-of-band + * @param mtd MTD device structure + * @param from offset to read from + * @param len number of bytes to read + * @param retlen pointer to variable to store the number of read bytes + * @param buf the databuffer to put data + * + * OneNAND read out-of-band data from the spare area + */ +int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf) +{ + struct onenand_chip *this = mtd->priv; + int read = 0, thislen, column; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", + (unsigned int)from, (int)len); + + /* Initialize return length value */ + *retlen = 0; + + /* Do not allow reads past end of device */ + if (unlikely((from + len) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_oob: Attempt read beyond end of device\n"); + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_READING); + + column = from & (mtd->oobsize - 1); + + while (read < len) { + thislen = mtd->oobsize - column; + thislen = min_t(int, thislen, len); + + this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); + + onenand_update_bufferram(mtd, from, 0); + + ret = this->wait(mtd, FL_READING); + /* First copy data and check return value for ECC handling */ + + this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, + thislen); + + read += thislen; + if (read == len) + break; + + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_read_oob: read failed = %d\n", ret); + break; + } + + buf += thislen; + /* Read more? */ + if (read < len) { + /* Page size */ + from += mtd->oobblock; + column = 0; + } + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + *retlen = read; + return ret; +} + +#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE +/** + * onenand_verify_page - [GENERIC] verify the chip contents after a write + * @param mtd MTD device structure + * @param buf the databuffer to verify + * @param block block address + * @param page page address + * + * Check DataRAM area directly + */ +static int onenand_verify_page(struct mtd_info *mtd, u_char * buf, + loff_t addr, int block, int page) +{ + struct onenand_chip *this = mtd->priv; + void __iomem *dataram0, *dataram1; + int ret = 0; + + this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock); + + ret = this->wait(mtd, FL_READING); + if (ret) + return ret; + + onenand_update_bufferram(mtd, addr, 1); + + /* Check, if the two dataram areas are same */ + dataram0 = this->base + ONENAND_DATARAM; + dataram1 = dataram0 + mtd->oobblock; + + if (memcmp(dataram0, dataram1, mtd->oobblock)) + return -EBADMSG; + + return 0; +} +#else +#define onenand_verify_page(...) (0) +#endif + +#define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0) + +/** + * onenand_write_ecc - [MTD Interface] OneNAND write with ECC + * @param mtd MTD device structure + * @param to offset to write to + * @param len number of bytes to write + * @param retlen pointer to variable to store the number of written bytes + * @param buf the data to write + * @param eccbuf filesystem supplied oob data buffer + * @param oobsel oob selection structure + * + * OneNAND write with ECC + */ +static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, + size_t * retlen, const u_char * buf, + u_char * eccbuf, struct nand_oobinfo *oobsel) +{ + struct onenand_chip *this = mtd->priv; + int written = 0; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", + (unsigned int)to, (int)len); + + /* Initialize retlen, in case of early exit */ + *retlen = 0; + + /* Do not allow writes past end of device */ + if (unlikely((to + len) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: Attempt write to past end of device\n"); + return -EINVAL; + } + + /* Reject writes, which are not page aligned */ + if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: Attempt to write not page aligned data\n"); + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_WRITING); + + /* Loop until all data write */ + while (written < len) { + int thislen = min_t(int, mtd->oobblock, len - written); + + this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); + + this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen); + this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, + mtd->oobsize); + + this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); + + onenand_update_bufferram(mtd, to, 1); + + ret = this->wait(mtd, FL_WRITING); + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: write filaed %d\n", ret); + break; + } + + written += thislen; + + /* Only check verify write turn on */ + ret = onenand_verify_page(mtd, (u_char *) buf, to, block, page); + if (ret) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_ecc: verify failed %d\n", ret); + break; + } + + if (written == len) + break; + + to += thislen; + buf += thislen; + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + *retlen = written; + + return ret; +} + +/** + * onenand_write - [MTD Interface] compability function for onenand_write_ecc + * @param mtd MTD device structure + * @param to offset to write to + * @param len number of bytes to write + * @param retlen pointer to variable to store the number of written bytes + * @param buf the data to write + * + * This function simply calls onenand_write_ecc + * with oob buffer and oobsel = NULL + */ +int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t * retlen, const u_char * buf) +{ + return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL); +} + +/** + * onenand_write_oob - [MTD Interface] OneNAND write out-of-band + * @param mtd MTD device structure + * @param to offset to write to + * @param len number of bytes to write + * @param retlen pointer to variable to store the number of written bytes + * @param buf the data to write + * + * OneNAND write out-of-band + */ +int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, + size_t * retlen, const u_char * buf) +{ + struct onenand_chip *this = mtd->priv; + int column, status; + int written = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", + (unsigned int)to, (int)len); + + /* Initialize retlen, in case of early exit */ + *retlen = 0; + + /* Do not allow writes past end of device */ + if (unlikely((to + len) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_write_oob: Attempt write to past end of device\n"); + return -EINVAL; + } + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_WRITING); + + /* Loop until all data write */ + while (written < len) { + int thislen = min_t(int, mtd->oobsize, len - written); + + column = to & (mtd->oobsize - 1); + + this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); + + this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, + mtd->oobsize); + this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, + thislen); + + this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); + + onenand_update_bufferram(mtd, to, 0); + + status = this->wait(mtd, FL_WRITING); + if (status) + break; + + written += thislen; + if (written == len) + break; + + to += thislen; + buf += thislen; + } + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + *retlen = written; + + return 0; +} + +/** + * onenand_erase - [MTD Interface] erase block(s) + * @param mtd MTD device structure + * @param instr erase instruction + * + * Erase one ore more blocks + */ +int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) +{ + struct onenand_chip *this = mtd->priv; + unsigned int block_size; + loff_t addr; + int len; + int ret = 0; + + DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", + (unsigned int)instr->addr, (unsigned int)instr->len); + + block_size = (1 << this->erase_shift); + + /* Start address must align on block boundary */ + if (unlikely(instr->addr & (block_size - 1))) { + DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n"); + return -EINVAL; + } + + /* Length must align on block boundary */ + if (unlikely(instr->len & (block_size - 1))) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Length not block aligned\n"); + return -EINVAL; + } + + /* Do not allow erase past end of device */ + if (unlikely((instr->len + instr->addr) > mtd->size)) { + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Erase past end of device\n"); + return -EINVAL; + } + + instr->fail_addr = 0xffffffff; + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_ERASING); + + /* Loop throught the pages */ + len = instr->len; + addr = instr->addr; + + instr->state = MTD_ERASING; + + while (len) { + + /* TODO Check badblock */ + + this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); + + ret = this->wait(mtd, FL_ERASING); + /* Check, if it is write protected */ + if (ret) { + if (ret == -EPERM) + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Device is write protected!!!\n"); + else + DEBUG(MTD_DEBUG_LEVEL0, + "onenand_erase: Failed erase, block %d\n", + (unsigned)(addr >> this->erase_shift)); + instr->state = MTD_ERASE_FAILED; + instr->fail_addr = addr; + goto erase_exit; + } + + len -= block_size; + addr += block_size; + } + + instr->state = MTD_ERASE_DONE; + + erase_exit: + + ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; + /* Do call back function */ + if (!ret) + mtd_erase_callback(instr); + + /* Deselect and wake up anyone waiting on the device */ + onenand_release_device(mtd); + + return ret; +} + +/** + * onenand_sync - [MTD Interface] sync + * @param mtd MTD device structure + * + * Sync is actually a wait for chip ready function + */ +void onenand_sync(struct mtd_info *mtd) +{ + DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); + + /* Grab the lock and see if the device is available */ + onenand_get_device(mtd, FL_SYNCING); + + /* Release it and go back */ + onenand_release_device(mtd); +} + +/** + * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + */ +int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) +{ + /* + * TODO + * 1. Bad block table (BBT) + * -> using NAND BBT to support JFFS2 + * 2. Bad block management (BBM) + * -> bad block replace scheme + * + * Currently we do nothing + */ + return 0; +} + +/** + * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + */ +int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) +{ + /* see above */ + return 0; +} + +/** + * onenand_unlock - [MTD Interface] Unlock block(s) + * @param mtd MTD device structure + * @param ofs offset relative to mtd start + * @param len number of bytes to unlock + * + * Unlock one or more blocks + */ +int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) +{ + struct onenand_chip *this = mtd->priv; + int start, end, block, value, status; + + start = ofs >> this->erase_shift; + end = len >> this->erase_shift; + + /* Continuous lock scheme */ + if (this->options & ONENAND_CONT_LOCK) { + /* Set start block address */ + this->write_word(start, + this->base + ONENAND_REG_START_BLOCK_ADDRESS); + /* Set end block address */ + this->write_word(end - 1, + this->base + ONENAND_REG_END_BLOCK_ADDRESS); + /* Write unlock command */ + this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); + + /* There's no return value */ + this->wait(mtd, FL_UNLOCKING); + + /* Sanity check */ + while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) + & ONENAND_CTRL_ONGO) + continue; + + /* Check lock status */ + status = this->read_word(this->base + ONENAND_REG_WP_STATUS); + if (!(status & ONENAND_WP_US)) + printk(KERN_ERR "wp status = 0x%x\n", status); + + return 0; + } + + /* Block lock scheme */ + for (block = start; block < end; block++) { + /* Set start block address */ + this->write_word(block, + this->base + ONENAND_REG_START_BLOCK_ADDRESS); + /* Write unlock command */ + this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); + + /* There's no return value */ + this->wait(mtd, FL_UNLOCKING); + + /* Sanity check */ + while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) + & ONENAND_CTRL_ONGO) + continue; + + /* Set block address for read block status */ + value = onenand_block_address(this->device_id, block); + this->write_word(value, + this->base + ONENAND_REG_START_ADDRESS1); + + /* Check lock status */ + status = this->read_word(this->base + ONENAND_REG_WP_STATUS); + if (!(status & ONENAND_WP_US)) + printk(KERN_ERR "block = %d, wp status = 0x%x\n", + block, status); + } + + return 0; +} + +/** + * onenand_print_device_info - Print device ID + * @param device device ID + * + * Print device ID + */ +void onenand_print_device_info(int device, int verbose) +{ + int vcc, demuxed, ddp, density; + + if (!verbose) + return; + + vcc = device & ONENAND_DEVICE_VCC_MASK; + demuxed = device & ONENAND_DEVICE_IS_DEMUX; + ddp = device & ONENAND_DEVICE_IS_DDP; + density = device >> ONENAND_DEVICE_DENSITY_SHIFT; + printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", + demuxed ? "" : "Muxed ", + ddp ? "(DDP)" : "", + (16 << density), vcc ? "2.65/3.3" : "1.8", device); +} + +static const struct onenand_manufacturers onenand_manuf_ids[] = { + {ONENAND_MFR_SAMSUNG, "Samsung"}, + {ONENAND_MFR_UNKNOWN, "Unknown"} +}; + +/** + * onenand_check_maf - Check manufacturer ID + * @param manuf manufacturer ID + * + * Check manufacturer ID + */ +static int onenand_check_maf(int manuf) +{ + int i; + + for (i = 0; onenand_manuf_ids[i].id; i++) { + if (manuf == onenand_manuf_ids[i].id) + break; + } + +#ifdef ONENAND_DEBUG + printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", + onenand_manuf_ids[i].name, manuf); +#endif + + return (i != ONENAND_MFR_UNKNOWN); +} + +/** + * onenand_probe - [OneNAND Interface] Probe the OneNAND device + * @param mtd MTD device structure + * + * OneNAND detection method: + * Compare the the values from command with ones from register + */ +static int onenand_probe(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + int bram_maf_id, bram_dev_id, maf_id, dev_id; + int version_id; + int density; + + /* Send the command for reading device ID from BootRAM */ + this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); + + /* Read manufacturer and device IDs from BootRAM */ + bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); + bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); + + /* Check manufacturer ID */ + if (onenand_check_maf(bram_maf_id)) + return -ENXIO; + + /* Reset OneNAND to read default register values */ + this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); + + { + int i; + for (i = 0; i < 10000; i++) ; + } + + /* Read manufacturer and device IDs from Register */ + maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); + dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); + + /* Check OneNAND device */ + if (maf_id != bram_maf_id || dev_id != bram_dev_id) + return -ENXIO; + + /* Flash device information */ + onenand_print_device_info(dev_id, 0); + this->device_id = dev_id; + + density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; + this->chipsize = (16 << density) << 20; + + /* OneNAND page size & block size */ + /* The data buffer size is equal to page size */ + mtd->oobblock = + this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); + mtd->oobsize = mtd->oobblock >> 5; + /* Pagers per block is always 64 in OneNAND */ + mtd->erasesize = mtd->oobblock << 6; + + this->erase_shift = ffs(mtd->erasesize) - 1; + this->page_shift = ffs(mtd->oobblock) - 1; + this->ppb_shift = (this->erase_shift - this->page_shift); + this->page_mask = (mtd->erasesize / mtd->oobblock) - 1; + + /* REVIST: Multichip handling */ + + mtd->size = this->chipsize; + + /* Version ID */ + version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); +#ifdef ONENAND_DEBUG + printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id); +#endif + + /* Lock scheme */ + if (density <= ONENAND_DEVICE_DENSITY_512Mb && + !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) { + printk(KERN_INFO "Lock scheme is Continues Lock\n"); + this->options |= ONENAND_CONT_LOCK; + } + + return 0; +} + +/** + * onenand_scan - [OneNAND Interface] Scan for the OneNAND device + * @param mtd MTD device structure + * @param maxchips Number of chips to scan for + * + * This fills out all the not initialized function pointers + * with the defaults. + * The flash ID is read and the mtd/chip structures are + * filled with the appropriate values. + */ +int onenand_scan(struct mtd_info *mtd, int maxchips) +{ + struct onenand_chip *this = mtd->priv; + + if (!this->read_word) + this->read_word = onenand_readw; + if (!this->write_word) + this->write_word = onenand_writew; + + if (!this->command) + this->command = onenand_command; + if (!this->wait) + this->wait = onenand_wait; + + if (!this->read_bufferram) + this->read_bufferram = onenand_read_bufferram; + if (!this->write_bufferram) + this->write_bufferram = onenand_write_bufferram; + + if (onenand_probe(mtd)) + return -ENXIO; + + /* Set Sync. Burst Read after probing */ + if (this->mmcontrol) { + printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); + this->read_bufferram = onenand_sync_read_bufferram; + } + + onenand_unlock(mtd, 0, mtd->size); + + return onenand_default_bbt(mtd); +} + +/** + * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device + * @param mtd MTD device structure + */ +void onenand_release(struct mtd_info *mtd) +{ +} + +/* + * OneNAND initialization at U-Boot + */ +struct mtd_info onenand_mtd; +struct onenand_chip onenand_chip; + +void onenand_init(void) +{ + memset(&onenand_mtd, 0, sizeof(struct mtd_info)); + memset(&onenand_chip, 0, sizeof(struct onenand_chip)); + + onenand_chip.base = (void *)CFG_ONENAND_BASE; + onenand_mtd.priv = &onenand_chip; + + onenand_scan(&onenand_mtd, 1); + + puts("OneNAND: "); + print_size(onenand_mtd.size, "\n"); +} + +#endif /* CONFIG_CMD_ONENAND */ From 17aa2800457df0c06b41516f46f126712c196219 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Mon, 10 Sep 2007 17:14:34 +0900 Subject: [PATCH 36/73] OneNAND support (take #2) [PATCH 2/3] OneNAND support (take #2) OneNAND support at U-Boot Signed-off-by: Kyungmin Park --- drivers/onenand/Makefile | 44 ++++++ drivers/onenand/onenand_bbt.c | 265 ++++++++++++++++++++++++++++++++++ 2 files changed, 309 insertions(+) create mode 100644 drivers/onenand/Makefile create mode 100644 drivers/onenand/onenand_bbt.c diff --git a/drivers/onenand/Makefile b/drivers/onenand/Makefile new file mode 100644 index 0000000000..5d7a471d83 --- /dev/null +++ b/drivers/onenand/Makefile @@ -0,0 +1,44 @@ +# +# Copyright (C) 2005-2007 Samsung Electronics. +# Kyungmin Park +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libonenand.a + +COBJS := onenand_base.o onenand_bbt.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/drivers/onenand/onenand_bbt.c b/drivers/onenand/onenand_bbt.c new file mode 100644 index 0000000000..5a610ee5ea --- /dev/null +++ b/drivers/onenand/onenand_bbt.c @@ -0,0 +1,265 @@ +/* + * linux/drivers/mtd/onenand/onenand_bbt.c + * + * Bad Block Table support for the OneNAND driver + * + * Copyright(c) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * TODO: + * Split BBT core and chip specific BBT. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#ifdef CONFIG_CMD_ONENAND + +#include +#include +#include +#include + +#include + +/** + * check_short_pattern - [GENERIC] check if a pattern is in the buffer + * @param buf the buffer to search + * @param len the length of buffer to search + * @param paglen the pagelength + * @param td search pattern descriptor + * + * Check for a pattern at the given place. Used to search bad block + * tables and good / bad block identifiers. Same as check_pattern, but + * no optional empty check and the pattern is expected to start + * at offset 0. + */ +static int check_short_pattern(uint8_t * buf, int len, int paglen, + struct nand_bbt_descr *td) +{ + int i; + uint8_t *p = buf; + + /* Compare the pattern */ + for (i = 0; i < td->len; i++) { + if (p[i] != td->pattern[i]) + return -1; + } + return 0; +} + +/** + * create_bbt - [GENERIC] Create a bad block table by scanning the device + * @param mtd MTD device structure + * @param buf temporary buffer + * @param bd descriptor for the good/bad block search pattern + * @param chip create the table for a specific chip, -1 read all chips. + * Applies only if NAND_BBT_PERCHIP option is set + * + * Create a bad block table by scanning the device + * for the given good/bad block identify pattern + */ +static int create_bbt(struct mtd_info *mtd, uint8_t * buf, + struct nand_bbt_descr *bd, int chip) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int i, j, numblocks, len, scanlen; + int startblock; + loff_t from; + size_t readlen, ooblen; + + printk(KERN_INFO "Scanning device for bad blocks\n"); + + len = 1; + + /* We need only read few bytes from the OOB area */ + scanlen = ooblen = 0; + readlen = bd->len; + + /* chip == -1 case only */ + /* Note that numblocks is 2 * (real numblocks) here; + * see i += 2 below as it makses shifting and masking less painful + */ + numblocks = mtd->size >> (bbm->bbt_erase_shift - 1); + startblock = 0; + from = 0; + + for (i = startblock; i < numblocks;) { + int ret; + + for (j = 0; j < len; j++) { + size_t retlen; + + /* No need to read pages fully, + * just read required OOB bytes */ + ret = onenand_read_oob(mtd, + from + j * mtd->oobblock + + bd->offs, readlen, &retlen, + &buf[0]); + + if (ret && ret != -EAGAIN) { + printk("ret = %d\n", ret); + return ret; + } + + if (check_short_pattern + (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) { + bbm->bbt[i >> 3] |= 0x03 << (i & 0x6); + printk(KERN_WARNING + "Bad eraseblock %d at 0x%08x\n", i >> 1, + (unsigned int)from); + break; + } + } + i += 2; + from += (1 << bbm->bbt_erase_shift); + } + + return 0; +} + +/** + * onenand_memory_bbt - [GENERIC] create a memory based bad block table + * @param mtd MTD device structure + * @param bd descriptor for the good/bad block search pattern + * + * The function creates a memory based bbt by scanning the device + * for manufacturer / software marked good / bad blocks + */ +static inline int onenand_memory_bbt(struct mtd_info *mtd, + struct nand_bbt_descr *bd) +{ + unsigned char data_buf[MAX_ONENAND_PAGESIZE]; + + bd->options &= ~NAND_BBT_SCANEMPTY; + return create_bbt(mtd, data_buf, bd, -1); +} + +/** + * onenand_isbad_bbt - [OneNAND Interface] Check if a block is bad + * @param mtd MTD device structure + * @param offs offset in the device + * @param allowbbt allow access to bad block table region + */ +static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int block; + uint8_t res; + + /* Get block number * 2 */ + block = (int)(offs >> (bbm->bbt_erase_shift - 1)); + res = (bbm->bbt[block >> 3] >> (block & 0x06)) & 0x03; + + DEBUG(MTD_DEBUG_LEVEL2, + "onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n", + (unsigned int)offs, block >> 1, res); + + switch ((int)res) { + case 0x00: + return 0; + case 0x01: + return 1; + case 0x02: + return allowbbt ? 0 : 1; + } + + return 1; +} + +/** + * onenand_scan_bbt - [OneNAND Interface] scan, find, read and maybe create bad block table(s) + * @param mtd MTD device structure + * @param bd descriptor for the good/bad block search pattern + * + * The function checks, if a bad block table(s) is/are already + * available. If not it scans the device for manufacturer + * marked good / bad blocks and writes the bad block table(s) to + * the selected place. + * + * The bad block table memory is allocated here. It must be freed + * by calling the onenand_free_bbt function. + * + */ +int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm = this->bbm; + int len, ret = 0; + + len = mtd->size >> (this->erase_shift + 2); + /* Allocate memory (2bit per block) */ + bbm->bbt = malloc(len); + if (!bbm->bbt) { + printk(KERN_ERR "onenand_scan_bbt: Out of memory\n"); + return -ENOMEM; + } + /* Clear the memory bad block table */ + memset(bbm->bbt, 0x00, len); + + /* Set the bad block position */ + bbm->badblockpos = ONENAND_BADBLOCK_POS; + + /* Set erase shift */ + bbm->bbt_erase_shift = this->erase_shift; + + if (!bbm->isbad_bbt) + bbm->isbad_bbt = onenand_isbad_bbt; + + /* Scan the device to build a memory based bad block table */ + if ((ret = onenand_memory_bbt(mtd, bd))) { + printk(KERN_ERR + "onenand_scan_bbt: Can't scan flash and build the RAM-based BBT\n"); + free(bbm->bbt); + bbm->bbt = NULL; + } + + return ret; +} + +/* + * Define some generic bad / good block scan pattern which are used + * while scanning a device for factory marked good / bad blocks. + */ +static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; + +static struct nand_bbt_descr largepage_memorybased = { + .options = 0, + .offs = 0, + .len = 2, + .pattern = scan_ff_pattern, +}; + +/** + * onenand_default_bbt - [OneNAND Interface] Select a default bad block table for the device + * @param mtd MTD device structure + * + * This function selects the default bad block table + * support for the device and calls the onenand_scan_bbt function + */ +int onenand_default_bbt(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + struct bbm_info *bbm; + + this->bbm = malloc(sizeof(struct bbm_info)); + if (!this->bbm) + return -ENOMEM; + + bbm = this->bbm; + + memset(bbm, 0, sizeof(struct bbm_info)); + + /* 1KB page has same configuration as 2KB page */ + if (!bbm->badblock_pattern) + bbm->badblock_pattern = &largepage_memorybased; + + return onenand_scan_bbt(mtd, bbm->badblock_pattern); +} + +#endif /* CFG_CMD_ONENAND */ From d7e8ce101a4a45ed6ed45739fc2de5f87b13f7f1 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Mon, 10 Sep 2007 17:15:14 +0900 Subject: [PATCH 37/73] OneNAND support (take #2) [PATCH 3/3] OneNAND support (take #2) OneNAND support at U-Boot Signed-off-by: Kyungmin Park --- Makefile | 1 + common/Makefile | 3 +- common/cmd_nvedit.c | 9 +- common/cmd_onenand.c | 155 ++++++++++++++++++++++++++ common/env_onenand.c | 134 +++++++++++++++++++++++ include/config_cmd_all.h | 1 + include/linux/mtd/bbm.h | 127 ++++++++++++++++++++++ include/linux/mtd/onenand.h | 143 ++++++++++++++++++++++++ include/linux/mtd/onenand_regs.h | 181 +++++++++++++++++++++++++++++++ include/onenand_uboot.h | 39 +++++++ lib_arm/board.c | 8 ++ 11 files changed, 797 insertions(+), 4 deletions(-) create mode 100644 common/cmd_onenand.c create mode 100644 common/env_onenand.c create mode 100644 include/linux/mtd/bbm.h create mode 100644 include/linux/mtd/onenand.h create mode 100644 include/linux/mtd/onenand_regs.h create mode 100644 include/onenand_uboot.h diff --git a/Makefile b/Makefile index 85885b166a..c35f022338 100644 --- a/Makefile +++ b/Makefile @@ -211,6 +211,7 @@ LIBS += drivers/libdrivers.a LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/nand/libnand.a LIBS += drivers/nand_legacy/libnand_legacy.a +LIBS += drivers/onenand/libonenand.a LIBS += drivers/net/libnet.a ifeq ($(CPU),mpc83xx) LIBS += drivers/qe/qe.a diff --git a/common/Makefile b/common/Makefile index ef7d097078..fde5ad903d 100644 --- a/common/Makefile +++ b/common/Makefile @@ -37,13 +37,14 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o cmd_autoscript.o \ cmd_load.o cmd_log.o \ cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ cmd_nand.o cmd_net.o cmd_nvedit.o \ + cmd_onenand.o \ cmd_pci.o cmd_pcmcia.o cmd_portio.o \ cmd_reginfo.o cmd_reiser.o cmd_sata.o cmd_scsi.o cmd_spi.o \ cmd_universe.o cmd_usb.o cmd_vfd.o \ command.o console.o cyclon2.o devices.o dlmalloc.o docecc.o \ environment.o env_common.o \ env_nand.o env_dataflash.o env_flash.o env_eeprom.o \ - env_nvram.o env_nowhere.o \ + env_onenand.o env_nvram.o env_nowhere.o \ exports.o \ fdt_support.o flash.o fpga.o ft_build.o \ hush.o kgdb.o lcd.o lists.o lynxkdi.o \ diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 1db0fc3c03..6770408810 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -57,8 +57,9 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CFG_ENV_IS_IN_FLASH) && \ !defined(CFG_ENV_IS_IN_DATAFLASH) && \ !defined(CFG_ENV_IS_IN_NAND) && \ + !defined(CFG_ENV_IS_IN_ONENAND) && \ !defined(CFG_ENV_IS_NOWHERE) -# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|NOWHERE} +# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|NOWHERE} #endif #define XMK_STR(x) #x @@ -553,7 +554,8 @@ int getenv_r (char *name, char *buf, unsigned len) #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { extern char * env_name_spec; @@ -608,7 +610,8 @@ U_BOOT_CMD( #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) U_BOOT_CMD( saveenv, 1, 0, do_saveenv, "saveenv - save environment variables to persistent storage\n", diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c new file mode 100644 index 0000000000..dcda099c84 --- /dev/null +++ b/common/cmd_onenand.c @@ -0,0 +1,155 @@ +/* + * U-Boot command for OneNAND support + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#ifdef CONFIG_CMD_ONENAND + +#include +#include +#include + +#include + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + int ret = 0; + + switch (argc) { + case 0: + case 1: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + + case 2: + if (strncmp(argv[1], "open", 4) == 0) { + onenand_init(); + return 0; + } + onenand_print_device_info(onenand_chip.device_id, 1); + return 0; + + default: + /* At least 4 args */ + if (strncmp(argv[1], "erase", 5) == 0) { + struct erase_info instr; + ulong start, end; + ulong block; + + start = simple_strtoul(argv[2], NULL, 10); + end = simple_strtoul(argv[3], NULL, 10); + start -= (unsigned long)onenand_chip.base; + end -= (unsigned long)onenand_chip.base; + + if (!end || end < 0) + end = start; + + printf("Erase block from %d to %d\n", start, end); + + for (block = start; block <= end; block++) { + instr.addr = block << onenand_chip.erase_shift; + instr.len = 1 << onenand_chip.erase_shift; + ret = onenand_erase(&onenand_mtd, &instr); + if (ret) { + printf("erase failed %d\n", block); + break; + } + } + + return 0; + } + + if (strncmp(argv[1], "read", 4) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong ofs = simple_strtoul(argv[3], NULL, 16); + size_t len = simple_strtoul(argv[4], NULL, 16); + size_t retlen = 0; + int oob = strncmp(argv[1], "read.oob", 8) ? 0 : 1; + + ofs -= (unsigned long)onenand_chip.base; + + if (oob) + onenand_read_oob(&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf("Done\n"); + + return 0; + } + + if (strncmp(argv[1], "write", 5) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong ofs = simple_strtoul(argv[3], NULL, 16); + size_t len = simple_strtoul(argv[4], NULL, 16); + size_t retlen = 0; + + ofs -= (unsigned long)onenand_chip.base; + + onenand_write(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf("Done\n"); + + return 0; + } + + if (strncmp(argv[1], "block", 5) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong block = simple_strtoul(argv[3], NULL, 10); + ulong page = simple_strtoul(argv[4], NULL, 10); + size_t len = simple_strtol(argv[5], NULL, 10); + size_t retlen = 0; + ulong ofs; + int oob = strncmp(argv[1], "block.oob", 9) ? 0 : 1; + + ofs = block << onenand_chip.erase_shift; + if (page) + ofs += page << onenand_chip.page_shift; + + if (!len) { + if (oob) + len = 64; + else + len = 512; + } + + if (oob) + onenand_read_oob(&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + return 0; + } + + break; + } + + return 0; +} + +U_BOOT_CMD( + onenand, 6, 1, do_onenand, + "onenand - OneNAND sub-system\n", + "info - show available OneNAND devices\n" + "onenand read[.oob] addr ofs len - read data at ofs with len to addr\n" + "onenand write addr ofs len - write data at ofs with len from addr\n" + "onenand erase saddr eaddr - erase block start addr to end addr\n" + "onenand block[.oob] addr block [page] [len] - " + "read data with (block [, page]) to addr" +); + +#endif /* CONFIG_CMD_ONENAND */ diff --git a/common/env_onenand.c b/common/env_onenand.c new file mode 100644 index 0000000000..66107f91f1 --- /dev/null +++ b/common/env_onenand.c @@ -0,0 +1,134 @@ +/* + * (C) Copyright 2005-2007 Samsung Electronics + * Kyungmin Park + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +#if defined(CFG_ENV_IS_IN_ONENAND) /* Environment is in OneNAND */ + +#include +#include +#include +#include + +#include +#include +#include + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +/* References to names in env_common.c */ +extern uchar default_environment[]; + +#define ONENAND_ENV_SIZE(mtd) (mtd.oobblock - ENV_HEADER_SIZE) + +char *env_name_spec = "OneNAND"; + +#ifdef ENV_IS_EMBEDDED +extern uchar environment[]; +env_t *env_ptr = (env_t *) (&environment[0]); +#else /* ! ENV_IS_EMBEDDED */ +static unsigned char onenand_env[MAX_ONENAND_PAGESIZE]; +env_t *env_ptr = (env_t *) onenand_env; +#endif /* ENV_IS_EMBEDDED */ + +uchar env_get_char_spec(int index) +{ + DECLARE_GLOBAL_DATA_PTR; + + return (*((uchar *) (gd->env_addr + index))); +} + +void env_relocate_spec(void) +{ + DECLARE_GLOBAL_DATA_PTR; + unsigned long env_addr; + int use_default = 0; + int retlen; + + env_addr = CFG_ENV_ADDR; + env_addr -= (unsigned long)onenand_chip.base; + + /* Check OneNAND exist */ + if (onenand_mtd.oobblock) + /* Ignore read fail */ + onenand_read(&onenand_mtd, env_addr, onenand_mtd.oobblock, + &retlen, (u_char *) env_ptr); + else + onenand_mtd.oobblock = MAX_ONENAND_PAGESIZE; + + if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)) != + env_ptr->crc) + use_default = 1; + + if (use_default) { + memcpy(env_ptr->data, default_environment, + ONENAND_ENV_SIZE(onenand_mtd)); + env_ptr->crc = + crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)); + } + + gd->env_addr = (ulong) & env_ptr->data; + gd->env_valid = 1; +} + +int saveenv(void) +{ + unsigned long env_addr = CFG_ENV_ADDR; + struct erase_info instr; + int retlen; + + instr.len = CFG_ENV_SIZE; + instr.addr = env_addr; + instr.addr -= (unsigned long)onenand_chip.base; + if (onenand_erase(&onenand_mtd, &instr)) { + printf("OneNAND: erase failed at 0x%08x\n", env_addr); + return 1; + } + + /* update crc */ + env_ptr->crc = + crc32(0, env_ptr->data, onenand_mtd.oobblock - ENV_HEADER_SIZE); + + env_addr -= (unsigned long)onenand_chip.base; + if (onenand_write(&onenand_mtd, env_addr, onenand_mtd.oobblock, &retlen, + (u_char *) env_ptr)) { + printf("OneNAND: write failed at 0x%08x\n", instr.addr); + return 2; + } + + return 0; +} + +int env_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* use default */ + gd->env_addr = (ulong) & default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +#endif /* CFG_ENV_IS_IN_ONENAND */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 3d91e99b97..f8eca87a84 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -59,6 +59,7 @@ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_ONENAND /* OneNAND support */ #define CONFIG_CMD_PCI /* pciinfo */ #define CONFIG_CMD_PCMCIA /* PCMCIA support */ #define CONFIG_CMD_PING /* ping support */ diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h new file mode 100644 index 0000000000..f194cf1b3b --- /dev/null +++ b/include/linux/mtd/bbm.h @@ -0,0 +1,127 @@ +/* + * linux/include/linux/mtd/bbm.h + * + * NAND family Bad Block Management (BBM) header file + * - Bad Block Table (BBT) implementation + * + * Copyright (c) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * Copyright (c) 2000-2005 + * Thomas Gleixner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __LINUX_MTD_BBM_H +#define __LINUX_MTD_BBM_H + +/* The maximum number of NAND chips in an array */ +#ifndef NAND_MAX_CHIPS +#define NAND_MAX_CHIPS 8 +#endif + +/** + * struct nand_bbt_descr - bad block table descriptor + * @param options options for this descriptor + * @param pages the page(s) where we find the bbt, used with + * option BBT_ABSPAGE when bbt is searched, + * then we store the found bbts pages here. + * Its an array and supports up to 8 chips now + * @param offs offset of the pattern in the oob area of the page + * @param veroffs offset of the bbt version counter in the oob are of the page + * @param version version read from the bbt page during scan + * @param len length of the pattern, if 0 no pattern check is performed + * @param maxblocks maximum number of blocks to search for a bbt. This number of + * blocks is reserved at the end of the device + * where the tables are written. + * @param reserved_block_code if non-0, this pattern denotes a reserved + * (rather than bad) block in the stored bbt + * @param pattern pattern to identify bad block table or factory marked + * good / bad blocks, can be NULL, if len = 0 + * + * Descriptor for the bad block table marker and the descriptor for the + * pattern which identifies good and bad blocks. The assumption is made + * that the pattern and the version count are always located in the oob area + * of the first block. + */ +struct nand_bbt_descr { + int options; + int pages[NAND_MAX_CHIPS]; + int offs; + int veroffs; + uint8_t version[NAND_MAX_CHIPS]; + int len; + int maxblocks; + int reserved_block_code; + uint8_t *pattern; +}; + +/* Options for the bad block table descriptors */ + +/* The number of bits used per block in the bbt on the device */ +#define NAND_BBT_NRBITS_MSK 0x0000000F +#define NAND_BBT_1BIT 0x00000001 +#define NAND_BBT_2BIT 0x00000002 +#define NAND_BBT_4BIT 0x00000004 +#define NAND_BBT_8BIT 0x00000008 +/* The bad block table is in the last good block of the device */ +#define NAND_BBT_LASTBLOCK 0x00000010 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_ABSPAGE 0x00000020 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_SEARCH 0x00000040 +/* bbt is stored per chip on multichip devices */ +#define NAND_BBT_PERCHIP 0x00000080 +/* bbt has a version counter at offset veroffs */ +#define NAND_BBT_VERSION 0x00000100 +/* Create a bbt if none axists */ +#define NAND_BBT_CREATE 0x00000200 +/* Search good / bad pattern through all pages of a block */ +#define NAND_BBT_SCANALLPAGES 0x00000400 +/* Scan block empty during good / bad block scan */ +#define NAND_BBT_SCANEMPTY 0x00000800 +/* Write bbt if neccecary */ +#define NAND_BBT_WRITE 0x00001000 +/* Read and write back block contents when writing bbt */ +#define NAND_BBT_SAVECONTENT 0x00002000 +/* Search good / bad pattern on the first and the second page */ +#define NAND_BBT_SCAN2NDPAGE 0x00004000 + +/* The maximum number of blocks to scan for a bbt */ +#define NAND_BBT_SCAN_MAXBLOCKS 4 + +/* + * Constants for oob configuration + */ +#define ONENAND_BADBLOCK_POS 0 + +/** + * struct bbt_info - [GENERIC] Bad Block Table data structure + * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry + * @param badblockpos [INTERN] position of the bad block marker in the oob area + * @param bbt [INTERN] bad block table pointer + * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan + * @param priv [OPTIONAL] pointer to private bbm date + */ +struct bbm_info { + int bbt_erase_shift; + int badblockpos; + int options; + + uint8_t *bbt; + + int (*isbad_bbt) (struct mtd_info * mtd, loff_t ofs, int allowbbt); + + /* TODO Add more NAND specific fileds */ + struct nand_bbt_descr *badblock_pattern; + + void *priv; +}; + +/* OneNAND BBT interface */ +extern int onenand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd); +extern int onenand_default_bbt (struct mtd_info *mtd); + +#endif /* __LINUX_MTD_BBM_H */ diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h new file mode 100644 index 0000000000..4b0c2dfaaa --- /dev/null +++ b/include/linux/mtd/onenand.h @@ -0,0 +1,143 @@ +/* + * linux/include/linux/mtd/onenand.h + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MTD_ONENAND_H +#define __LINUX_MTD_ONENAND_H + +#include + +/* Note: The header order is impoertant */ +#include + +#include + +#define MAX_BUFFERRAM 2 +#define MAX_ONENAND_PAGESIZE (2048 + 64) + +/* Scan and identify a OneNAND device */ +extern int onenand_scan (struct mtd_info *mtd, int max_chips); +/* Free resources held by the OneNAND device */ +extern void onenand_release (struct mtd_info *mtd); + +/** + * onenand_state_t - chip states + * Enumeration for OneNAND flash chip state + */ +typedef enum { + FL_READY, + FL_READING, + FL_WRITING, + FL_ERASING, + FL_SYNCING, + FL_UNLOCKING, + FL_LOCKING, +} onenand_state_t; + +/** + * struct onenand_bufferram - OneNAND BufferRAM Data + * @param block block address in BufferRAM + * @param page page address in BufferRAM + * @param valid valid flag + */ +struct onenand_bufferram { + int block; + int page; + int valid; +}; + +/** + * struct onenand_chip - OneNAND Private Flash Chip Data + * @param base [BOARDSPECIFIC] address to access OneNAND + * @param chipsize [INTERN] the size of one chip for multichip arrays + * @param device_id [INTERN] device ID + * @param verstion_id [INTERN] version ID + * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about + * @param erase_shift [INTERN] number of address bits in a block + * @param page_shift [INTERN] number of address bits in a page + * @param ppb_shift [INTERN] number of address bits in a pages per block + * @param page_mask [INTERN] a page per block mask + * @param bufferam_index [INTERN] BufferRAM index + * @param bufferam [INTERN] BufferRAM info + * @param readw [REPLACEABLE] hardware specific function for read short + * @param writew [REPLACEABLE] hardware specific function for write short + * @param command [REPLACEABLE] hardware specific function for writing commands to the chip + * @param wait [REPLACEABLE] hardware specific function for wait on ready + * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip + * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress + * @param state [INTERN] the current state of the OneNAND device + * @param autooob [REPLACEABLE] the default (auto)placement scheme + * @param priv [OPTIONAL] pointer to private chip date + */ +struct onenand_chip { + void __iomem *base; + unsigned int chipsize; + unsigned int device_id; + unsigned int options; + + unsigned int erase_shift; + unsigned int page_shift; + unsigned int ppb_shift; /* Pages per block shift */ + unsigned int page_mask; + + unsigned int bufferram_index; + struct onenand_bufferram bufferram[MAX_BUFFERRAM]; + + int (*command) (struct mtd_info * mtd, int cmd, loff_t address, + size_t len); + int (*wait) (struct mtd_info * mtd, int state); + int (*read_bufferram) (struct mtd_info * mtd, int area, + unsigned char *buffer, int offset, size_t count); + int (*write_bufferram) (struct mtd_info * mtd, int area, + const unsigned char *buffer, int offset, + size_t count); + unsigned short (*read_word) (void __iomem * addr); + void (*write_word) (unsigned short value, void __iomem * addr); + void (*mmcontrol) (struct mtd_info * mtd, int sync_read); + + spinlock_t chip_lock; + wait_queue_head_t wq; + onenand_state_t state; + + struct nand_oobinfo *autooob; + + void *bbm; + + void *priv; +}; + +#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) +#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) +#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) + +/* + * Options bits + */ +#define ONENAND_CONT_LOCK (0x0001) + +/* + * OneNAND Flash Manufacturer ID Codes + */ +#define ONENAND_MFR_SAMSUNG 0xec +#define ONENAND_MFR_UNKNOWN 0x00 + +/** + * struct nand_manufacturers - NAND Flash Manufacturer ID Structure + * @param name: Manufacturer name + * @param id: manufacturer ID code of device. +*/ +struct onenand_manufacturers { + int id; + char *name; +}; + +#endif /* __LINUX_MTD_ONENAND_H */ diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h new file mode 100644 index 0000000000..c8a9f3e904 --- /dev/null +++ b/include/linux/mtd/onenand_regs.h @@ -0,0 +1,181 @@ +/* + * linux/include/linux/mtd/onenand_regs.h + * + * OneNAND Register header file + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ONENAND_REG_H +#define __ONENAND_REG_H + +/* Memory Address Map Translation (Word order) */ +#define ONENAND_MEMORY_MAP(x) ((x) << 1) + +/* + * External BufferRAM area + */ +#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) +#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) +#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) + +/* + * OneNAND Registers + */ +#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) +#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) +#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) +#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) +#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) +#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) +#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) + +#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) +#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) +#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) +#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) +#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) +#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) +#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) +#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) + +#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) +#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) +#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) +#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) +#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) +#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) +#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) +#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) +#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) + +#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) +#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) +#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) +#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) +#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) +#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) +#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) +#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) +#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) + +/* + * Device ID Register F001h (R) + */ +#define ONENAND_DEVICE_DENSITY_SHIFT (4) +#define ONENAND_DEVICE_IS_DDP (1 << 3) +#define ONENAND_DEVICE_IS_DEMUX (1 << 2) +#define ONENAND_DEVICE_VCC_MASK (0x3) + +#define ONENAND_DEVICE_DENSITY_512Mb (0x002) + +/* + * Version ID Register F002h (R) + */ +#define ONENAND_VERSION_PROCESS_SHIFT (8) + +/* + * Start Address 1 F100h (R/W) + */ +#define ONENAND_DDP_SHIFT (15) + +/* + * Start Address 8 F107h (R/W) + */ +#define ONENAND_FPA_MASK (0x3f) +#define ONENAND_FPA_SHIFT (2) +#define ONENAND_FSA_MASK (0x03) + +/* + * Start Buffer Register F200h (R/W) + */ +#define ONENAND_BSA_MASK (0x03) +#define ONENAND_BSA_SHIFT (8) +#define ONENAND_BSA_BOOTRAM (0 << 2) +#define ONENAND_BSA_DATARAM0 (2 << 2) +#define ONENAND_BSA_DATARAM1 (3 << 2) +#define ONENAND_BSC_MASK (0x03) + +/* + * Command Register F220h (R/W) + */ +#define ONENAND_CMD_READ (0x00) +#define ONENAND_CMD_READOOB (0x13) +#define ONENAND_CMD_PROG (0x80) +#define ONENAND_CMD_PROGOOB (0x1A) +#define ONENAND_CMD_UNLOCK (0x23) +#define ONENAND_CMD_LOCK (0x2A) +#define ONENAND_CMD_LOCK_TIGHT (0x2C) +#define ONENAND_CMD_ERASE (0x94) +#define ONENAND_CMD_RESET (0xF0) +#define ONENAND_CMD_READID (0x90) + +/* NOTE: Those are not *REAL* commands */ +#define ONENAND_CMD_BUFFERRAM (0x1978) + +/* + * System Configuration 1 Register F221h (R, R/W) + */ +#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) +#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) +#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) +#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) +#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) +#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) +#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) +#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) +#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) +#define ONENAND_SYS_CFG1_BRL_SHIFT (12) +#define ONENAND_SYS_CFG1_BL_32 (4 << 9) +#define ONENAND_SYS_CFG1_BL_16 (3 << 9) +#define ONENAND_SYS_CFG1_BL_8 (2 << 9) +#define ONENAND_SYS_CFG1_BL_4 (1 << 9) +#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) +#define ONENAND_SYS_CFG1_BL_SHIFT (9) +#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) +#define ONENAND_SYS_CFG1_RDY (1 << 7) +#define ONENAND_SYS_CFG1_INT (1 << 6) +#define ONENAND_SYS_CFG1_IOBE (1 << 5) +#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) + +/* + * Controller Status Register F240h (R) + */ +#define ONENAND_CTRL_ONGO (1 << 15) +#define ONENAND_CTRL_LOCK (1 << 14) +#define ONENAND_CTRL_LOAD (1 << 13) +#define ONENAND_CTRL_PROGRAM (1 << 12) +#define ONENAND_CTRL_ERASE (1 << 11) +#define ONENAND_CTRL_ERROR (1 << 10) +#define ONENAND_CTRL_RSTB (1 << 7) + +/* + * Interrupt Status Register F241h (R) + */ +#define ONENAND_INT_MASTER (1 << 15) +#define ONENAND_INT_READ (1 << 7) +#define ONENAND_INT_WRITE (1 << 6) +#define ONENAND_INT_ERASE (1 << 5) +#define ONENAND_INT_RESET (1 << 4) +#define ONENAND_INT_CLEAR (0 << 0) + +/* + * NAND Flash Write Protection Status Register F24Eh (R) + */ +#define ONENAND_WP_US (1 << 2) +#define ONENAND_WP_LS (1 << 1) +#define ONENAND_WP_LTS (1 << 0) + +/* + * ECC Status Reigser FF00h (R) + */ +#define ONENAND_ECC_1BIT (1 << 0) +#define ONENAND_ECC_2BIT (1 << 1) +#define ONENAND_ECC_2BIT_ALL (0xAAAA) + +#endif /* __ONENAND_REG_H */ diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h new file mode 100644 index 0000000000..bd1831ea6d --- /dev/null +++ b/include/onenand_uboot.h @@ -0,0 +1,39 @@ +/* + * Header file for OneNAND support for U-Boot + * + * Adaptation from kernel to U-Boot + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UBOOT_ONENAND_H +#define __UBOOT_ONENAND_H + +struct kvec { + void *iov_base; + size_t iov_len; +}; + +typedef int spinlock_t; +typedef int wait_queue_head_t; + +/* Functions */ +extern void onenand_init(void); +extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, const u_char * buf); +extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr); + +extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len); + +extern void onenand_print_device_info(int device, int verbose); + +#endif /* __UBOOT_ONENAND_H */ diff --git a/lib_arm/board.c b/lib_arm/board.c index d28afc52f9..634e4d9438 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -58,6 +58,10 @@ DECLARE_GLOBAL_DATA_PTR; void nand_init (void); #endif +#if defined(CONFIG_CMD_ONENAND) +void onenand_init(void); +#endif + ulong monitor_flash_len; #ifdef CONFIG_HAS_DATAFLASH @@ -301,6 +305,10 @@ void start_armboot (void) nand_init(); /* go init the NAND */ #endif +#if defined(CONFIG_CMD_ONENAND) + onenand_init(); +#endif + #ifdef CONFIG_HAS_DATAFLASH AT91F_DataflashInit(); dataflash_print_info(); From 30363e98fa470fbecea5e8bc0f1443352754f303 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 17 Sep 2007 08:20:47 +0200 Subject: [PATCH 38/73] Small whitespace cleanup of OneNAND patch Signed-off-by: Stefan Roese --- drivers/onenand/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/onenand/Makefile b/drivers/onenand/Makefile index 5d7a471d83..2049413327 100644 --- a/drivers/onenand/Makefile +++ b/drivers/onenand/Makefile @@ -1,6 +1,6 @@ # -# Copyright (C) 2005-2007 Samsung Electronics. -# Kyungmin Park +# Copyright (C) 2005-2007 Samsung Electronics. +# Kyungmin Park # # See file CREDITS for list of people who contributed to this # project. From 97213f32416ead885deafea86774e912ffd60ad0 Mon Sep 17 00:00:00 2001 From: David Saada Date: Mon, 17 Sep 2007 17:04:47 +0200 Subject: [PATCH 39/73] Description: Add NEC's PCI OHCI module ID to the USB OHCI driver Signed-off-by: David Saada --- drivers/usb_ohci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb_ohci.c b/drivers/usb_ohci.c index d6b745fadd..388827fd00 100644 --- a/drivers/usb_ohci.c +++ b/drivers/usb_ohci.c @@ -93,6 +93,7 @@ #ifdef CONFIG_PCI_OHCI static struct pci_device_id ohci_pci_ids[] = { {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */ + {0x1033, 0x0035}, /* NEC PCI OHCI module ids */ /* Please add supported PCI OHCI controller ids here */ {0, 0} }; From a4f3aab6dfbed6c29367c688bfb8a47eef62c225 Mon Sep 17 00:00:00 2001 From: Eirik Aanonsen Date: Wed, 12 Sep 2007 13:32:37 +0200 Subject: [PATCH 40/73] Add some comments to clocks in atstk1002.h This patch applies some clarifying comments to how the different clocks are setup according to atstk1002.h Some of the previous comments where stating wrongful information. Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index f7bf62c825..7533b0ef9c 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -39,8 +39,10 @@ #define CFG_HZ 1000 /* - * Set up the PLL to run at 199.5 MHz, the CPU to run at 1/2 the PLL - * frequency and the peripherals to run at 1/4 the PLL frequency. + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the + * PLL frequency. + * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz */ #define CONFIG_PLL 1 #define CFG_POWER_MANAGER 1 @@ -48,9 +50,25 @@ #define CFG_PLL0_DIV 1 #define CFG_PLL0_MUL 7 #define CFG_PLL0_SUPPRESS_CYCLES 16 +/* + * Set the CPU running at: + * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz + */ #define CFG_CLKDIV_CPU 0 +/* + * Set the HSB running at: + * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz + */ #define CFG_CLKDIV_HSB 1 +/* + * Set the PBA running at: + * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz + */ #define CFG_CLKDIV_PBA 2 +/* + * Set the PBB running at: + * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz + */ #define CFG_CLKDIV_PBB 1 /* From e80e585b00fbbab7ad1bf71619741f2c5b029ab7 Mon Sep 17 00:00:00 2001 From: Eirik Aanonsen Date: Tue, 18 Sep 2007 08:47:20 +0200 Subject: [PATCH 41/73] Update atstk1002 bootargs. Updates to atstk1002 U-Boot header file: - Changed bootargs: * Set the bootargs for at1002 to point to the SD-card partition instead * ... of the boot flash. * Removing the rootfstype since that argument are not needed. Signed-off-by: Eirik Aanonsen Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 7533b0ef9c..572ac23d3e 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -96,7 +96,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2 fbmem=600k" + "console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k rootwait=1" #define CONFIG_BOOTCOMMAND \ "fsload; bootm $(fileaddr)" From bd86220f58b99d6896198c385fda132f0c980915 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 18 Sep 2007 13:07:54 +0100 Subject: [PATCH 42/73] Move coloured led API to status_led.h Improve indentation in drivers/at45.c --- cpu/arm920t/start.S | 2 +- drivers/at45.c | 180 +++++++++++++++++---------------- include/asm-arm/coloured_led.h | 45 --------- include/status_led.h | 21 ++++ 4 files changed, 114 insertions(+), 134 deletions(-) mode change 100755 => 100644 drivers/at45.c delete mode 100644 include/asm-arm/coloured_led.h diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index df2ee20cbe..aefcdd1552 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,7 +27,7 @@ #include #include -#include +#include /* ************************************************************************* diff --git a/drivers/at45.c b/drivers/at45.c old mode 100755 new mode 100644 index f48d31776f..a075ebd5d7 --- a/drivers/at45.c +++ b/drivers/at45.c @@ -48,28 +48,27 @@ AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, /* process the address to obtain page address and byte address */ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << - pDataFlash->pDevice->page_offset) + (DataflashAddress % - (pDataFlash->pDevice-> - pages_size)); + pDataFlash->pDevice->page_offset) + + (DataflashAddress % (pDataFlash->pDevice->pages_size)); - /* fill the command buffer */ + /* fill the command buffer */ pDataFlash->pDataFlashDesc->command[0] = OpCode; if (pDataFlash->pDevice->pages_number >= 16384) { pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x0F000000) >> 24); + (unsigned char)((adr & 0x0F000000) >> 24); pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x00FF0000) >> 16); + (unsigned char)((adr & 0x00FF0000) >> 16); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((adr & 0x0000FF00) >> 8); + (unsigned char)((adr & 0x0000FF00) >> 8); pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)(adr & 0x000000FF); + (unsigned char)(adr & 0x000000FF); } else { pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x00FF0000) >> 16); + (unsigned char)((adr & 0x00FF0000) >> 16); pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x0000FF00) >> 8); + (unsigned char)((adr & 0x0000FF00) >> 8); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(adr & 0x000000FF); + (unsigned char)(adr & 0x000000FF); pDataFlash->pDataFlashDesc->command[4] = 0; } pDataFlash->pDataFlashDesc->command[5] = 0; @@ -78,10 +77,10 @@ AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, /* Initialize the SpiData structure for the spi write fuction */ pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize; pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize; /* send the command and read the data */ @@ -123,8 +122,8 @@ AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc) /* \brief wait for dataflash ready (bit7 of the status register == 1) */ /*----------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc - pDataFlashDesc, - unsigned int timeout) + pDataFlashDesc, + unsigned int timeout) { pDataFlashDesc->DataFlash_state = IDLE; @@ -149,16 +148,17 @@ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc /* : = data buffer size */ /* Return value : State of the dataflash */ /*--------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(AT91PS_DataFlash pDataFlash, - int src, - unsigned char *dataBuffer, - int sizeToRead) +AT91S_DataFlashStatus AT91F_DataFlashContinuousRead( + AT91PS_DataFlash pDataFlash, + int src, + unsigned char *dataBuffer, + int sizeToRead) { AT91S_DataFlashStatus status; /* Test the size to read in the device */ if ((src + sizeToRead) > - (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) + (pDataFlash->pDevice->pages_size * + (pDataFlash->pDevice->pages_number))) return DATAFLASH_MEMORY_OVERFLOW; pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; @@ -166,8 +166,8 @@ AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(AT91PS_DataFlash pDataFlash, pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead; - status = AT91F_DataFlashSendCommand - (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); + status = AT91F_DataFlashSendCommand( + pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); /* Send the command to the dataflash */ return (status); } @@ -196,8 +196,8 @@ AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash, /* Send the command to the dataflash */ if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_PGM_BUF1, - cmdsize, dest)); + return (AT91F_DataFlashSendCommand( + pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest)); } /*---------------------------------------------------------------------------*/ @@ -208,16 +208,17 @@ AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash, /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(AT91PS_DataFlash - pDataFlash, - unsigned char - BufferCommand, - unsigned int page) +AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( + AT91PS_DataFlash + pDataFlash, + unsigned char + BufferCommand, + unsigned int page) { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_PAGE_2_BUF1_TRF) - && (BufferCommand != DB_PAGE_2_BUF2_TRF)) + if ((BufferCommand != DB_PAGE_2_BUF1_TRF)&& + (BufferCommand != DB_PAGE_2_BUF2_TRF)) return DATAFLASH_BAD_COMMAND; /* no data to transmit or receive */ @@ -225,9 +226,9 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(AT91PS_DataFlash cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, - page * - pDataFlash->pDevice->pages_size)); + return (AT91F_DataFlashSendCommand( + pDataFlash, BufferCommand, cmdsize, + page * pDataFlash->pDevice->pages_size)); } /*-------------------------------------------------------------------------- */ @@ -240,16 +241,17 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(AT91PS_DataFlash /* : = data buffer size */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned char *dataBuffer, - unsigned int bufferAddress, - int SizeToWrite) +AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer( + AT91PS_DataFlash pDataFlash, + unsigned char BufferCommand, + unsigned char *dataBuffer, + unsigned int bufferAddress, + int SizeToWrite) { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_BUF1_WRITE) - && (BufferCommand != DB_BUF2_WRITE)) + if ((BufferCommand != DB_BUF1_WRITE) && + (BufferCommand != DB_BUF2_WRITE)) return DATAFLASH_BAD_COMMAND; /* buffer address must be lower than page size */ @@ -265,28 +267,28 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) { pDataFlash->pDataFlashDesc->command[2] = 0; pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice-> - byte_mask)) >> 8); + (unsigned char)(((unsigned int)(bufferAddress & + pDataFlash->pDevice-> + byte_mask)) >> 8); pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); + (unsigned char)((unsigned int)bufferAddress & 0x00FF); cmdsize = 5; } else { pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice-> - byte_mask)) >> 8); + (unsigned char)(((unsigned int)(bufferAddress & + pDataFlash->pDevice-> + byte_mask)) >> 8); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); + (unsigned char)((unsigned int)bufferAddress & 0x00FF); pDataFlash->pDataFlashDesc->command[4] = 0; cmdsize = 4; } pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize; pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize; pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; @@ -305,8 +307,9 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(AT91PS_DataFlash pDataFlash, /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PageErase(AT91PS_DataFlash pDataFlash, - unsigned int page) +AT91S_DataFlashStatus AT91F_PageErase( + AT91PS_DataFlash pDataFlash, + unsigned int page) { int cmdsize; /* Test if the buffer command is legal */ @@ -316,9 +319,9 @@ AT91S_DataFlashStatus AT91F_PageErase(AT91PS_DataFlash pDataFlash, cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_ERASE, cmdsize, - page * - pDataFlash->pDevice->pages_size)); + return (AT91F_DataFlashSendCommand(pDataFlash, + DB_PAGE_ERASE, cmdsize, + page * pDataFlash->pDevice->pages_size)); } /*---------------------------------------------------------------------------*/ @@ -329,8 +332,9 @@ AT91S_DataFlashStatus AT91F_PageErase(AT91PS_DataFlash pDataFlash, /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_BlockErase(AT91PS_DataFlash pDataFlash, - unsigned int block) +AT91S_DataFlashStatus AT91F_BlockErase( + AT91PS_DataFlash pDataFlash, + unsigned int block) { int cmdsize; /* Test if the buffer command is legal */ @@ -340,8 +344,8 @@ AT91S_DataFlashStatus AT91F_BlockErase(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; return (AT91F_DataFlashSendCommand(pDataFlash, DB_BLOCK_ERASE, cmdsize, - block * 8 * - pDataFlash->pDevice->pages_size)); + block * 8 * + pDataFlash->pDevice->pages_size)); } /*---------------------------------------------------------------------------*/ @@ -353,15 +357,15 @@ AT91S_DataFlashStatus AT91F_BlockErase(AT91PS_DataFlash pDataFlash, /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int dest) + unsigned char BufferCommand, + unsigned int dest) { int cmdsize; /* Test if the buffer command is correct */ if ((BufferCommand != DB_BUF1_PAGE_PGM) && - (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && - (BufferCommand != DB_BUF2_PAGE_PGM) && - (BufferCommand != DB_BUF2_PAGE_ERASE_PGM)) + (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && + (BufferCommand != DB_BUF2_PAGE_PGM) && + (BufferCommand != DB_BUF2_PAGE_ERASE_PGM)) return DATAFLASH_BAD_COMMAND; /* no data to transmit or receive */ @@ -371,8 +375,8 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; /* Send the command to the dataflash */ - return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, - dest)); + return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, + cmdsize, dest)); } /*---------------------------------------------------------------------------*/ @@ -383,9 +387,9 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, /* : = Number of bytes to erase */ /*---------------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int size) + unsigned char *src, + unsigned int dest, + unsigned int size) { unsigned int page; unsigned int AdrInPage; @@ -399,10 +403,10 @@ AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, AT91C_TIMEOUT_WRDY); /*Update the SRAM buffer */ AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, - AdrInPage, size); + AdrInPage, size); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); /* Erase page if a 128 Mbits device */ if (pDataFlash->pDevice->pages_number >= 16384) { @@ -426,8 +430,8 @@ AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, /* : = data buffer size */ /*---------------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, - unsigned char *src, - int dest, int size) + unsigned char *src, + int dest, int size) { unsigned int length; unsigned int page; @@ -436,14 +440,14 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, AT91F_SpiEnable(pDataFlash->pDevice->cs); if ((dest + size) > (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) + (pDataFlash->pDevice->pages_number))) return DATAFLASH_MEMORY_OVERFLOW; /* If destination does not fit a page start address */ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) { - length = pDataFlash->pDevice->pages_size - - (dest % ((unsigned int) - (pDataFlash->pDevice->pages_size))); + length = + pDataFlash->pDevice->pages_size - + (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); if (size < length) length = size; @@ -465,9 +469,9 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, page = (unsigned int)dest / (pDataFlash->pDevice->pages_size); status = AT91F_DataFlashWriteBuffer(pDataFlash, - DB_BUF1_WRITE, src, 0, - pDataFlash->pDevice-> - pages_size); + DB_BUF1_WRITE, src, 0, + pDataFlash->pDevice-> + pages_size); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); @@ -478,7 +482,7 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, return DATAFLASH_ERROR; status = AT91F_WriteBufferToMain(pDataFlash, - DB_BUF1_PAGE_PGM, dest); + DB_BUF1_PAGE_PGM, dest); if (!status) return DATAFLASH_ERROR; @@ -517,20 +521,20 @@ int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash, AT91F_SpiEnable(pDataFlash->pDevice->cs); if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) + AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) return -1; while (size) { SizeToRead = (size < 0x8000) ? size : 0x8000; if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != - DATAFLASH_OK) + AT91C_TIMEOUT_WRDY) != + DATAFLASH_OK) return -1; if (AT91F_DataFlashContinuousRead(pDataFlash, addr, - (uchar *) buffer, - SizeToRead) != DATAFLASH_OK) + (uchar *) buffer, + SizeToRead) != DATAFLASH_OK) return -1; size -= SizeToRead; diff --git a/include/asm-arm/coloured_led.h b/include/asm-arm/coloured_led.h deleted file mode 100644 index f78a4b1004..0000000000 --- a/include/asm-arm/coloured_led.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2006 - * Atmel Nordic AB - * Ulf Samuelsson - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __LED_H -#define __LED_H - -#ifndef __ASSEMBLY__ -extern void coloured_LED_init (void); -extern void red_LED_on(void); -extern void red_LED_off(void); -extern void green_LED_on(void); -extern void green_LED_off(void); -extern void yellow_LED_on(void); -extern void yellow_LED_off(void); -#else - .extern LED_init - .extern red_LED_on - .extern red_LED_off - .extern yellow_LED_on - .extern yellow_LED_off - .extern green_LED_on - .extern green_LED_off -#endif -#endif diff --git a/include/status_led.h b/include/status_led.h index a646814255..74e2147cf9 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -383,6 +383,27 @@ extern void __led_set (led_id_t mask, int state); # include #endif +/* + * Coloured LEDs API + */ +#ifndef __ASSEMBLY__ +extern void coloured_LED_init (void); +extern void red_LED_on(void); +extern void red_LED_off(void); +extern void green_LED_on(void); +extern void green_LED_off(void); +extern void yellow_LED_on(void); +extern void yellow_LED_off(void); +#else + .extern LED_init + .extern red_LED_on + .extern red_LED_off + .extern yellow_LED_on + .extern yellow_LED_off + .extern green_LED_on + .extern green_LED_off +#endif + #endif /* CONFIG_STATUS_LED */ #endif /* _STATUS_LED_H_ */ From b90c045f035c3cc9b5d2edaed6048dfb74e40763 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:08:37 +0200 Subject: [PATCH 43/73] synchronizition with mainline --- Makefile | 11 +- board/xilinx/xupv2p/Makefile | 21 +- board/xilinx/xupv2p/config.mk | 6 +- board/xilinx/xupv2p/xparameters.h | 27 +-- common/cmd_jffs2.c | 36 +-- common/cmd_mfsl.c | 11 +- cpu/microblaze/cache.c | 2 +- cpu/microblaze/start.S | 6 +- cpu/microblaze/timer.c | 7 - drivers/net/Makefile | 3 +- drivers/net/xilinx_emac.c | 374 ----------------------------- drivers/net/xilinx_emac.h | 148 ------------ drivers/net/xilinx_emaclite.c | 376 ------------------------------ drivers/serial_xuartlite.c | 2 +- fs/Makefile | 2 +- fs/romfs/Makefile | 49 ---- fs/romfs/romfs.c | 240 ------------------- include/configs/ml401.h | 50 ++-- include/configs/suzaku.h | 18 +- include/configs/xupv2p.h | 63 ++--- lib_microblaze/time.c | 8 - 21 files changed, 119 insertions(+), 1341 deletions(-) delete mode 100644 drivers/net/xilinx_emac.c delete mode 100644 drivers/net/xilinx_emac.h delete mode 100644 drivers/net/xilinx_emaclite.c delete mode 100644 fs/romfs/Makefile delete mode 100644 fs/romfs/romfs.c diff --git a/Makefile b/Makefile index 63e7dcb01d..8d500f5349 100644 --- a/Makefile +++ b/Makefile @@ -144,7 +144,7 @@ ifeq ($(ARCH),m68k) CROSS_COMPILE = m68k-elf- endif ifeq ($(ARCH),microblaze) -CROSS_COMPILE = microblaze-uclinux- +CROSS_COMPILE = mb- endif ifeq ($(ARCH),blackfin) CROSS_COMPILE = bfin-uclinux- @@ -201,9 +201,8 @@ ifeq ($(CPU),ixp) LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a -LIBS += fs/cramfs/libcramfs.a fs/ext2/libext2fs.a fs/fat/libfat.a \ - fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a \ - fs/romfs/libromfs.a +LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ + fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += rtc/librtc.a @@ -326,14 +325,14 @@ depend dep: version tags ctags: ctags -w -o $(OBJTREE)/ctags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ + fs/cramfs fs/fat fs/fdos fs/jffs2 \ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` etags: etags -a -o $(OBJTREE)/etags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ + fs/cramfs fs/fat fs/fdos fs/jffs2 \ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile index 99e7047350..9ab5633626 100644 --- a/board/xilinx/xupv2p/Makefile +++ b/board/xilinx/xupv2p/Makefile @@ -22,17 +22,32 @@ # include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +$(shell mkdir -p $(obj)../xilinx_enet) +endif + +INCS := -I../common -I../xilinx_enet +CFLAGS += $(INCS) +HOST_CFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o +COBJS = $(BOARD).o \ + ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ + ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ + ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ + ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ + ../common/xbasic_types.o ../common/xdma_channel.o \ + ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ + ../common/xversion.o \ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $^ clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk index eedfb24d4f..c07b0b35b1 100644 --- a/board/xilinx/xupv2p/config.mk +++ b/board/xilinx/xupv2p/config.mk @@ -25,8 +25,8 @@ # Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 # -TEXT_BASE = 0x30000000 +TEXT_BASE = 0x38000000 -PLATFORM_CPPFLAGS += -mxl-pattern-compare PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mcpu=v5.00.c +PLATFORM_CPPFLAGS += -mno-xl-soft-div +PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h index 0bb7a805f4..a96c693c55 100644 --- a/board/xilinx/xupv2p/xparameters.h +++ b/board/xilinx/xupv2p/xparameters.h @@ -28,24 +28,17 @@ /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 -/* Microblaze is microblaze_0 */ -#define XILINX_USE_MSR_INSTR 1 -#define XILINX_PVR 0 -#define XILINX_FSL_NUMBER 0 - /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 7 +#define XILINX_INTC_NUM_INTR_INPUTS 11 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 0 +#define XILINX_TIMER_IRQ 1 /* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UARTLITE_BASEADDR 0x40600000 -#define XILINX_UARTLITE_BAUDRATE 115200 - -/* IIC doesn't exist */ +#define XILINX_UART_BASEADDR 0x40600000 +#define XILINX_UART_BAUDRATE 115200 /* GPIO is LEDs_4Bit*/ #define XILINX_GPIO_BASEADDR 0x40000000 @@ -58,10 +51,14 @@ /* Sysace Controller is SysACE_CompactFlash */ #define XILINX_SYSACE_BASEADDR 0x41800000 +#define XILINX_SYSACE_HIGHADDR 0x4180ffff #define XILINX_SYSACE_MEM_WIDTH 16 /* Ethernet controller is Ethernet_MAC */ -#define XILINX_EMAC_BASEADDR 0x40c00000 -#define XILINX_EMAC_DMA_PRESENT 3 -#define XILINX_EMAC_HALF_DUPLEX_EXIST 1 -#define XILINX_EMAC_MII_EXIST 1 +#define XPAR_XEMAC_NUM_INSTANCES 1 +#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 +#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 +#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff +#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 +#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 +#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 3e6061a520..513a226c43 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -85,7 +85,7 @@ */ /* - * JFFS2/CRAMFS/ROMFS support + * JFFS2/CRAMFS support */ #include #include @@ -175,11 +175,6 @@ extern int cramfs_load (char *loadoffset, struct part_info *info, char *filename extern int cramfs_ls (struct part_info *info, char *filename); extern int cramfs_info (struct part_info *info); -extern int romfs_check (struct part_info *info); -extern int romfs_load (char *loadoffset, struct part_info *info, char *filename); -extern int romfs_ls (struct part_info *info, char *filename); -extern int romfs_info (struct part_info *info); - static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num); /* command line only routines */ @@ -1879,22 +1874,14 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ - /* check partition type for JFFS2, cramfs, romfs */ - if (cramfs_check(part)) { - fsname = "CRAMFS"; - } else if (romfs_check(part)) { - fsname = "ROMFS"; - } else { - fsname = "JFFS2"; - } + /* check partition type for cramfs */ + fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); printf("### %s loading '%s' to 0x%lx\n", fsname, filename, offset); if (cramfs_check(part)) { size = cramfs_load ((char *) offset, part, filename); - } else if (romfs_check(part)){ - size = romfs_load ((char *) offset, part, filename); } else { - /* if this is not cramfs or romfs assume jffs2 */ + /* if this is not cramfs assume jffs2 */ size = jffs2_1pass_load((char *)offset, part, filename); } @@ -1941,10 +1928,8 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* check partition type for cramfs */ if (cramfs_check(part)) { ret = cramfs_ls (part, filename); - } else if (romfs_check(part)) { - ret = romfs_ls (part, filename); } else { - /* if this is not cramfs or romfs assume jffs2 */ + /* if this is not cramfs assume jffs2 */ ret = jffs2_1pass_ls(part, filename); } @@ -1966,6 +1951,7 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { struct part_info *part; + char *fsname; int ret; /* make sure we are in sync with env variables */ @@ -1975,17 +1961,13 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ /* check partition type for cramfs */ - puts("### filesystem type is "); + fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); + printf("### filesystem type is %s\n", fsname); if (cramfs_check(part)) { - puts("CRAMFS\n"); ret = cramfs_info (part); - } else if (romfs_check(part)) { - puts("ROMFS\n"); - ret = romfs_info (part); } else { - /* if this is not cramfs or romfs assume jffs2 */ - puts("JFFS2\n"); + /* if this is not cramfs assume jffs2 */ ret = jffs2_1pass_info(part); } diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 93cc873b05..8d4c1a38d7 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -357,7 +357,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); val = (unsigned int)simple_strtoul (argv[2], NULL, 16); - if (argc < 2) { + if (argc < 1) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } @@ -382,7 +382,6 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("ESR"); break; default: - puts ("Unsupported register\n"); return 1; } printf (": 0x%08lx\n", val); @@ -409,10 +408,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 3 - blocking control write\n"); U_BOOT_CMD (rspr, 3, 1, do_rspr, - "rspr - read/write special purpose register\n", + "rmsr - read/write special purpose register\n", "- reg_num [write value] read/write special purpose register\n" - " 1 - MSR - Machine status register\n" - " 3 - EAR - Exception address register\n" - " 5 - ESR - Exception status register\n"); + " 0 - MSR - Machine status register\n" + " 1 - EAR - Exception address register\n" + " 2 - ESR - Exception status register\n"); #endif diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c index 4b7866fae5..6ce0b55b24 100644 --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 8740284ad8..3c027ff9bb 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -33,13 +33,15 @@ _start: addi r1, r0, CFG_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ - addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ + addi r6, r0, 0xb000 /* hex b000 opcode imm */ + bslli r6, r6, 16 /* shift */ swi r6, r0, 0x0 /* reset address */ swi r6, r0, 0x8 /* user vector exception */ swi r6, r0, 0x10 /* interrupt */ swi r6, r0, 0x20 /* hardware exception */ - addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/ + addi r6, r0, 0xb808 /* hew b808 opcode brai*/ + bslli r6, r6, 16 swi r6, r0, 0x4 /* reset address */ swi r6, r0, 0xC /* user vector exception */ swi r6, r0, 0x14 /* interrupt */ diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c index b350453443..ab1cb12749 100644 --- a/cpu/microblaze/timer.c +++ b/cpu/microblaze/timer.c @@ -33,17 +33,10 @@ void reset_timer (void) timestamp = 0; } -#ifdef CFG_TIMER_0 ulong get_timer (ulong base) { return (timestamp - base); } -#else -ulong get_timer (ulong base) -{ - return (timestamp++ - base); -} -#endif void set_timer (ulong t) { diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 063985984e..37d69b9949 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -24,7 +24,8 @@ include $(TOPDIR)/config.mk LIB := $(obj)libnet.a -COBJS := mcffec.o xilinx_emac.o xilinx_emaclite.o + +COBJS := mcffec.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/net/xilinx_emac.c b/drivers/net/xilinx_emac.c deleted file mode 100644 index 36e627aae5..0000000000 --- a/drivers/net/xilinx_emac.c +++ /dev/null @@ -1,374 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Based on Xilinx drivers - * - */ - -#include -#include -#include -#include -#include "xilinx_emac.h" - -#ifdef XILINX_EMAC - -#undef DEBUG - -#define ENET_MAX_MTU PKTSIZE -#define ENET_ADDR_LENGTH 6 - -static unsigned int etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ - -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; - -static xemac emac; - -void eth_halt(void) -{ -#ifdef DEBUG - puts ("eth_halt\n"); -#endif -} - -int eth_init(bd_t * bis) -{ - u32 helpreg; -#ifdef DEBUG - printf("EMAC Initialization Started\n\r"); -#endif - if (emac.isstarted) { - puts("Emac is started\n"); - return 0; - } - - memset (&emac, 0, sizeof (xemac)); - - emac.baseaddress = XILINX_EMAC_BASEADDR; - - /* Setting up FIFOs */ - emac.recvfifo.regbaseaddress = emac.baseaddress + - XEM_PFIFO_RXREG_OFFSET; - emac.recvfifo.databaseaddress = emac.baseaddress + - XEM_PFIFO_RXDATA_OFFSET; - out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); - - emac.sendfifo.regbaseaddress = emac.baseaddress + - XEM_PFIFO_TXREG_OFFSET; - emac.sendfifo.databaseaddress = emac.baseaddress + - XEM_PFIFO_TXDATA_OFFSET; - out_be32 (emac.sendfifo.regbaseaddress, XPF_RESET_FIFO_MASK); - - /* Reset the entire IPIF */ - out_be32 (emac.baseaddress + XIIF_V123B_RESETR_OFFSET, - XIIF_V123B_RESET_MASK); - - /* Stopping EMAC for setting up MAC */ - helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); - helpreg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - if (!getenv("ethaddr")) { - memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); - } - - /* Set the device station address high and low registers */ - helpreg = (bis->bi_enetaddr[0] << 8) | bis->bi_enetaddr[1]; - out_be32 (emac.baseaddress + XEM_SAH_OFFSET, helpreg); - helpreg = (bis->bi_enetaddr[2] << 24) | (bis->bi_enetaddr[3] << 16) | - (bis->bi_enetaddr[4] << 8) | bis->bi_enetaddr[5]; - out_be32 (emac.baseaddress + XEM_SAL_OFFSET, helpreg); - - - helpreg = XEM_ECR_UNICAST_ENABLE_MASK | XEM_ECR_BROAD_ENABLE_MASK | - XEM_ECR_FULL_DUPLEX_MASK | XEM_ECR_XMIT_FCS_ENABLE_MASK | - XEM_ECR_XMIT_PAD_ENABLE_MASK | XEM_ECR_PHY_ENABLE_MASK; - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - emac.isstarted = 1; - - /* Enable the transmitter, and receiver */ - helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); - helpreg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); - helpreg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - printf("EMAC Initialization complete\n\r"); - return 0; -} - -int eth_send(volatile void *ptr, int len) -{ - u32 intrstatus; - u32 xmitstatus; - u32 fifocount; - u32 wordcount; - u32 extrabytecount; - u32 *wordbuffer = (u32 *) ptr; - - if (len > ENET_MAX_MTU) - len = ENET_MAX_MTU; - - /* - * Check for overruns and underruns for the transmit status and length - * FIFOs and make sure the send packet FIFO is not deadlocked. - * Any of these conditions is bad enough that we do not want to - * continue. The upper layer software should reset the device to resolve - * the error. - */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | - XEM_EIR_XMIT_LFIFO_OVER_MASK)) { -#ifdef DEBUG - puts ("Transmitting overrun error\n"); -#endif - return 0; - } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | - XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { -#ifdef DEBUG - puts ("Transmitting underrun error\n"); -#endif - return 0; - } else if (in_be32 (emac.sendfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_DEADLOCK_MASK) { -#ifdef DEBUG - puts("Transmitting fifo error\n"); -#endif - return 0; - } - - /* - * Before writing to the data FIFO, make sure the length FIFO is not - * full. The data FIFO might not be full yet even though the length FIFO - * is. This avoids an overrun condition on the length FIFO and keeps the - * FIFOs in sync. - * - * Clear the latched LFIFO_FULL bit so next time around the most - * current status is represented - */ - if (intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) { - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK); -#ifdef DEBUG - puts ("Fifo is full\n"); -#endif - return 0; - } - - /* get the count of how many words may be inserted into the FIFO */ - fifocount = in_be32 (emac.sendfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - wordcount = len >> 2; - extrabytecount = len & 0x3; - - if (fifocount < wordcount) { -#ifdef DEBUG - puts ("Sending packet is larger then size of FIFO\n"); -#endif - return 0; - } - - for (fifocount = 0; fifocount < wordcount; fifocount++) { - out_be32 (emac.sendfifo.databaseaddress, wordbuffer[fifocount]); - } - if (extrabytecount > 0) { - u32 lastword = 0; - u8 *extrabytesbuffer = (u8 *) (wordbuffer + wordcount); - - if (extrabytecount == 1) { - lastword = extrabytesbuffer[0] << 24; - } else if (extrabytecount == 2) { - lastword = extrabytesbuffer[0] << 24 | - extrabytesbuffer[1] << 16; - } else if (extrabytecount == 3) { - lastword = extrabytesbuffer[0] << 24 | - extrabytesbuffer[1] << 16 | - extrabytesbuffer[2] << 8; - } - out_be32 (emac.sendfifo.databaseaddress, lastword); - } - - /* Loop on the MAC's status to wait for any pause to complete */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - while ((intrstatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) { - intrstatus = in_be32 ((emac.baseaddress) + - XIIF_V123B_IISR_OFFSET); - /* Clear the pause status from the transmit status register */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_PAUSE_MASK); - } - - /* - * Set the MAC's transmit packet length register to tell it to transmit - */ - out_be32 (emac.baseaddress + XEM_TPLR_OFFSET, len); - - /* - * Loop on the MAC's status to wait for the transmit to complete. - * The transmit status is in the FIFO when the XMIT_DONE bit is set. - */ - do { - intrstatus = in_be32 ((emac.baseaddress) + - XIIF_V123B_IISR_OFFSET); - } - while ((intrstatus & XEM_EIR_XMIT_DONE_MASK) == 0); - - xmitstatus = in_be32 (emac.baseaddress + XEM_TSR_OFFSET); - - if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | - XEM_EIR_XMIT_LFIFO_OVER_MASK)) { -#ifdef DEBUG - puts ("Transmitting overrun error\n"); -#endif - return 0; - } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | - XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { -#ifdef DEBUG - puts ("Transmitting underrun error\n"); -#endif - return 0; - } - - /* Clear the interrupt status register of transmit statuses */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_ALL_MASK); - - /* - * Collision errors are stored in the transmit status register - * instead of the interrupt status register - */ - if ((xmitstatus & XEM_TSR_EXCESS_DEFERRAL_MASK) || - (xmitstatus & XEM_TSR_LATE_COLLISION_MASK)) { -#ifdef DEBUG - puts ("Transmitting collision error\n"); -#endif - return 0; - } - return 1; -} - -int eth_rx(void) -{ - u32 pktlength; - u32 intrstatus; - u32 fifocount; - u32 wordcount; - u32 extrabytecount; - u32 lastword; - u8 *extrabytesbuffer; - - if (in_be32 (emac.recvfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET) - & XPF_DEADLOCK_MASK) { - out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); -#ifdef DEBUG - puts ("Receiving FIFO deadlock\n"); -#endif - return 0; - } - - /* - * Get the interrupt status to know what happened (whether an error - * occurred and/or whether frames have been received successfully). - * When clearing the intr status register, clear only statuses that - * pertain to receive. - */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - /* - * Before reading from the length FIFO, make sure the length FIFO is not - * empty. We could cause an underrun error if we try to read from an - * empty FIFO. - */ - if (!(intrstatus & XEM_EIR_RECV_DONE_MASK)) { -#ifdef DEBUG - /* puts("Receiving FIFO is empty\n"); */ -#endif - return 0; - } - - /* - * Determine, from the MAC, the length of the next packet available - * in the data FIFO (there should be a non-zero length here) - */ - pktlength = in_be32 (emac.baseaddress + XEM_RPLR_OFFSET); - if (!pktlength) { - return 0; - } - - /* - * Write the RECV_DONE bit in the status register to clear it. This bit - * indicates the RPLR is non-empty, and we know it's set at this point. - * We clear it so that subsequent entry into this routine will reflect - * the current status. This is done because the non-empty bit is latched - * in the IPIF, which means it may indicate a non-empty condition even - * though there is something in the FIFO. - */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - XEM_EIR_RECV_DONE_MASK); - - fifocount = in_be32 (emac.recvfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - - if ((fifocount * 4) < pktlength) { -#ifdef DEBUG - puts ("Receiving FIFO is smaller than packet size.\n"); -#endif - return 0; - } - - wordcount = pktlength >> 2; - extrabytecount = pktlength & 0x3; - - for (fifocount = 0; fifocount < wordcount; fifocount++) { - etherrxbuff[fifocount] = - in_be32 (emac.recvfifo.databaseaddress); - } - - /* - * if there are extra bytes to handle, read the last word from the FIFO - * and insert the extra bytes into the buffer - */ - if (extrabytecount > 0) { - extrabytesbuffer = (u8 *) (etherrxbuff + wordcount); - - lastword = in_be32 (emac.recvfifo.databaseaddress); - - /* - * one extra byte in the last word, put the byte into the next - * location of the buffer, bytes in a word of the FIFO are - * ordered from most significant byte to least - */ - if (extrabytecount == 1) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - } else if (extrabytecount == 2) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - extrabytesbuffer[1] = (u8) (lastword >> 16); - } else if (extrabytecount == 3) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - extrabytesbuffer[1] = (u8) (lastword >> 16); - extrabytesbuffer[2] = (u8) (lastword >> 8); - } - } - NetReceive((uchar *)etherrxbuff, pktlength); - return 1; -} -#endif diff --git a/drivers/net/xilinx_emac.h b/drivers/net/xilinx_emac.h deleted file mode 100644 index 966598e27a..0000000000 --- a/drivers/net/xilinx_emac.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Based on Xilinx drivers - * - */ - -typedef struct { - u32 regbaseaddress; /* Base address of registers */ - u32 databaseaddress; /* Base address of data for FIFOs */ -} xpacketfifov100b; - -typedef struct { - u32 baseaddress; /* Base address (of IPIF) */ - u32 isstarted; /* Device is currently started 0-no, 1-yes */ - xpacketfifov100b recvfifo; /* FIFO used to receive frames */ - xpacketfifov100b sendfifo; /* FIFO used to send frames */ -} xemac; - -#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ -#define XIIF_V123B_RESET_MASK 0xAUL -#define XIIF_V123B_RESETR_OFFSET 64UL /* reset register */ - -/* This constant is used with the Reset Register */ -#define XPF_RESET_FIFO_MASK 0x0000000A -#define XPF_COUNT_STATUS_REG_OFFSET 4UL - -/* These constants are used with the Occupancy/Vacancy Count Register. This - * register also contains FIFO status */ -#define XPF_COUNT_MASK 0x0000FFFF -#define XPF_DEADLOCK_MASK 0x20000000 - -/* Offset of the MAC registers from the IPIF base address */ -#define XEM_REG_OFFSET 0x1100UL - -/* - * Register offsets for the Ethernet MAC. Each register is 32 bits. - */ -#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ -#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ -#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ -#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ -#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ -#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ - - - -#define XEM_PFIFO_OFFSET 0x2000UL -/* Tx registers */ -#define XEM_PFIFO_TXREG_OFFSET (XEM_PFIFO_OFFSET + 0x0) -/* Rx registers */ -#define XEM_PFIFO_RXREG_OFFSET (XEM_PFIFO_OFFSET + 0x10) -/* Tx keyhole */ -#define XEM_PFIFO_TXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x100) -/* Rx keyhole */ -#define XEM_PFIFO_RXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x200) - - -/* - * EMAC Interrupt Registers (Status and Enable) masks. These registers are - * part of the IPIF IP Interrupt registers - */ -/* A mask for all transmit interrupts, used in polled mode */ -#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK |\ - XEM_EIR_XMIT_ERROR_MASK | \ - XEM_EIR_XMIT_SFIFO_EMPTY_MASK |\ - XEM_EIR_XMIT_LFIFO_FULL_MASK) - -/* Xmit complete */ -#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL -/* Recv complete */ -#define XEM_EIR_RECV_DONE_MASK 0x00000002UL -/* Xmit error */ -#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL -/* Recv error */ -#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL -/* Xmit status fifo empty */ -#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL -/* Recv length fifo empty */ -#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL -/* Xmit length fifo full */ -#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL -/* Recv length fifo overrun */ -#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL -/* Recv length fifo underrun */ -#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL -/* Xmit status fifo overrun */ -#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL -/* Transmit status fifo underrun */ -#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL -/* Transmit length fifo overrun */ -#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL -/* Transmit length fifo underrun */ -#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL -/* Transmit pause pkt received */ -#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL - -/* - * EMAC Control Register (ECR) - */ -/* Full duplex mode */ -#define XEM_ECR_FULL_DUPLEX_MASK 0x80000000UL -/* Reset transmitter */ -#define XEM_ECR_XMIT_RESET_MASK 0x40000000UL -/* Enable transmitter */ -#define XEM_ECR_XMIT_ENABLE_MASK 0x20000000UL -/* Reset receiver */ -#define XEM_ECR_RECV_RESET_MASK 0x10000000UL -/* Enable receiver */ -#define XEM_ECR_RECV_ENABLE_MASK 0x08000000UL -/* Enable PHY */ -#define XEM_ECR_PHY_ENABLE_MASK 0x04000000UL -/* Enable xmit pad insert */ -#define XEM_ECR_XMIT_PAD_ENABLE_MASK 0x02000000UL -/* Enable xmit FCS insert */ -#define XEM_ECR_XMIT_FCS_ENABLE_MASK 0x01000000UL -/* Enable unicast addr */ -#define XEM_ECR_UNICAST_ENABLE_MASK 0x00020000UL -/* Enable broadcast addr */ -#define XEM_ECR_BROAD_ENABLE_MASK 0x00008000UL - -/* - * Transmit Status Register (TSR) - */ -/* Transmit excess deferral */ -#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL -/* Transmit late collision */ -#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c deleted file mode 100644 index 5d8eaa5182..0000000000 --- a/drivers/net/xilinx_emaclite.c +++ /dev/null @@ -1,376 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include - -#ifdef XILINX_EMACLITE_BASEADDR - -#undef DEBUG - -#define ENET_MAX_MTU PKTSIZE -#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN -#define ENET_ADDR_LENGTH 6 - -/* EmacLite constants */ -#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ -#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ -#define XEL_TSR_OFFSET 0x07FC /* Tx status */ -#define XEL_RSR_OFFSET 0x17FC /* Rx status */ -#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ - -/* Xmit complete */ -#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL -/* Xmit interrupt enable bit */ -#define XEL_TSR_XMIT_IE_MASK 0x00000008UL -/* Buffer is active, SW bit only */ -#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL -/* Program the MAC address */ -#define XEL_TSR_PROGRAM_MASK 0x00000002UL -/* define for programming the MAC address into the EMAC Lite */ -#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) - -/* Transmit packet length upper byte */ -#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL -/* Transmit packet length lower byte */ -#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL - -/* Recv complete */ -#define XEL_RSR_RECV_DONE_MASK 0x00000001UL -/* Recv interrupt enable bit */ -#define XEL_RSR_RECV_IE_MASK 0x00000008UL - -typedef struct { - unsigned int baseaddress; /* Base address for device (IPIF) */ - unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ - unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ - unsigned char deviceid; /* Unique ID of device - for future */ -} xemaclite; - -static xemaclite emaclite; - -static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ - -/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ -#ifdef CFG_ENV_IS_NOWHERE -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; -#endif - -void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) -{ - unsigned int i; - u32 alignbuffer; - u32 *to32ptr; - u32 *from32ptr; - u8 *to8ptr; - u8 *from8ptr; - - from32ptr = (u32 *) srcptr; - - /* Word aligned buffer, no correction needed. */ - to32ptr = (u32 *) destptr; - while (bytecount > 3) { - *to32ptr++ = *from32ptr++; - bytecount -= 4; - } - to8ptr = (u8 *) to32ptr; - - alignbuffer = *from32ptr++; - from8ptr = (u8 *) & alignbuffer; - - for (i = 0; i < bytecount; i++) { - *to8ptr++ = *from8ptr++; - } -} - -void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) -{ - unsigned i; - u32 alignbuffer; - u32 *to32ptr = (u32 *) destptr; - u32 *from32ptr; - u8 *to8ptr; - u8 *from8ptr; - - from32ptr = (u32 *) srcptr; - while (bytecount > 3) { - - *to32ptr++ = *from32ptr++; - bytecount -= 4; - } - - alignbuffer = 0; - to8ptr = (u8 *) & alignbuffer; - from8ptr = (u8 *) from32ptr; - - for (i = 0; i < bytecount; i++) { - *to8ptr++ = *from8ptr++; - } - - *to32ptr++ = alignbuffer; -} - -void eth_halt (void) -{ -#ifdef DEBUG - puts ("eth_halt\n"); -#endif -} - -int eth_init (bd_t * bis) -{ -#ifdef DEBUG - puts ("EmacLite Initialization Started\n"); -#endif - memset (&emaclite, 0, sizeof (xemaclite)); - emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; - - if (!getenv("ethaddr")) { - memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); - } - -/* - * TX - TX_PING & TX_PONG initialization - */ - /* Restart PING TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); - /* Copy MAC address */ - xemaclite_alignedwrite (bis->bi_enetaddr, - emaclite.baseaddress, ENET_ADDR_LENGTH); - /* Set the length */ - out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); - /* Update the MAC address in the EMAC Lite */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); - /* Wait for EMAC Lite to finish with the MAC address update */ - while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) & - XEL_TSR_PROG_MAC_ADDR) != 0) ; - -#ifdef XILINX_EMACLITE_TX_PING_PONG - /* The same operation with PONG TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); - xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress + - XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); - out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, - XEL_TSR_PROG_MAC_ADDR); - while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + - XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; -#endif - -/* - * RX - RX_PING & RX_PONG initialization - */ - /* Write out the value to flush the RX buffer */ - out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); -#ifdef XILINX_EMACLITE_RX_PING_PONG - out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, - XEL_RSR_RECV_IE_MASK); -#endif - -#ifdef DEBUG - puts ("EmacLite Initialization complete\n"); -#endif - return 0; -} - -int xemaclite_txbufferavailable (xemaclite * instanceptr) -{ - u32 reg; - u32 txpingbusy; - u32 txpongbusy; - /* - * Read the other buffer register - * and determine if the other buffer is available - */ - reg = in_be32 (instanceptr->baseaddress + - instanceptr->nexttxbuffertouse + 0); - txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == - XEL_TSR_XMIT_BUSY_MASK); - - reg = in_be32 (instanceptr->baseaddress + - (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0); - txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == - XEL_TSR_XMIT_BUSY_MASK); - - return (!(txpingbusy && txpongbusy)); -} - -int eth_send (volatile void *ptr, int len) { - - unsigned int reg; - unsigned int baseaddress; - - unsigned maxtry = 1000; - - if (len > ENET_MAX_MTU) - len = ENET_MAX_MTU; - - while (!xemaclite_txbufferavailable (&emaclite) && maxtry) { - udelay (10); - maxtry--; - } - - if (!maxtry) { - printf ("Error: Timeout waiting for ethernet TX buffer\n"); - /* Restart PING TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); -#ifdef XILINX_EMACLITE_TX_PING_PONG - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + - XEL_BUFFER_OFFSET, 0); -#endif - return 0; - } - - /* Determine the expected TX buffer address */ - baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse); - - /* Determine if the expected buffer address is empty */ - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) - & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { - -#ifdef XILINX_EMACLITE_TX_PING_PONG - emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET; -#endif -#ifdef DEBUG - printf ("Send packet from 0x%x\n", baseaddress); -#endif - /* Write the frame to the buffer */ - xemaclite_alignedwrite ((void *) ptr, baseaddress, len); - out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - reg |= XEL_TSR_XMIT_BUSY_MASK; - if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { - reg |= XEL_TSR_XMIT_ACTIVE_MASK; - } - out_be32 (baseaddress + XEL_TSR_OFFSET, reg); - return 1; - } -#ifdef XILINX_EMACLITE_TX_PING_PONG - /* Switch to second buffer */ - baseaddress ^= XEL_BUFFER_OFFSET; - /* Determine if the expected buffer address is empty */ - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) - & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { -#ifdef DEBUG - printf ("Send packet from 0x%x\n", baseaddress); -#endif - /* Write the frame to the buffer */ - xemaclite_alignedwrite ((void *) ptr, baseaddress, len); - out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - reg |= XEL_TSR_XMIT_BUSY_MASK; - if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { - reg |= XEL_TSR_XMIT_ACTIVE_MASK; - } - out_be32 (baseaddress + XEL_TSR_OFFSET, reg); - return 1; - } -#endif - puts ("Error while sending frame\n"); - return 0; -} - -int eth_rx (void) -{ - unsigned int length; - unsigned int reg; - unsigned int baseaddress; - - baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); -#ifdef DEBUG - printf ("Testing data at address 0x%x\n", baseaddress); -#endif - if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { -#ifdef XILINX_EMACLITE_RX_PING_PONG - emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET; -#endif - } else { -#ifndef XILINX_EMACLITE_RX_PING_PONG -#ifdef DEBUG - printf ("No data was available - address 0x%x\n", baseaddress); -#endif - return 0; -#else - baseaddress ^= XEL_BUFFER_OFFSET; - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); - if ((reg & XEL_RSR_RECV_DONE_MASK) != - XEL_RSR_RECV_DONE_MASK) { -#ifdef DEBUG - printf ("No data was available - address 0x%x\n", - baseaddress); -#endif - return 0; - } -#endif - } - /* Get the length of the frame that arrived */ - switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & - 0xFFFF0000 ) >> 16) { - case 0x806: - length = 42 + 20; /* FIXME size of ARP */ -#ifdef DEBUG - puts ("ARP Packet\n"); -#endif - break; - case 0x800: - length = 14 + 14 + - (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & - 0xFFFF0000) >> 16); /* FIXME size of IP packet */ -#ifdef DEBUG - puts("IP Packet\n"); -#endif - break; - default: -#ifdef DEBUG - puts("Other Packet\n"); -#endif - length = ENET_MAX_MTU; - break; - } - - xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET), - etherrxbuff, length); - - /* Acknowledge the frame */ - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); - reg &= ~XEL_RSR_RECV_DONE_MASK; - out_be32 (baseaddress + XEL_RSR_OFFSET, reg); - -#ifdef DEBUG - printf ("Packet receive from 0x%x, length %dB\n", baseaddress, length); -#endif - NetReceive ((uchar *) etherrxbuff, length); - return 1; - -} -#endif diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index 1f3aaae403..ed59abea86 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include -#ifdef XILINX_UARTLITE +#ifdef CONFIG_MICROBLAZE #include diff --git a/fs/Makefile b/fs/Makefile index 118ae78f2d..273d90e011 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,7 @@ # # -SUBDIRS := romfs jffs2 cramfs fdos fat reiserfs ext2 +SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 $(obj).depend all: @for dir in $(SUBDIRS) ; do \ diff --git a/fs/romfs/Makefile b/fs/romfs/Makefile deleted file mode 100644 index 937d755940..0000000000 --- a/fs/romfs/Makefile +++ /dev/null @@ -1,49 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)libromfs.a - -AOBJS = -COBJS = romfs.o - -SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS)) - -#CPPFLAGS += - -all: $(LIB) $(AOBJS) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/fs/romfs/romfs.c b/fs/romfs/romfs.c deleted file mode 100644 index 15de3e18ff..0000000000 --- a/fs/romfs/romfs.c +++ /dev/null @@ -1,240 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -#if defined(CONFIG_CMD_JFFS2) - -#include -#include -#include -#include - -#undef DEBUG_ROMFS - -/* ROMFS superblock */ -struct romfs_super { - u32 word0; - u32 word1; - u32 size; - u32 checksum; - char name[0]; -}; - -struct romfs_inode { - u32 next; - u32 spec; - u32 size; - u32 checksum; - char name[0]; -}; - -extern flash_info_t flash_info[]; -#define PART_OFFSET(x) (x->offset + flash_info[x->dev->id->num].start[0]) -#define ALIGN(x) (((x) & 0xfffffff0)) -#define HEADERSIZE(name) (0x20 + ALIGN(strlen(name))) - -static unsigned long romfs_resolve (unsigned long begin, unsigned long offset, - unsigned long size, int raw, char *filename) -{ - unsigned long inodeoffset = 0, nextoffset; - struct romfs_inode *inode; -#ifdef DEBUG_ROMFS - printf ("ROMFS_resolve: begin 0x%x, offset 0x%x, size 0x%x, raw 0x%x, \ - filename %s\n", begin, offset, size, raw, filename); -#endif - - while (inodeoffset < size) { - inode = (struct romfs_inode *)(begin + offset + inodeoffset); - offset = 0; - nextoffset = ALIGN (inode->next); -#ifdef DEBUG_ROMFS - printf("inode 0x%x, name %s - len 0x%x, next inode 0x%x, \ - compare names 0x%x\n", - inode, inode->name, strlen (inode->name), nextoffset, - strncmp (filename, inode->name, strlen (filename))); -#endif - if (!strncmp (filename, inode->name, strlen (inode->name))) { - char *p = strtok (NULL, "/"); - if (raw && (p == NULL || *p == '\0')) { - return offset + inodeoffset; - } - return romfs_resolve (begin, - inodeoffset + HEADERSIZE (inode->name), - size, raw, p); - } - inodeoffset = nextoffset; - } - - printf ("can't find corresponding entry\n"); - return 0; -} - -int romfs_load (char *loadoffset, struct part_info *info, char *filename) -{ - struct romfs_inode *inode; - struct romfs_super *sb; - char *data; - int pocet; - sb = (struct romfs_super *) PART_OFFSET (info); - - unsigned long offset; - - offset = romfs_resolve (PART_OFFSET (info), HEADERSIZE (sb->name), - sb->size, 1, strtok (filename, "/")); - if (offset <= 0) - return offset; - - inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); - data = (char *)((int)inode + HEADERSIZE (inode->name)); - pocet = inode->size; - while (pocet--) { - *loadoffset++ = *data++; - } - return inode->size; -} - -static int romfs_list_inode (struct part_info *info, unsigned long offset) -{ - struct romfs_inode *inode = - (struct romfs_inode *)(PART_OFFSET (info) + offset); - struct romfs_inode *hardlink = NULL; - char str[3], *data; - -/* - * mapping spec.info means - * 0 hard link link destination [file header] - * 1 directory first file's header - * 2 regular file unused, must be zero [MBZ] - * 3 symbolic link unused, MBZ (file data is the link content) - * 4 block device 16/16 bits major/minor number - * 5 char device - " - - * 6 socket unused, MBZ - * 7 fifo unused, MBZ - */ - char attributes[] = "hdflbcsp"; - str[0] = attributes[inode->next & 0x7]; - str[1] = (inode->next & 0x8) ? 'x' : '-'; - str[2] = '\0'; - - if ((str[0] == 'b') || (str[0] == 'c')) { -#ifdef DEBUG_ROMFS - printf (" %s %3d,%3d %12s 0x%08x 0x%08x", str, - (inode->spec & 0xffff0000) >> 16, - inode->spec & 0x0000ffff, inode->name, inode, - inode->spec); -#else - printf (" %s %3d,%3d %12s", str, - (inode->spec & 0xffff0000) >> 16, - inode->spec & 0x0000ffff); -#endif - } else { -#ifdef DEBUG_ROMFS - printf (" %s %7d %12s 0x%08x 0x%08x", str, inode->size, - inode->name, inode, inode->spec); -#else - printf (" %s %7d %12s", str, inode->size, inode->name); -#endif - if (str[0] == 'l') { - data = (char *)((int)inode + HEADERSIZE (inode->name)); - puts (" -> "); - puts (data); - } - if (str[0] == 'h') { - hardlink = (struct romfs_inode *)(PART_OFFSET (info) + - inode->spec); - puts (" -> "); - puts (hardlink->name); - } - } - puts ("\n"); - return ALIGN (inode->next); -} - -int romfs_ls (struct part_info *info, char *filename) -{ - struct romfs_inode *inode; - unsigned long inodeoffset = 0, nextoffset; - unsigned long offset, size; - struct romfs_super *sb; - sb = (struct romfs_super *)PART_OFFSET (info); - - if (strlen (filename) == 0 || !strcmp (filename, "/")) { - offset = HEADERSIZE (sb->name); - size = sb->size; - } else { - offset = romfs_resolve (PART_OFFSET (info), - HEADERSIZE (sb->name), sb->size, 1, - strtok (filename, "/")); - - if (offset == 0) { - return offset; - } - inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); - if ((inode->next & 0x7) != 1) { - return (romfs_list_inode (info, offset) > 0); - } - - size = sb->size; - offset = offset + HEADERSIZE (inode->name); - } - - inodeoffset = offset + inodeoffset; - while (inodeoffset < size) { - nextoffset = romfs_list_inode (info, inodeoffset); - if (nextoffset == 0) - break; - inodeoffset = nextoffset; - } - return 1; -} - -int romfs_info (struct part_info *info) -{ - struct romfs_super *sb; - sb = (struct romfs_super *)PART_OFFSET (info); - - printf ("name: \t\t%s, len %d B\n", sb->name, strlen (sb->name)); - printf ("size of SB:\t%d B\n", HEADERSIZE (sb->name)); - printf ("full size:\t%d B\n", sb->size); - printf ("checksum:\t0x%x\n", sb->checksum); - return 0; -} - -int romfs_check (struct part_info *info) -{ - struct romfs_super *sb; - if (info->dev->id->type != MTD_DEV_TYPE_NOR) - return 0; - - sb = (struct romfs_super *)PART_OFFSET (info); - if ((sb->word0 != 0x2D726F6D) || (sb->word1 != 0x3166732D)) { - return 0; - } - return 1; -} - -#endif diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 74fe88867e..7eeae708a7 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Czech Technical University. * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. @@ -32,7 +32,6 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -87,7 +86,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -100,7 +99,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -146,16 +145,6 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR - #define CONFIG_SYSTEMACE - /* #define DEBUG_SYSTEMACE */ - #define SYSTEMACE_CONFIG_FPGA - #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR - #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH - #define CONFIG_DOS_PARTITION -#endif - /* * BOOTP options */ @@ -164,21 +153,28 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME + /* * Command line configuration. */ #include #define CONFIG_CMD_ASKENV +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL +#define CONFIG_CMD_NET #define CONFIG_CMD_PING - -#if defined(CONFIG_SYSTEMACE) - #define CONFIG_CMD_EXT2 - #define CONFIG_CMD_FAT -#endif +#define CONFIG_CMD_RUN #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -190,8 +186,6 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif -#else - #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -216,16 +210,24 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 +/* system ace */ +#define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +#define SYSTEMACE_CONFIG_FPGA +#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +#define CONFIG_DOS_PARTITION + #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 9a2eec1bb2..08ac9cbd58 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,7 +48,6 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) -#define XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } @@ -56,16 +55,21 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + /* * Command line configuration. */ #include -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_ENV -#undef CONFIG_CMD_MEMORY -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE @@ -104,6 +108,4 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -#define XILINX_CLOCK_FREQ 50000000 - #endif /* __CONFIG_H */ diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 006a132881..35001d7ada 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,34 +31,13 @@ #define CONFIG_XUPV2P 1 /* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -#define XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR +#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CFG_NS16550 -#define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR -#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ - -#define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif /* ethernet */ -#ifdef XILINX_EMAC_BASEADDR -#define XILINX_EMAC 1 -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define XILINX_EMACLITE 1 -#endif -#endif -#undef ET_DEBUG +#define CONFIG_EMAC 1 +#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES /* * setting reset address @@ -69,13 +48,11 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -/* #define CFG_RESET_ADDRESS 0x36000000 */ +#define CFG_RESET_ADDRESS 0x36000000 /* gpio */ -#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -142,6 +119,7 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) + /* * BOOTP options */ @@ -150,24 +128,29 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME + /* * Command line configuration. */ #include -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE +#define CONFIG_CMD_MEMORY #define CONFIG_CMD_IRQ -#define CONFIG_CMD_MFSL +#define CONFIG_CMD_BDI +#define CONFIG_CMD_NET +#define CONFIG_CMD_IMI +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_RUN +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_MISC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_PING -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#endif /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " @@ -179,7 +162,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "xupv2p" +#define CONFIG_HOSTNAME "ml401" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -195,13 +178,11 @@ "echo" /* system ace */ -#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION -#endif #endif /* __CONFIG_H */ diff --git a/lib_microblaze/time.c b/lib_microblaze/time.c index 0fef834992..3fa1b11262 100644 --- a/lib_microblaze/time.c +++ b/lib_microblaze/time.c @@ -26,17 +26,9 @@ #include -#ifdef CFG_TIMER_0 void udelay (unsigned long usec) { int i; i = get_timer (0); while ((get_timer (0) - i) < (usec / 1000)) ; } -#else -void udelay (unsigned long usec) -{ - unsigned int i; - for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++); -} -#endif From 481d4328618804add1f818a6c96296121cd0528e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:17:42 +0200 Subject: [PATCH 44/73] [FIX] repair MFSL commands --- common/cmd_mfsl.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 8d4c1a38d7..9d1d87551a 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -355,19 +355,18 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) unsigned int reg = 0; unsigned int val = 0; - reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); - val = (unsigned int)simple_strtoul (argv[2], NULL, 16); - if (argc < 1) { + if (argc < 2) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } + reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); + val = (unsigned int)simple_strtoul (argv[2], NULL, 16); switch (reg) { case 0x1: if (argc > 2) { MTS (val, rmsr); NOP; MFS (val, rmsr); - } else { MFS (val, rmsr); } @@ -382,6 +381,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("ESR"); break; default: + puts ("Unsupported register\n"); return 1; } printf (": 0x%08lx\n", val); @@ -408,10 +408,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 3 - blocking control write\n"); U_BOOT_CMD (rspr, 3, 1, do_rspr, - "rmsr - read/write special purpose register\n", + "rspr - read/write special purpose register\n", "- reg_num [write value] read/write special purpose register\n" - " 0 - MSR - Machine status register\n" - " 1 - EAR - Exception address register\n" - " 2 - ESR - Exception status register\n"); + " 1 - MSR - Machine status register\n" + " 3 - EAR - Exception address register\n" + " 5 - ESR - Exception status register\n"); #endif From db14d77995ce515b728b178b63f82babe60e3d56 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:18:46 +0200 Subject: [PATCH 45/73] [FIX] repair email address --- cpu/microblaze/cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c index 6ce0b55b24..4b7866fae5 100644 --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. From 0731933ec8ec45d02ba89b52df673d526873cdde Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:19:48 +0200 Subject: [PATCH 46/73] [FIX] resolve problem with cpu without barrel shifter --- cpu/microblaze/start.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 3c027ff9bb..8740284ad8 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -33,15 +33,13 @@ _start: addi r1, r0, CFG_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ - addi r6, r0, 0xb000 /* hex b000 opcode imm */ - bslli r6, r6, 16 /* shift */ + addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ swi r6, r0, 0x0 /* reset address */ swi r6, r0, 0x8 /* user vector exception */ swi r6, r0, 0x10 /* interrupt */ swi r6, r0, 0x20 /* hardware exception */ - addi r6, r0, 0xb808 /* hew b808 opcode brai*/ - bslli r6, r6, 16 + addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/ swi r6, r0, 0x4 /* reset address */ swi r6, r0, 0xC /* user vector exception */ swi r6, r0, 0x14 /* interrupt */ From 1c1100d2fcf46b9d11dcf78d6e5aea75e2e8b716 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:21:19 +0200 Subject: [PATCH 47/73] [PATCH] Add support for design without interrupt controller Polling timer --- cpu/microblaze/timer.c | 7 +++++++ lib_microblaze/time.c | 8 ++++++++ 2 files changed, 15 insertions(+) diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c index ab1cb12749..b350453443 100644 --- a/cpu/microblaze/timer.c +++ b/cpu/microblaze/timer.c @@ -33,10 +33,17 @@ void reset_timer (void) timestamp = 0; } +#ifdef CFG_TIMER_0 ulong get_timer (ulong base) { return (timestamp - base); } +#else +ulong get_timer (ulong base) +{ + return (timestamp++ - base); +} +#endif void set_timer (ulong t) { diff --git a/lib_microblaze/time.c b/lib_microblaze/time.c index 3fa1b11262..b5d8f19379 100644 --- a/lib_microblaze/time.c +++ b/lib_microblaze/time.c @@ -26,9 +26,17 @@ #include +#ifdef CFG_TIMER_0 void udelay (unsigned long usec) { int i; i = get_timer (0); while ((get_timer (0) - i) < (usec / 1000)) ; } +#else +void udelay (unsigned long usec) +{ + unsigned int i; + for (i = 0; i < (usec * CONFIG_XILINX_CLOCK_FREQ / 10000000); i++); +} +#endif From 0731cbae6c2feab93b244d83fd6a43f5cc9bf852 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:25:11 +0200 Subject: [PATCH 48/73] [PATCH] Change macro name for UartLite because PowerPC 405 can use UartLite as console --- drivers/serial_xuartlite.c | 2 +- include/configs/ml401.h | 1 + include/configs/suzaku.h | 1 + include/configs/xupv2p.h | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index ed59abea86..d678ab6b76 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include -#ifdef CONFIG_MICROBLAZE +#ifdef CONFIG_XILINX_UARTLITE #include diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 7eeae708a7..2cf0949577 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -32,6 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 08ac9cbd58..2353b63f5d 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,6 +48,7 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) +#define CONFIG_XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 35001d7ada..8ab0b49cd0 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,6 +31,7 @@ #define CONFIG_XUPV2P 1 /* uart */ +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } From cb1bc63b75a232571eb69aa2c8aa919321655845 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:30:42 +0200 Subject: [PATCH 49/73] [FIX] Email reparation & Copyright Both codes are written by myself without any support from CTU --- include/configs/ml401.h | 4 ++-- include/configs/xupv2p.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 2cf0949577..48291e89da 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* - * (C) Copyright 2007 Czech Technical University. + * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 8ab0b49cd0..b1c0ee666f 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 Czech Technical University. + * (C) Copyright 2007 Michal Simek * * Michal SIMEK * From f240356507038e5ce55e8a24cb2607e9eae6d10c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:36:06 +0200 Subject: [PATCH 50/73] [FIX] change sets of commands because changing of command handling brings compilation problems --- include/configs/suzaku.h | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 2353b63f5d..020ed02304 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -56,21 +56,16 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_ENV +#undef CONFIG_CMD_MEMORY +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE @@ -109,4 +104,7 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define XILINX_CLOCK_FREQ 50000000 +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ + #endif /* __CONFIG_H */ From 853643d8cf2ca80cb2e25c53ad5dc580abafe166 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:41:30 +0200 Subject: [PATCH 51/73] [FIX] change command handling and removing code violation --- include/configs/ml401.h | 50 ++++++++++++++++++++--------------------- 1 file changed, 24 insertions(+), 26 deletions(-) diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 48291e89da..b32043850e 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -32,7 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -#define CONFIG_XILINX_UARTLITE +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -59,6 +59,7 @@ #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ /* FSL */ #define CFG_FSL_2 @@ -87,7 +88,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -100,7 +101,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -146,6 +147,16 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ +/* system ace */ +#ifdef XILINX_SYSACE_BASEADDR + #define CONFIG_SYSTEMACE + /* #define DEBUG_SYSTEMACE */ + #define SYSTEMACE_CONFIG_FPGA + #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR + #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH + #define CONFIG_DOS_PARTITION +#endif + /* * BOOTP options */ @@ -154,28 +165,21 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL -#define CONFIG_CMD_NET #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN + +#if defined(CONFIG_SYSTEMACE) + #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_FAT +#endif #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -187,6 +191,8 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif +#else + #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -211,24 +217,16 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 -/* system ace */ -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION - #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ From 0d38effc6e359e6b1b0c78d66e8bc1a4dc15a2ae Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Tue, 25 Sep 2007 15:48:05 -0600 Subject: [PATCH 52/73] Fpga: fix incorrect test of CFG_FPGA_XILINX macro CFG_FPGA_XILINX is a bit value used to test against the value in CONFIG_FPGA. Testing for a value will always return TRUE. I don't think that is the intention in this code. Signed-off-by: Grant Likely --- common/cmd_fpga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c index 3fc4fca9ae..cce23ad70d 100644 --- a/common/cmd_fpga.c +++ b/common/cmd_fpga.c @@ -60,6 +60,7 @@ static int fpga_get_op (char *opstr); /* Convert bitstream data and load into the fpga */ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) { +#if (CONFIG_FPGA & CFG_FPGA_XILINX) unsigned int length; unsigned char* swapdata; unsigned int swapsize; @@ -72,7 +73,6 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) dataptr = (unsigned char *)fpgadata; -#if CFG_FPGA_XILINX /* skip the first bytes of the bitsteam, their meaning is unknown */ length = (*dataptr << 8) + *(dataptr+1); dataptr+=2; From 3e954beb614b5b190d7f4f4c3b641437a0132e35 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 11 Sep 2007 14:12:55 +0200 Subject: [PATCH 53/73] ppc4xx: lwmon5: Change GPIO 58 to default to low (watchdog test) Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index be483245b9..a9db0862f4 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -472,7 +472,7 @@ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO55 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO56 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO57 Unselect via TraceSelect Bit */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO58 Unselect via TraceSelect Bit */ \ +{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO58 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO59 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO60 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO61 Unselect via TraceSelect Bit */ \ From 86ec86c04326c3913178a7679aa910de071da75d Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 27 Sep 2007 23:27:47 +0200 Subject: [PATCH 54/73] Fix missing DECLARE_GLOBAL_DATA_PTR on CONFIG_LPC2292 in serial Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/arm720t/serial.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c index 27eb73ad88..1b0e147e16 100644 --- a/cpu/arm720t/serial.c +++ b/cpu/arm720t/serial.c @@ -125,6 +125,8 @@ serial_puts (const char *s) #elif defined(CONFIG_LPC2292) +DECLARE_GLOBAL_DATA_PTR; + #include void serial_setbrg (void) From 785c13477b77dcd2e6c5128fffcdb4e1943f4818 Mon Sep 17 00:00:00 2001 From: Timo Ketola Date: Mon, 24 Sep 2007 14:50:32 +0300 Subject: [PATCH 55/73] Bugfix: Use only one PTD for one endpoint Original isp116x-hcd code prepared multiple PTDs for longer than 16 byte transfers for one endpoint. That is unnecessary because the ISP116x is able to split long data from one PTD into multiple transactions based on the buffer size of the endpoint. It also caused serious problems if the endpoint NAKed some of the transactions. In that case ISP116x wouldn't notice that the other PTDs were for the same endpoint and would try the other PTDs possibly out of order. That would break the whole transfer. This patch makes isp116x_submit_job to use one PTD for one transfer. Signed-off-by: Timo Ketola Signed-off-by: Markus Klotzbuecher --- drivers/isp116x-hcd.c | 112 +++++++++++++++++++++++++++--------------- 1 file changed, 72 insertions(+), 40 deletions(-) diff --git a/drivers/isp116x-hcd.c b/drivers/isp116x-hcd.c index 8e2bc7adcc..b21af10d0b 100644 --- a/drivers/isp116x-hcd.c +++ b/drivers/isp116x-hcd.c @@ -113,9 +113,9 @@ static const char hcd_name[] = "isp116x-hcd"; struct isp116x isp116x_dev; struct isp116x_platform_data isp116x_board; -int got_rhsc = 0; /* root hub status change */ +static int got_rhsc; /* root hub status change */ struct usb_device *devgone; /* device which was disconnected */ -int rh_devnum = 0; /* address of Root Hub endpoint */ +static int rh_devnum; /* address of Root Hub endpoint */ /* ------------------------------------------------------------------------- */ @@ -522,11 +522,13 @@ static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev, done += PTD_GET_LEN(&ptd[i]); cc = PTD_GET_CC(&ptd[i]); - if (cc == TD_DATAUNDERRUN) { /* underrun is no error... */ - DBG("allowed data underrun"); - cc = TD_CC_NOERROR; - } - if (cc != TD_CC_NOERROR && ret == TD_CC_NOERROR) + + /* Data underrun means basically that we had more buffer space than + * the function had data. It is perfectly normal but upper levels have + * to know how much we actually transferred. + */ + if (cc == TD_NOTACCESSED || + (cc != TD_CC_NOERROR && (ret == TD_CC_NOERROR || ret == TD_DATAUNDERRUN))) ret = cc; } @@ -592,11 +594,19 @@ static int isp116x_interrupt(struct isp116x *isp116x) return ret; } -#define PTD_NUM 64 /* it should be enougth... */ -struct ptd ptd[PTD_NUM]; +/* With one PTD we can transfer almost 1K in one go; + * HC does the splitting into endpoint digestible transactions + */ +struct ptd ptd[1]; + static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe) { - return min(PTD_NUM * usb_maxpacket(dev, pipe), PTD_NUM * 16); + unsigned mpck = usb_maxpacket(dev, pipe); + + /* One PTD can transfer 1023 bytes but try to always + * transfer multiples of endpoint buffer size + */ + return 1023 / mpck * mpck; } /* Do an USB transfer @@ -610,13 +620,21 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe, int max = usb_maxpacket(dev, pipe); int dir_out = usb_pipeout(pipe); int speed_low = usb_pipeslow(pipe); - int i, done, stat, timeout, cc; - int retries = 10; + int i, done = 0, stat, timeout, cc; + + /* 500 frames or 0.5s timeout when function is busy and NAKs transactions for a while */ + int retries = 500; DBG("------------------------------------------------"); dump_msg(dev, pipe, buffer, len, "SUBMIT"); DBG("------------------------------------------------"); + if (len >= 1024) { + ERR("Too big job"); + dev->status = USB_ST_CRC_ERR; + return -1; + } + if (isp116x->disabled) { ERR("EPIPE"); dev->status = USB_ST_CRC_ERR; @@ -653,29 +671,15 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe, isp116x_write_reg32(isp116x, HCINTSTAT, 0xff); /* Prepare the PTD data */ - done = 0; - i = 0; - do { - ptd[i].count = PTD_CC_MSK | PTD_ACTIVE_MSK | - PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out)); - ptd[i].mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum); - ptd[i].len = PTD_LEN(max > len - done ? len - done : max) | - PTD_DIR(dir); - ptd[i].faddr = PTD_FA(usb_pipedevice(pipe)); - - usb_dotoggle(dev, epnum, dir_out); - done += PTD_GET_LEN(&ptd[i]); - i++; - if (i >= PTD_NUM) { - ERR("****** Cannot pack buffer! ******"); - dev->status = USB_ST_BUF_ERR; - return -1; - } - } while (done < len); - ptd[i - 1].mps |= PTD_LAST_MSK; + ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | + PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out)); + ptd->mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum) | PTD_LAST_MSK; + ptd->len = PTD_LEN(len) | PTD_DIR(dir); + ptd->faddr = PTD_FA(usb_pipedevice(pipe)); +retry_same: /* Pack data into FIFO ram */ - pack_fifo(isp116x, dev, pipe, ptd, i, buffer, len); + pack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len); #ifdef EXTRA_DELAY wait_ms(EXTRA_DELAY); #endif @@ -738,17 +742,42 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe, } /* Unpack data from FIFO ram */ - cc = unpack_fifo(isp116x, dev, pipe, ptd, i, buffer, len); + cc = unpack_fifo(isp116x, dev, pipe, ptd, 1, buffer, len); - /* Mmm... sometime we get 0x0f as cc which is a non sense! - * Just retry the transfer... + i = PTD_GET_COUNT(ptd); + done += i; + buffer += i; + len -= i; + + /* There was some kind of real problem; Prepare the PTD again + * and retry from the failed transaction on */ - if (cc == 0x0f && retries-- > 0) { - usb_dotoggle(dev, epnum, dir_out); - goto retry; + if (cc && cc != TD_NOTACCESSED && cc != TD_DATAUNDERRUN) { + if (retries >= 100) { + retries -= 100; + /* The chip will have toggled the toggle bit for the failed + * transaction too. We have to toggle it back. + */ + usb_settoggle(dev, epnum, dir_out, !PTD_GET_TOGGLE(ptd)); + goto retry; + } + } + /* "Normal" errors; TD_NOTACCESSED would mean in effect that the function have NAKed + * the transactions from the first on for the whole frame. It may be busy and we retry + * with the same PTD. PTD_ACTIVE (and not TD_NOTACCESSED) would mean that some of the + * PTD didn't make it because the function was busy or the frame ended before the PTD + * finished. We prepare the rest of the data and try again. + */ + else if (cc == TD_NOTACCESSED || PTD_GET_ACTIVE(ptd) || (cc != TD_DATAUNDERRUN && PTD_GET_COUNT(ptd) < PTD_GET_LEN(ptd))) { + if (retries) { + --retries; + if (cc == TD_NOTACCESSED && PTD_GET_ACTIVE(ptd) && !PTD_GET_COUNT(ptd)) goto retry_same; + usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd)); + goto retry; + } } - if (cc != TD_CC_NOERROR) { + if (cc != TD_CC_NOERROR && cc != TD_DATAUNDERRUN) { DBG("****** completition code error %x ******", cc); switch (cc) { case TD_CC_BITSTUFFING: @@ -766,6 +795,7 @@ static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe, } return -cc; } + else usb_settoggle(dev, epnum, dir_out, PTD_GET_TOGGLE(ptd)); dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)"); @@ -1369,6 +1399,8 @@ int usb_lowlevel_init(void) DBG(""); + got_rhsc = rh_devnum = 0; + /* Init device registers addr */ isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR; isp116x->data_reg = (u16 *) ISP116X_HCD_DATA; From 2db64784061bfc34f4ba70ef1d2fbe7133b55670 Mon Sep 17 00:00:00 2001 From: Grzegorz Bernacki Date: Mon, 1 Oct 2007 09:51:50 +0200 Subject: [PATCH 56/73] Program EPLD to force full duplex mode for PHY. EPLD forces modes of PHY operation. By default full duplex is turned off. This fix turns it on. Signed-off-by: Grzegorz Bernacki --- board/amcc/luan/luan.c | 17 ++++++++++++----- cpu/ppc4xx/4xx_enet.c | 12 ++++++++---- 2 files changed, 20 insertions(+), 9 deletions(-) diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index 7b16f8a39a..1bd7efa0ba 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -39,8 +39,6 @@ extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ ************************************************************************/ int board_early_init_f(void) { - volatile epld_t *x = (epld_t *) CFG_EPLD_BASE; - mtebc( pb0ap, 0x03800000 ); /* set chip selects */ mtebc( pb0cr, 0xffc58000 ); /* ebc0_b0cr, 4MB at 0xffc00000 CS0 */ mtebc( pb1ap, 0x03800000 ); @@ -66,8 +64,6 @@ int board_early_init_f(void) mtdcr( uic0sr, 0x00000000 ); /* clear all interrupts */ mtdcr( uic0sr, 0xffffffff ); - x->ethuart &= ~EPLD2_RESET_ETH_N; /* put Ethernet+PHY in reset */ - return 0; } @@ -79,7 +75,18 @@ int board_early_init_f(void) int misc_init_r(void) { volatile epld_t *x = (epld_t *) CFG_EPLD_BASE; - x->ethuart |= EPLD2_RESET_ETH_N; /* take Ethernet+PHY out of reset */ + + /* set modes of operation */ + x->ethuart |= EPLD2_ETH_MODE_10 | EPLD2_ETH_MODE_100 | + EPLD2_ETH_MODE_1000 | EPLD2_ETH_DUPLEX_MODE; + /* clear ETHERNET_AUTO_NEGO bit to turn on autonegotiation */ + x->ethuart &= ~EPLD2_ETH_AUTO_NEGO; + + /* put Ethernet+PHY in reset */ + x->ethuart &= ~EPLD2_RESET_ETH_N; + udelay(10000); + /* take Ethernet+PHY out of reset */ + x->ethuart |= EPLD2_RESET_ETH_N; return 0; } diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index cc8e7346da..4e9a05e5bd 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -138,7 +138,8 @@ #define BI_PHYMODE_MII 7 #endif -#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GRX) || defined(CONFIG_440SP) #define SDR0_MFR_ETH_CLK_SEL_V(n) ((0x01<<27) / (n+1)) #endif @@ -408,7 +409,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) int ethgroup = -1; #endif #endif -#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || defined(CONFIG_440SPE) +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SPE) || defined(CONFIG_440SP) unsigned long mfr; #endif @@ -500,7 +502,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) __asm__ volatile ("eieio"); /* reset emac so we have access to the phy */ -#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) /* provide clocks for EMAC internal loopback */ mfsdr (sdr_mfr, mfr); mfr |= SDR0_MFR_ETH_CLK_SEL_V(devnum); @@ -518,7 +521,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) if (failsafe <= 0) printf("\nProblem resetting EMAC!\n"); -#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) /* remove clocks for EMAC internal loopback */ mfsdr (sdr_mfr, mfr); mfr &= ~SDR0_MFR_ETH_CLK_SEL_V(devnum); From 87c1833a39e944db66385286fd5e28f9b3fcdd50 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 2 Oct 2007 11:44:19 +0200 Subject: [PATCH 57/73] ppc4xx: lwmon5: Remove watchdog for now, since not fully tested yet Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 8ec4742c0f..00c34d5d7b 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -339,7 +339,12 @@ #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */ +#if 0 +/* + * ToDo: Watchdog is not test fully, so exclude it for now + */ #define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */ +#endif /* * For booting Linux, the board info and command line data From 738815c0cc44aa329097f868dc1efc49ede9c5ba Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 2 Oct 2007 11:44:46 +0200 Subject: [PATCH 58/73] ppc4xx: Coding style cleanup Signed-off-by: Stefan Roese --- board/amcc/luan/luan.c | 2 +- cpu/ppc4xx/440spe_pcie.c | 10 +++++----- cpu/ppc4xx/4xx_enet.c | 14 +++++++------- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index 1bd7efa0ba..0067ce0e7e 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -81,7 +81,7 @@ int misc_init_r(void) EPLD2_ETH_MODE_1000 | EPLD2_ETH_DUPLEX_MODE; /* clear ETHERNET_AUTO_NEGO bit to turn on autonegotiation */ x->ethuart &= ~EPLD2_ETH_AUTO_NEGO; - + /* put Ethernet+PHY in reset */ x->ethuart &= ~EPLD2_RESET_ETH_N; udelay(10000); diff --git a/cpu/ppc4xx/440spe_pcie.c b/cpu/ppc4xx/440spe_pcie.c index 158f1c5595..3eac0ae62c 100644 --- a/cpu/ppc4xx/440spe_pcie.c +++ b/cpu/ppc4xx/440spe_pcie.c @@ -104,7 +104,7 @@ static int pcie_read_config(struct pci_controller *hose, unsigned int devfn, if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) && ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1))) return 0; - + address = pcie_get_base(hose, devfn); offset += devfn << 4; @@ -136,12 +136,12 @@ static int pcie_write_config(struct pci_controller *hose, unsigned int devfn, int offset, int len, u32 val) { u8 *address; - + /* * Bus numbers are relative to hose->first_busno */ devfn -= PCI_BDF(hose->first_busno, 0, 0); - + /* * Same constraints as in pcie_read_config(). */ @@ -151,7 +151,7 @@ static int pcie_write_config(struct pci_controller *hose, unsigned int devfn, if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) && ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1))) return 0; - + address = pcie_get_base(hose, devfn); offset += devfn << 4; @@ -926,7 +926,7 @@ void ppc440spe_setup_pcie_rootpoint(struct pci_controller *hose, int port) in_le16((u16 *)(mbase + PCI_COMMAND)) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); printf("PCIE:%d successfully set as rootpoint\n",port); - + /* Set Device and Vendor Id */ switch (port) { case 0: diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index 4e9a05e5bd..71a9e372da 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -410,7 +410,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) #endif #endif #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_440SPE) || defined(CONFIG_440SP) + defined(CONFIG_440SP) || defined(CONFIG_440SPE) unsigned long mfr; #endif @@ -502,8 +502,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) __asm__ volatile ("eieio"); /* reset emac so we have access to the phy */ -#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_440SP) +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) /* provide clocks for EMAC internal loopback */ mfsdr (sdr_mfr, mfr); mfr |= SDR0_MFR_ETH_CLK_SEL_V(devnum); @@ -521,8 +521,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) if (failsafe <= 0) printf("\nProblem resetting EMAC!\n"); -#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ - defined(CONFIG_440SP) +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) /* remove clocks for EMAC internal loopback */ mfsdr (sdr_mfr, mfr); mfr &= ~SDR0_MFR_ETH_CLK_SEL_V(devnum); @@ -924,8 +924,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) /* set speed */ if (speed == _1000BASET) { -#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ - defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) unsigned long pfc1; mfsdr (sdr_pfc1, pfc1); From 9add9884b1fddc34ca186e00a2f868ccd5d02d87 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Tue, 2 Oct 2007 19:09:01 +0200 Subject: [PATCH 59/73] Fix memtest breakage CFG_MEMTEST_START uses weird magic involving gd, which fails to compile. Use hardcoded values instead (we actually know how much RAM we have on board.) Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 265264efbb..1809fc5d86 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -200,12 +200,8 @@ #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) #define CFG_LONGHELP 1 -#define CFG_MEMTEST_START \ - ({ gd->bd->bi_dram[0].start; }) -#define CFG_MEMTEST_END \ - ({ \ - gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \ - }) +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } #endif /* __CONFIG_H */ From 92869195ef8210758d2176230c0a36897afd50ed Mon Sep 17 00:00:00 2001 From: Bartlomiej Sieka Date: Fri, 5 Oct 2007 09:46:06 +0200 Subject: [PATCH 60/73] CM5200: Fix missing null-termination in hostname manipulation code Signed-off-by: Bartlomiej Sieka --- board/cm5200/cm5200.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c index b74ac08bce..e2ab5b8e26 100644 --- a/board/cm5200/cm5200.c +++ b/board/cm5200/cm5200.c @@ -397,6 +397,7 @@ int misc_init_r(void) "operational\n"); /* set the hostname appropriate to the module we're running on */ + hostname[0] = 0x00; compose_hostname(hw_id, hostname); setenv("hostname", hostname); From 2b2a587d6d3076387d22ac740f44044bf46e2cb8 Mon Sep 17 00:00:00 2001 From: Marian Balakowicz Date: Fri, 5 Oct 2007 10:40:54 +0200 Subject: [PATCH 61/73] tqm5200: Fix CONFIG_CMD_PCI typo in board config file. Signed-off-by: Marian Balakowicz --- include/configs/TQM5200.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index e0c9d81be0..5fd6b279e4 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -188,7 +188,7 @@ #endif #ifdef CONFIG_PCI -#define CONFIG_CMD_CMD_PCI +#define CONFIG_CMD_PCI #endif #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300) From 7b624ad254b97e5a25dca2304a398b64aeedaffe Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Sat, 6 Oct 2007 18:55:35 +0200 Subject: [PATCH 62/73] AVR32: Initialize bi_flash* in board_init_r The ATSTK1000-specific flash driver intializes bi_flashstart, bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI driver, don't. Initialize these in board_init_r instead so that things will still be set up correctly when we switch to the CFI driver. Signed-off-by: Haavard Skinnemoen --- board/atmel/atstk1000/flash.c | 4 ---- lib_avr32/board.c | 12 +++++++++++- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c index 958f4dc330..93d790f173 100644 --- a/board/atmel/atstk1000/flash.c +++ b/board/atmel/atstk1000/flash.c @@ -55,10 +55,6 @@ unsigned long flash_init(void) unsigned long addr; unsigned int i; - gd->bd->bi_flashstart = CFG_FLASH_BASE; - gd->bd->bi_flashsize = CFG_FLASH_SIZE; - gd->bd->bi_flashoffset = _edata - _text; - flash_info[0].size = CFG_FLASH_SIZE; flash_info[0].sector_count = 135; diff --git a/lib_avr32/board.c b/lib_avr32/board.c index 8b9ca38f50..11d864feac 100644 --- a/lib_avr32/board.c +++ b/lib_avr32/board.c @@ -310,10 +310,20 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) malloc_bin_reloc(); dma_alloc_init(); board_init_info(); - flash_init(); + + bd->bi_flashstart = 0; + bd->bi_flashsize = 0; + bd->bi_flashoffset = 0; + +#ifndef CFG_NO_FLASH + bd->bi_flashstart = CFG_FLASH_BASE; + bd->bi_flashsize = flash_init(); + bd->bi_flashoffset = (unsigned long)_edata - (unsigned long)_text; if (bd->bi_flashsize) display_flash_config(); +#endif + if (bd->bi_dram[0].size) display_dram_config(); From 8002012041f1ff9f997a5727abe5015f70cd2e46 Mon Sep 17 00:00:00 2001 From: Grzegorz Bernacki Date: Tue, 9 Oct 2007 13:58:24 +0200 Subject: [PATCH 63/73] [ads5121] EEPROM support added. Signed-off-by: Grzegorz Bernacki --- include/configs/ads5121.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index 22eac1b4b9..ee9cfd6768 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -234,6 +234,14 @@ #define CFG_I2C_NOPROBES {{0,0x69}} * Don't probe these addrs */ #endif +/* + * EEPROM configuration + */ +#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ +#define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ +#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ + /* * Ethernet configuration */ @@ -275,6 +283,7 @@ #define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_EEPROM #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI From e1893815b0999410d7a327589611c7b38e95299e Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 12 Oct 2007 15:49:39 +0200 Subject: [PATCH 64/73] GP3 SSA: enable RTC Signed-off-by: Wolfgang Denk --- include/configs/stxssa.h | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b41dafaf98..c6e7953209 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -189,20 +189,21 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif -/* I2C */ +/* + * I2C + */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F -#if 0 -#define CFG_I2C_NOPROBES {0x00} /* Don't probe these addrs */ -#else -/* I did the 'if 0' so we could keep the syntax above if ever needed. */ #undef CFG_I2C_NOPROBES -#endif #define CFG_I2C_OFFSET 0x3000 +/* I2C RTC */ +#define CONFIG_RTC_DS1337 /* This is really a DS1339 RTC */ +#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ + /* I2C EEPROM. AT24C32, we keep our environment in here. */ #define CFG_I2C_EEPROM_ADDR 0x51 /* 1010001x */ @@ -341,8 +342,13 @@ */ #include -#define CONFIG_CMD_PING +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI From de74b9eeacccaf0a42e5ecc9ae79a88f7a311296 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 13 Oct 2007 21:15:39 +0200 Subject: [PATCH 65/73] Coding Style cleanup. Signed-off-by: Wolfgang Denk --- CHANGELOG | 175 ++++++++++++++++++++++++++++++++++++++ drivers/at45.c | 18 ++-- include/configs/ads5121.h | 2 +- include/status_led.h | 4 +- lib_arm/board.c | 17 ++-- 5 files changed, 194 insertions(+), 22 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index 82b3145357..66fa2e1e0e 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,98 @@ +commit e1893815b0999410d7a327589611c7b38e95299e +Author: Wolfgang Denk +Date: Fri Oct 12 15:49:39 2007 +0200 + + GP3 SSA: enable RTC + + Signed-off-by: Wolfgang Denk + +commit 8002012041f1ff9f997a5727abe5015f70cd2e46 +Author: Grzegorz Bernacki +Date: Tue Oct 9 13:58:24 2007 +0200 + + [ads5121] EEPROM support added. + + Signed-off-by: Grzegorz Bernacki + +commit 2b2a587d6d3076387d22ac740f44044bf46e2cb8 +Author: Marian Balakowicz +Date: Fri Oct 5 10:40:54 2007 +0200 + + tqm5200: Fix CONFIG_CMD_PCI typo in board config file. + + Signed-off-by: Marian Balakowicz + +commit 92869195ef8210758d2176230c0a36897afd50ed +Author: Bartlomiej Sieka +Date: Fri Oct 5 09:46:06 2007 +0200 + + CM5200: Fix missing null-termination in hostname manipulation code + + Signed-off-by: Bartlomiej Sieka + +commit 738815c0cc44aa329097f868dc1efc49ede9c5ba +Author: Stefan Roese +Date: Tue Oct 2 11:44:46 2007 +0200 + + ppc4xx: Coding style cleanup + + Signed-off-by: Stefan Roese + +commit 87c1833a39e944db66385286fd5e28f9b3fcdd50 +Author: Stefan Roese +Date: Tue Oct 2 11:44:19 2007 +0200 + + ppc4xx: lwmon5: Remove watchdog for now, since not fully tested yet + + Signed-off-by: Stefan Roese + +commit 2db64784061bfc34f4ba70ef1d2fbe7133b55670 +Author: Grzegorz Bernacki +Date: Mon Oct 1 09:51:50 2007 +0200 + + Program EPLD to force full duplex mode for PHY. + + EPLD forces modes of PHY operation. By default full duplex is turned off. + This fix turns it on. + + Signed-off-by: Grzegorz Bernacki + +commit 86ec86c04326c3913178a7679aa910de071da75d +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Thu Sep 27 23:27:47 2007 +0200 + + Fix missing DECLARE_GLOBAL_DATA_PTR on CONFIG_LPC2292 in serial + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 3e954beb614b5b190d7f4f4c3b641437a0132e35 +Author: Stefan Roese +Date: Tue Sep 11 14:12:55 2007 +0200 + + ppc4xx: lwmon5: Change GPIO 58 to default to low (watchdog test) + + Signed-off-by: Stefan Roese + +commit 0d38effc6e359e6b1b0c78d66e8bc1a4dc15a2ae +Author: Grant Likely +Date: Tue Sep 25 15:48:05 2007 -0600 + + Fpga: fix incorrect test of CFG_FPGA_XILINX macro + + CFG_FPGA_XILINX is a bit value used to test against the value in + CONFIG_FPGA. Testing for a value will always return TRUE. I don't + think that is the intention in this code. + + Signed-off-by: Grant Likely + +commit 66dcad3a9a53e0766d90e0084123bd8529522fb0 +Author: Wolfgang Denk +Date: Thu Sep 20 00:04:14 2007 +0200 + + v1.3.0-rc2 + + Signed-off-by: Wolfgang Denk + commit 135e19bc2773ebca487e9a8371f67e1ba202313a Author: Wolfgang Denk Date: Tue Sep 18 21:36:35 2007 +0200 @@ -38,6 +133,21 @@ Date: Tue Sep 18 17:40:27 2007 +0200 Signed-off-by: Wolfgang Denk +commit bd86220f58b99d6896198c385fda132f0c980915 +Author: Peter Pearse +Date: Tue Sep 18 13:07:54 2007 +0100 + + Move coloured led API to status_led.h + Improve indentation in drivers/at45.c + +commit 97213f32416ead885deafea86774e912ffd60ad0 +Author: David Saada +Date: Mon Sep 17 17:04:47 2007 +0200 + + Description: Add NEC's PCI OHCI module ID to the USB OHCI driver + + Signed-off-by: David Saada + commit 67c31036acaaaa992fc346cc89db0909a7e733c4 Author: Wolfgang Denk Date: Sun Sep 16 17:10:04 2007 +0200 @@ -193,6 +303,18 @@ Date: Thu Sep 13 18:21:48 2007 +0200 Signed-off-by: Marian Balakowicz +commit e1f601b572db5de9aa81a0b77c68a86994fe24c4 +Author: Bartlomiej Sieka +Date: Thu Sep 13 16:33:59 2007 +0200 + + tqm5200: Restore customary env. variable boot commands for powerpc kernels + + - update default definitions of kernel_addr and fdt_addr env. variables + - make arch/powerpc booting the default scenario + - update MTD partition layout to match the above + + Signed-off-by: Bartlomiej Sieka + commit f34024d4a328e6edd906456da98d2c537155c4f7 Author: Wolfgang Denk Date: Wed Sep 12 00:48:57 2007 +0200 @@ -201,6 +323,12 @@ Date: Wed Sep 12 00:48:57 2007 +0200 Signed-off-by: Wolfgang Denk +commit d94c79e47011af5e8dd10ed6163c09b4cfc743cc +Author: Peter Pearse +Date: Tue Sep 11 15:35:01 2007 +0100 + + Final tidy + commit 38ad82da0c1180ecdeb212a8f4245e945bcc546e Author: Grzegorz Bernacki Date: Tue Sep 11 15:42:11 2007 +0200 @@ -507,6 +635,14 @@ Date: Thu Sep 6 09:46:17 2007 -0600 Signed-off-by: Grant Likely +commit 80767a6cead9990d9e77e62be947843c2c72f469 +Author: Peter Pearse +Date: Wed Sep 5 16:04:41 2007 +0100 + + Changed API name to coloured_led.h + Removed code using deprecated ifdef CONFIG_BOOTBINFUNC + Tidied other cpu/arm920t/start.S code + commit 56a9270521baaa00e12639a978302a67f61ef060 Author: Kumar Gala Date: Thu Aug 30 16:18:18 2007 -0500 @@ -532,6 +668,31 @@ Date: Thu Aug 30 01:58:48 2007 -0500 Signed-off-by: Ed Swarthout +commit 9f5c3d3720e777a572dcdc8af2008b44c7243885 +Author: Peter Pearse +Date: Tue Sep 4 16:18:38 2007 +0100 + + Add coloured led interface for ARM boards. + Use it in cpu/arm920t/start.S to indicate U-Boot code has been entered. + +commit 7462fe0d5a9d40cde083fb1a3cd73911996b5ecb +Author: Peter Pearse +Date: Tue Sep 4 14:49:28 2007 +0100 + + Move include/led.h to board/at91rm9200dk + +commit 6e4bf9b24e57c15abc6542e685d06380bc64af27 +Author: Peter Pearse +Date: Tue Sep 4 14:25:51 2007 +0100 + + Ran Lindent on drivers/at45.c + +commit 557ab89d294f08dd532f21d19861b40093200a33 +Author: Peter Pearse +Date: Tue Sep 4 14:23:50 2007 +0100 + + Rename CONFIG_CMD_MUX to CONFIG_CMD_AT91_SPIMUX + commit 81b73dec16fd1227369a191e725e10044a9d56b8 Author: Gary Jennejohn Date: Fri Aug 31 15:21:46 2007 +0200 @@ -607,6 +768,20 @@ Date: Wed Aug 29 18:26:24 2007 -0600 Signed-off-by: Grant Likely +commit 04625764cc93ce8a61625ac19d7fe2a2ceee8143 +Author: Stefan Roese +Date: Wed Aug 29 16:31:18 2007 +0200 + + ppc4xx: Change lwmon5 default environment to support Linux RTC + + The Linux PCF8563 RTC driver doesn't do autoprobing, so we need + to supply the RTC I2C address as bootline parameter. This patch + adds support for this rtc probing parameter to the bootargs: + + "rtc-pcf8563.probe=0,0x51" + + Signed-off-by: Stefan Roese + commit 2602a5c40ae37ab965a4e240854fdaffb51328a4 Author: Kim Phillips Date: Wed Aug 29 09:06:05 2007 -0500 diff --git a/drivers/at45.c b/drivers/at45.c index a075ebd5d7..dac987a43a 100644 --- a/drivers/at45.c +++ b/drivers/at45.c @@ -48,7 +48,7 @@ AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, /* process the address to obtain page address and byte address */ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << - pDataFlash->pDevice->page_offset) + + pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size)); /* fill the command buffer */ @@ -217,9 +217,10 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_PAGE_2_BUF1_TRF)&& - (BufferCommand != DB_PAGE_2_BUF2_TRF)) + if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && + (BufferCommand != DB_PAGE_2_BUF2_TRF)) { return DATAFLASH_BAD_COMMAND; + } /* no data to transmit or receive */ pDataFlash->pDataFlashDesc->tx_data_size = 0; @@ -250,9 +251,10 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer( { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_BUF1_WRITE) && - (BufferCommand != DB_BUF2_WRITE)) + if ((BufferCommand != DB_BUF1_WRITE) && + (BufferCommand != DB_BUF2_WRITE)) { return DATAFLASH_BAD_COMMAND; + } /* buffer address must be lower than page size */ if (bufferAddress > pDataFlash->pDevice->pages_size) @@ -319,7 +321,7 @@ AT91S_DataFlashStatus AT91F_PageErase( cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, + return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_ERASE, cmdsize, page * pDataFlash->pDevice->pages_size)); } @@ -375,7 +377,7 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; /* Send the command to the dataflash */ - return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, + return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, dest)); } @@ -445,7 +447,7 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, /* If destination does not fit a page start address */ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) { - length = + length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index ee9cfd6768..bb1efdf6de 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -239,7 +239,7 @@ */ #define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ #define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ -#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ /* diff --git a/include/status_led.h b/include/status_led.h index 74e2147cf9..d12bb67c2c 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -383,9 +383,9 @@ extern void __led_set (led_id_t mask, int state); # include #endif -/* +/* * Coloured LEDs API - */ + */ #ifndef __ASSEMBLY__ extern void coloured_LED_init (void); extern void red_LED_on(void); diff --git a/lib_arm/board.c b/lib_arm/board.c index 87848d94c0..af0233a620 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -117,23 +117,19 @@ void *sbrk (ptrdiff_t increment) * May be supplied by boards if desired */ void inline __coloured_LED_init (void) {} -void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); +void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); void inline __red_LED_on (void) {} void inline red_LED_on (void) __attribute__((weak, alias("__red_LED_on"))); void inline __red_LED_off(void) {} -void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); +void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); void inline __green_LED_on(void) {} -void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); +void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); void inline __green_LED_off(void) {} -void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); +void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); void inline __yellow_LED_on(void) {} -void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); +void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); void inline __yellow_LED_off(void) {} -void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); - - - - +void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); /************************************************************************ * Init Utilities * @@ -209,7 +205,6 @@ static void display_flash_config (ulong size) } #endif /* CFG_NO_FLASH */ - /* * Breathe some life into the board... * From fc19e36f741e8bc727c0a330170b3b5db90399ef Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 13 Oct 2007 23:51:14 +0200 Subject: [PATCH 66/73] Fix warning differ in signedness in board/mpl/vcma9/vcma9.c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Wolfgang Denk --- board/mpl/vcma9/vcma9.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c index 45ab6548f6..a4c463a314 100644 --- a/board/mpl/vcma9/vcma9.c +++ b/board/mpl/vcma9/vcma9.c @@ -288,7 +288,7 @@ int dram_init(void) int checkboard(void) { - unsigned char s[50]; + char s[50]; int i; backup_t *b = (backup_t *) s; @@ -337,7 +337,7 @@ int overwrite_console(void) ************************************************************************/ void print_vcma9_info(void) { - unsigned char s[50]; + char s[50]; int i; if ((i = getenv_r("serial#", s, 32)) < 0) { From 68f14f77ca5fe5f9cc025c8cae101671f628309f Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 29 Sep 2007 13:41:37 +0200 Subject: [PATCH 67/73] Fix warning differ in signedness in cpu/pxa/mmc.c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/pxa/mmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 0fbaa162fa..d76e0cdfe3 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -438,11 +438,11 @@ mmc_init(int verbose) /* FIXME fill in the correct size (is set to 32MByte) */ mmc_dev.blksz = 512; mmc_dev.lba = 0x10000; - sprintf(mmc_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x", + sprintf((char*)mmc_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x", cid->id[0], cid->id[1], cid->id[2], cid->sn[0], cid->sn[1], cid->sn[2]); - sprintf(mmc_dev.product,"%s",cid->name); - sprintf(mmc_dev.revision,"%x %x",cid->hwrev, cid->fwrev); + sprintf((char*)mmc_dev.product,"%s",cid->name); + sprintf((char*)mmc_dev.revision,"%x %x",cid->hwrev, cid->fwrev); mmc_dev.removable = 0; mmc_dev.block_read = mmc_bread; From 636400198228d96983c06657b17f760f5989958e Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 14 Oct 2007 00:13:19 +0200 Subject: [PATCH 68/73] Prepare for 1.3.0-rc3 release Signed-off-by: Wolfgang Denk --- CHANGELOG | 339 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ Makefile | 4 +- 2 files changed, 341 insertions(+), 2 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index 66fa2e1e0e..b038749c9b 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,28 @@ +commit 68f14f77ca5fe5f9cc025c8cae101671f628309f +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Sep 29 13:41:37 2007 +0200 + + Fix warning differ in signedness in cpu/pxa/mmc.c + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit fc19e36f741e8bc727c0a330170b3b5db90399ef +Author: Wolfgang Denk +Date: Sat Oct 13 23:51:14 2007 +0200 + + Fix warning differ in signedness in board/mpl/vcma9/vcma9.c + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Wolfgang Denk + +commit de74b9eeacccaf0a42e5ecc9ae79a88f7a311296 +Author: Wolfgang Denk +Date: Sat Oct 13 21:15:39 2007 +0200 + + Coding Style cleanup. + + Signed-off-by: Wolfgang Denk + commit e1893815b0999410d7a327589611c7b38e95299e Author: Wolfgang Denk Date: Fri Oct 12 15:49:39 2007 +0200 @@ -14,6 +39,21 @@ Date: Tue Oct 9 13:58:24 2007 +0200 Signed-off-by: Grzegorz Bernacki +commit 7b624ad254b97e5a25dca2304a398b64aeedaffe +Author: Haavard Skinnemoen +Date: Sat Oct 6 18:55:35 2007 +0200 + + AVR32: Initialize bi_flash* in board_init_r + + The ATSTK1000-specific flash driver intializes bi_flashstart, + bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI + driver, don't. + + Initialize these in board_init_r instead so that things will still be + set up correctly when we switch to the CFI driver. + + Signed-off-by: Haavard Skinnemoen + commit 2b2a587d6d3076387d22ac740f44044bf46e2cb8 Author: Marian Balakowicz Date: Fri Oct 5 10:40:54 2007 +0200 @@ -30,6 +70,18 @@ Date: Fri Oct 5 09:46:06 2007 +0200 Signed-off-by: Bartlomiej Sieka +commit 9add9884b1fddc34ca186e00a2f868ccd5d02d87 +Author: Haavard Skinnemoen +Date: Tue Oct 2 19:09:01 2007 +0200 + + Fix memtest breakage + + CFG_MEMTEST_START uses weird magic involving gd, which fails to + compile. Use hardcoded values instead (we actually know how much RAM + we have on board.) + + Signed-off-by: Haavard Skinnemoen + commit 738815c0cc44aa329097f868dc1efc49ede9c5ba Author: Stefan Roese Date: Tue Oct 2 11:44:46 2007 +0200 @@ -85,6 +137,66 @@ Date: Tue Sep 25 15:48:05 2007 -0600 Signed-off-by: Grant Likely +commit 853643d8cf2ca80cb2e25c53ad5dc580abafe166 +Author: Michal Simek +Date: Mon Sep 24 00:41:30 2007 +0200 + + [FIX] change command handling and removing code violation + +commit f240356507038e5ce55e8a24cb2607e9eae6d10c +Author: Michal Simek +Date: Mon Sep 24 00:36:06 2007 +0200 + + [FIX] change sets of commands + because changing of command handling brings + compilation problems + +commit cb1bc63b75a232571eb69aa2c8aa919321655845 +Author: Michal Simek +Date: Mon Sep 24 00:30:42 2007 +0200 + + [FIX] Email reparation & Copyright + Both codes are written by myself without any + support from CTU + +commit 0731cbae6c2feab93b244d83fd6a43f5cc9bf852 +Author: Michal Simek +Date: Mon Sep 24 00:25:11 2007 +0200 + + [PATCH] Change macro name for UartLite + because PowerPC 405 can use UartLite as console + +commit 1c1100d2fcf46b9d11dcf78d6e5aea75e2e8b716 +Author: Michal Simek +Date: Mon Sep 24 00:21:19 2007 +0200 + + [PATCH] Add support for design without interrupt controller + Polling timer + +commit 0731933ec8ec45d02ba89b52df673d526873cdde +Author: Michal Simek +Date: Mon Sep 24 00:19:48 2007 +0200 + + [FIX] resolve problem with cpu without barrel shifter + +commit db14d77995ce515b728b178b63f82babe60e3d56 +Author: Michal Simek +Date: Mon Sep 24 00:18:46 2007 +0200 + + [FIX] repair email address + +commit 481d4328618804add1f818a6c96296121cd0528e +Author: Michal Simek +Date: Mon Sep 24 00:17:42 2007 +0200 + + [FIX] repair MFSL commands + +commit b90c045f035c3cc9b5d2edaed6048dfb74e40763 +Author: Michal Simek +Date: Mon Sep 24 00:08:37 2007 +0200 + + synchronizition with mainline + commit 66dcad3a9a53e0766d90e0084123bd8529522fb0 Author: Wolfgang Denk Date: Thu Sep 20 00:04:14 2007 +0200 @@ -140,6 +252,33 @@ Date: Tue Sep 18 13:07:54 2007 +0100 Move coloured led API to status_led.h Improve indentation in drivers/at45.c +commit e80e585b00fbbab7ad1bf71619741f2c5b029ab7 +Author: Eirik Aanonsen +Date: Tue Sep 18 08:47:20 2007 +0200 + + Update atstk1002 bootargs. + + Updates to atstk1002 U-Boot header file: + - Changed bootargs: + * Set the bootargs for at1002 to point to the SD-card partition instead + * ... of the boot flash. + * Removing the rootfstype since that argument are not needed. + + Signed-off-by: Eirik Aanonsen + Signed-off-by: Haavard Skinnemoen + +commit a4f3aab6dfbed6c29367c688bfb8a47eef62c225 +Author: Eirik Aanonsen +Date: Wed Sep 12 13:32:37 2007 +0200 + + Add some comments to clocks in atstk1002.h + + This patch applies some clarifying comments to how the different + clocks are setup according to atstk1002.h Some of the previous + comments where stating wrongful information. + + Signed-off-by: Haavard Skinnemoen + commit 97213f32416ead885deafea86774e912ffd60ad0 Author: David Saada Date: Mon Sep 17 17:04:47 2007 +0200 @@ -148,6 +287,50 @@ Date: Mon Sep 17 17:04:47 2007 +0200 Signed-off-by: David Saada +commit 30363e98fa470fbecea5e8bc0f1443352754f303 +Author: Stefan Roese +Date: Mon Sep 17 08:20:47 2007 +0200 + + Small whitespace cleanup of OneNAND patch + + Signed-off-by: Stefan Roese + +commit d7e8ce101a4a45ed6ed45739fc2de5f87b13f7f1 +Author: Kyungmin Park +Date: Mon Sep 10 17:15:14 2007 +0900 + + OneNAND support (take #2) + + [PATCH 3/3] OneNAND support (take #2) + + OneNAND support at U-Boot + + Signed-off-by: Kyungmin Park + +commit 17aa2800457df0c06b41516f46f126712c196219 +Author: Kyungmin Park +Date: Mon Sep 10 17:14:34 2007 +0900 + + OneNAND support (take #2) + + [PATCH 2/3] OneNAND support (take #2) + + OneNAND support at U-Boot + + Signed-off-by: Kyungmin Park + +commit 916527f4809a7bcd811f1f1daf34af184e31dd8c +Author: Kyungmin Park +Date: Mon Sep 10 17:13:49 2007 +0900 + + OneNAND support (take #2) + + [PATCH 1/3] OneNAND support (take #2) + + OneNAND support at U-Boot + + Signed-off-by: Kyungmin Park + commit 67c31036acaaaa992fc346cc89db0909a7e733c4 Author: Wolfgang Denk Date: Sun Sep 16 17:10:04 2007 +0200 @@ -350,6 +533,12 @@ Date: Tue Sep 11 12:57:52 2007 +0200 Signed-off-by: Grzegorz Bernacki +commit d45963854eff39d575124d859419bb4953ce2c87 +Author: Michal Simek +Date: Tue Sep 11 00:37:04 2007 +0200 + + [FIX] Microblaze ML401 - repare FLASH handling + commit 38c1ef728d19950414a8ab1ccfc53767848fa346 Author: Sean MCGOOGAN Date: Mon Sep 10 16:55:59 2007 +0100 @@ -733,6 +922,24 @@ Date: Fri Aug 31 10:01:51 2007 +0200 Signed-off-by: Wolfgang Denk +commit 696dd1307cd8e73a10e9bb3c51731bfd6f837bee +Author: Hans-Christian Egtvedt +Date: Thu Aug 30 15:03:05 2007 +0200 + + Reduce BOOTDELAY variable to 1 second by default for STK1002 + + Signed-off-by: Hans-Christian Egtvedt + Signed-off-by: Haavard Skinnemoen + +commit c88b6e1cbf9a8ae2a34fb602f78a1bf4e6692b6a +Author: Hans-Christian Egtvedt +Date: Thu Aug 30 15:03:04 2007 +0200 + + Remove double quotation marks around MAC address for STK1002 + + Signed-off-by: Hans-Christian Egtvedt + Signed-off-by: Haavard Skinnemoen + commit ff13ac8c7bbebb238e339592de765c546dba1073 Author: Wolfgang Denk Date: Thu Aug 30 14:42:15 2007 +0200 @@ -995,6 +1202,15 @@ Date: Tue Aug 28 17:39:14 2007 +0200 Signed-off-by: Heiko Schocher +commit 2c05fd125744981e5f2828d24e66ccc20a77d25d +Author: Semih Hazar +Date: Mon Aug 20 19:00:01 2007 +0300 + + AVR32: Change prototype of memset + + Signed-off-by: Semih Hazar + Signed-off-by: Haavard Skinnemoen + commit 9c02defc29b57945b600714cf61ddfd02b02fb14 Author: Yuri Tikhonov Date: Sat Aug 25 05:07:16 2007 +0200 @@ -1520,6 +1736,18 @@ Date: Fri Jun 22 17:32:28 2007 +0200 Signed-off-by: Reinhard Arlt Signed-off-by: Stefan Roese +commit 78cff50edba6b1508eb15c2f53ce966ac891eb9e +Author: Michal Simek +Date: Thu Aug 16 10:46:28 2007 +0200 + + [FIX] Changes for bios_emulator code for others architecture + +commit 6e0e2253f039344f8ebd2787285fdba90e6714e8 +Author: Michal Simek +Date: Thu Aug 16 10:45:09 2007 +0200 + + [FIX] Remove unused include file + commit 9de469bd960cc1870bb40d6672ed42726b8b50d7 Author: Stefan Roese Date: Thu Aug 16 10:18:33 2007 +0200 @@ -1615,6 +1843,25 @@ Date: Wed Aug 15 22:30:05 2007 -0500 Signed-off-by: Kim Phillips +commit 5b4de9309d7a03aa1db2e5391ab696363391f460 +Author: Michal Simek +Date: Wed Aug 15 21:15:05 2007 +0200 + + [FIX] Resolve problem with warnings + microblaze toolchain don't support PRAGMA PACK. + +commit d1ed28cf36ab6b1d4c479809de7252bf53d2f2d4 +Author: Michal Simek +Date: Wed Aug 15 21:05:07 2007 +0200 + + [FIX] Correction command setting for Microblaze boards + +commit 7aa63d8cd30ab20ac2fd1ab86e60471de8b1f1e5 +Author: Michal Simek +Date: Wed Aug 15 21:03:41 2007 +0200 + + [FIX] Correction command definition + commit 30b52df9e906bf0e465916c2c6bb5192b438e0b8 Author: Jon Loeliger Date: Wed Aug 15 11:55:35 2007 -0500 @@ -3095,6 +3342,24 @@ Date: Tue Aug 7 16:02:13 2007 +0200 Signed-off-by: Wolfgang Denk +commit 706714d97a0d08d59eda4de2268c39f504688329 +Author: Michal Simek +Date: Mon Aug 6 23:41:53 2007 +0200 + + [FIX] remove cute code + +commit f500d9fdeb576288656dac427052ad2c5ca0ad1a +Author: Michal Simek +Date: Mon Aug 6 23:35:26 2007 +0200 + + [FIX] Fix romfs code + +commit ab4b956d3143f8f8174089053f5dfabbb04762b0 +Author: Michal Simek +Date: Mon Aug 6 23:31:49 2007 +0200 + + [FIX] Coding style cleanup - Wolfgang's suggestions + commit 6c33c78557ca6f8da68c01ce33e278695197d3f4 Author: Wolfgang Denk Date: Mon Aug 6 23:21:05 2007 +0200 @@ -3219,6 +3484,32 @@ Date: Thu Aug 2 14:09:49 2007 -0500 Signed-off-by: Zhang Wei Signed-off-by: Jon Loeliger +commit a274ca4f6d68830e7c916f897561cff8c4101c38 +Author: Michal Simek +Date: Sun Aug 5 22:33:05 2007 +0200 + + [FIX] Coding style cleanup + +commit af8377d4eb3a0ac5a831830d5ce63fbf65fecb7f +Author: Michal Simek +Date: Sun Aug 5 16:13:31 2007 +0200 + + [FIX] Xilinx Uartlite driver + Because PPC405 can use UARTLITE serial interface and + Microblaze can use Uart16550 serial interface not only Uartlite. + +commit 98889edd50aadf862071eb5664747ad0d568a20e +Author: Michal Simek +Date: Sun Aug 5 15:54:53 2007 +0200 + + [FIX] Change configuration for XUPV2P Microblaze board + +commit 537091b4eed9302865d03fef3f7212b4fe5cf28f +Author: Michal Simek +Date: Sun Aug 5 15:53:50 2007 +0200 + + [PATCH] Added support for Xilinx Emac community driver + commit 86b116b1b1e165ca4840daefed36d2e3b8460173 Author: Bartlomiej Sieka Date: Fri Aug 3 12:08:16 2007 +0200 @@ -3519,6 +3810,12 @@ Date: Mon Jul 16 08:53:51 2007 +0200 Signed-off-by: Stefan Roese +commit 0c0a9cda1bde37106520476ed486bd67eb8d30ae +Author: Michal Simek +Date: Mon Jul 16 00:31:07 2007 +0200 + + [PATCH] Support for Xilinx EmacLite controller + commit 3a6cab844cf74f76639d795e0be8717e02c86af7 Author: Wolfgang Denk Date: Sat Jul 14 22:51:02 2007 +0200 @@ -3527,12 +3824,42 @@ Date: Sat Jul 14 22:51:02 2007 +0200 Signed-off-by: Wolfgang Denk +commit 5280f352c8da33b1d7fbf448768717d9e16ff9a1 +Author: Michal Simek +Date: Sat Jul 14 13:11:28 2007 +0200 + + [FIX] support for simply measuring time + +commit 91bb4ca665d2e0cf7f60c4b5b370990250ec0c43 +Author: Michal Simek +Date: Sat Jul 14 12:41:23 2007 +0200 + + [FS] Added support for ROMFS + commit 011595307731a7a67a7445d107c279d031e8ab97 Author: Heiko Schocher Date: Sat Jul 14 01:06:58 2007 +0200 [PCS440EP] - fix compile error, if BUILD_DIR is used +commit 5a2f1098d81ad58b309e5e558d0492643166a799 +Author: Michal Simek +Date: Sat Jul 14 00:18:48 2007 +0200 + + [PATCH] Support time without timer + +commit a476ca2ac2217ddd05a2bf0c514075814b10a3c0 +Author: Michal Simek +Date: Fri Jul 13 21:43:55 2007 +0200 + + [PATCH] Remove problem with disabled BARREL SHIFTER + +commit 55e26ad62107d2f14f757de3ae0b14b9aa7aed94 +Author: Michal Simek +Date: Fri Jul 13 21:41:44 2007 +0200 + + [FIX] correct help for rspr + commit fad63407154f46246ce80d53a9c669a44362ac67 Author: Heiko Schocher Date: Fri Jul 13 09:54:17 2007 +0200 @@ -5717,6 +6044,18 @@ Date: Mon Jun 18 13:50:13 2007 -0500 Signed-off-by: TsiChung Liew +commit 093172f08d6afb3f34d8a2f26ee0ee874261cf27 +Author: Michal Simek +Date: Sun Jun 17 19:04:11 2007 +0200 + + [fix] email reparation + +commit 3666afffe7baf859c6ae0ce2bebbc8ab7e512ddc +Author: Michal Simek +Date: Sun Jun 17 19:03:21 2007 +0200 + + [FIX] fix microblaze file permitission + commit e73846b7cf1e29ae635bf9bb5570269663df2ee5 Author: Stefan Roese Date: Fri Jun 15 11:33:41 2007 +0200 diff --git a/Makefile b/Makefile index 5fe67fc003..e1cea0d36f 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,5 @@ # -# (C) Copyright 2000-2006 +# (C) Copyright 2000-2007 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -24,7 +24,7 @@ VERSION = 1 PATCHLEVEL = 3 SUBLEVEL = 0 -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc3 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) VERSION_FILE = $(obj)include/version_autogenerated.h From f8bf90461d9bad2e6fed31fcebaf235f60dd6763 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 14 Oct 2007 16:12:29 +0200 Subject: [PATCH 69/73] [FIX] XUPV2P change command handling and remove code violation --- include/configs/xupv2p.h | 36 +++++++++++++++++------------------- 1 file changed, 17 insertions(+), 19 deletions(-) diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index b1c0ee666f..c9320c287c 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,7 +31,7 @@ #define CONFIG_XUPV2P 1 /* uart */ -#define CONFIG_XILINX_UARTLITE +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -49,11 +49,13 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -#define CFG_RESET_ADDRESS 0x36000000 +/* #define CFG_RESET_ADDRESS 0x36000000 */ /* gpio */ +#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -66,6 +68,7 @@ #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ /* * memory layout - Example @@ -120,7 +123,6 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) - /* * BOOTP options */ @@ -129,29 +131,23 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_NET -#define CONFIG_CMD_IMI -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_RUN -#define CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MISC -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_IRQ #define CONFIG_CMD_PING +#ifdef XILINX_SYSACE_BASEADDR +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " @@ -163,7 +159,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" +#define CONFIG_HOSTNAME "xupv2p" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -179,11 +175,13 @@ "echo" /* system ace */ +#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION +#endif #endif /* __CONFIG_H */ From 5a5958b7de70ae99f0e7cbd5c97ec1346e051587 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 15 Oct 2007 11:29:33 +0200 Subject: [PATCH 70/73] ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese --- board/amcc/sequoia/sequoia.c | 7 ++++--- board/amcc/yosemite/yosemite.c | 7 +++++-- include/configs/sequoia.h | 2 ++ include/configs/yosemite.h | 2 ++ 4 files changed, 13 insertions(+), 5 deletions(-) diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index f823117687..4e47ab395b 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2006 + * (C) Copyright 2006-2007 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * (C) Copyright 2006 @@ -24,6 +24,7 @@ #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -362,8 +363,8 @@ int checkboard(void) printf("Board: Rainier - AMCC PPC440GRx Evaluation Board"); #endif - rev = in8(CFG_BCSR_BASE + 0); - val = in8(CFG_BCSR_BASE + 5) & 0x01; + rev = in_8((void *)(CFG_BCSR_BASE + 0)); + val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN; printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); if (s != NULL) { diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 912f09ee43..6ec922ab00 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -1,4 +1,6 @@ /* + * (C) Copyright 2006-2007 + * Stefan Roese, DENX Software Engineering, sr@denx.de. * * See file CREDITS for list of people who contributed to this * project. @@ -22,6 +24,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -181,8 +184,8 @@ int checkboard(void) printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board"); #endif - rev = *(u8 *)(CFG_CPLD + 0); - val = *(u8 *)(CFG_CPLD + 5) & 0x01; + rev = in_8((void *)(CFG_BCSR_BASE + 0)); + val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN; printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); if (s != NULL) { diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index c2e1386217..600f98cf0d 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -450,6 +450,8 @@ #define CFG_EBC_PB2AP 0x24814580 #define CFG_EBC_PB2CR (CFG_BCSR_BASE | 0x38000) +#define CFG_BCSR5_PCI66EN 0x80 + /*----------------------------------------------------------------------- * NAND FLASH *----------------------------------------------------------------------*/ diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index 6a5b7f1eaa..35bce4af90 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -359,6 +359,8 @@ #define CFG_EBC_PB2AP 0x04814500 #define CFG_EBC_PB2CR (CFG_CPLD | 0x18000) +#define CFG_BCSR5_PCI66EN 0x80 + /*----------------------------------------------------------------------- * Cache Configuration */ From e2e93442e558cf1500e92861f99713b2f045ea22 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 15 Oct 2007 11:39:00 +0200 Subject: [PATCH 71/73] ppc4xx: Fix bug in I2C bootstrap values for Sequoia/Rainier The I2C bootstrap values that can be setup via the "bootstrap" command, were setup incorrect regarding the generation of the internal sync PCI clock. The values for PLB clock == 133MHz were slighly incorrect and the values for PLB clock == 166MHz were totally incorrect. This could lead to a hangup upon booting while PCI configuration scan. This patch fixes this issue and configures valid PCI divisor values for the sync PCI clock, with respect to the provided external async PCI frequency. Here the values of the formula in the chapter 14.2 "PCI clocking" from the 440EPx users manual: AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz 33MHz async PCI frequency: PLB = 133: => 32 <= 44.3 <= 65 (div = 3) PLB = 166: => 32 <= 55.3 <= 65 (div = 3) 66MHz async PCI frequency: PLB = 133: => 65 <= 66.5 <= 132 (div = 2) PLB = 166: => 65 <= 83 <= 132 (div = 2) Signed-off-by: Stefan Roese --- board/amcc/sequoia/cmd_sequoia.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c index f3803c09f8..e7997e94db 100644 --- a/board/amcc/sequoia/cmd_sequoia.c +++ b/board/amcc/sequoia/cmd_sequoia.c @@ -25,6 +25,7 @@ #include #include #include +#include /* * There are 2 versions of production Sequoia & Rainier platforms. @@ -200,8 +201,12 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } /* check CPLD register +5 for PCI 66MHz flag */ - if (in8(CFG_BCSR_BASE + 5) & 0x01) - buf[5] += 0x10; + if ((in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN) == 0) + /* + * PLB-to-PCI divisor = 3 for 33MHz sync PCI + * instead of 2 for 66MHz systems + */ + buf[5] |= 0x08; if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0) printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR); From 4d4a945e189a2f384c66432316da2788a0ac1607 Mon Sep 17 00:00:00 2001 From: Rodolfo Giometti Date: Mon, 15 Oct 2007 11:59:17 +0200 Subject: [PATCH 72/73] PXA USB OHCI: "usb stop" implementation. Some USB keys need to be switched off before loading the kernel otherwise they can remain in an undefined status which prevents them to be correctly recognized by the kernel. Signed-off-by: Rodolfo Giometti --- cpu/pxa/usb.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c index 65f457fe59..3c11d4de44 100644 --- a/cpu/pxa/usb.c +++ b/cpu/pxa/usb.c @@ -67,6 +67,22 @@ int usb_cpu_init() int usb_cpu_stop() { + UHCHR |= UHCHR_FHR; + udelay(11); + UHCHR &= ~UHCHR_FHR; + + UHCCOMS |= 1; + udelay(10); + +#if defined(CONFIG_CPU_MONAHANS) + UHCHR |= UHCHR_SSEP0; +#endif +#if defined(CONFIG_PXA27X) + UHCHR |= UHCHR_SSEP2; +#endif + UHCHR |= UHCHR_SSEP1; + UHCHR |= UHCHR_SSE; + return 0; } From 2491167c245d8ebe6f2dbd8c4287aaa0d14fe93a Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Mon, 27 Aug 2007 12:41:03 -0500 Subject: [PATCH 73/73] 86xx: Allow for fewer DDR slots per memory controller. As a direct correlation exists between DDR DIMM slots and SPD EEPROM addresses used to configure them, use the individually defined SPD_EEPROM_ADDRESS* values to determine if a DDR DIMM slot should have its SPD configuration read or not. Effectively, this now allows for 1 or 2 DIMM slots per memory controller. Signed-off-by: Jon Loeliger --- cpu/mpc86xx/spd_sdram.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index f37ab430b3..059097f514 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -948,19 +948,25 @@ unsigned int enable_ddr(unsigned int ddr_num) * Read both dimm slots and decide whether * or not to enable this controller. */ - memset((void *)&spd1,0,sizeof(spd1)); - memset((void *)&spd2,0,sizeof(spd2)); + memset((void *)&spd1, 0, sizeof(spd1)); + memset((void *)&spd2, 0, sizeof(spd2)); if (ddr_num == 1) { CFG_READ_SPD(SPD_EEPROM_ADDRESS1, 0, 1, (uchar *) &spd1, sizeof(spd1)); +#if defined(SPD_EEPROM_ADDRESS2) CFG_READ_SPD(SPD_EEPROM_ADDRESS2, 0, 1, (uchar *) &spd2, sizeof(spd2)); +#endif } else { +#if defined(SPD_EEPROM_ADDRESS3) CFG_READ_SPD(SPD_EEPROM_ADDRESS3, 0, 1, (uchar *) &spd1, sizeof(spd1)); +#endif +#if defined(SPD_EEPROM_ADDRESS4) CFG_READ_SPD(SPD_EEPROM_ADDRESS4, 0, 1, (uchar *) &spd2, sizeof(spd2)); +#endif } /* @@ -1105,21 +1111,25 @@ spd_sdram(void) { int memsize_ddr1_dimm1 = 0; int memsize_ddr1_dimm2 = 0; + int memsize_ddr1 = 0; + unsigned int law_size_ddr1; + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; + volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; + +#if (CONFIG_NUM_DDR_CONTROLLERS > 1) int memsize_ddr2_dimm1 = 0; int memsize_ddr2_dimm2 = 0; - int memsize_total = 0; - int memsize_ddr1 = 0; int memsize_ddr2 = 0; + unsigned int law_size_ddr2; +#endif + unsigned int ddr1_enabled = 0; unsigned int ddr2_enabled = 0; - unsigned int law_size_ddr1; - unsigned int law_size_ddr2; - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; + int memsize_total = 0; #ifdef CONFIG_DDR_INTERLEAVE unsigned int law_size_interleaved; - volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; volatile ccsr_ddr_t *ddr2 = &immap->im_ddr2; memsize_ddr1_dimm1 = spd_init(SPD_EEPROM_ADDRESS1, @@ -1194,9 +1204,11 @@ spd_sdram(void) (unsigned int)memsize_total * 1024*1024); memsize_total += memsize_ddr1_dimm1; +#if defined(SPD_EEPROM_ADDRESS2) memsize_ddr1_dimm2 = spd_init(SPD_EEPROM_ADDRESS2, 1, 2, (unsigned int)memsize_total * 1024*1024); +#endif memsize_total += memsize_ddr1_dimm2; /*