brain-hackers_pepepper-mirror
/
u-boot-brain
mirror of https://github.com/brain-hackers/u-boot-brain
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Xilinx changes for v2020.10 

Versal:
 - xspi bootmode fix
 - Removing one clock from clk driver
 - Align u-boot memory setting with OS by default
 - Map TCM and OCM by default
 
 ZynqMP:
 - Minor DT improvements
 - Reduce console buffer for mini configurations
 - Add fix for AMS
 - Add support for XDP platform
 
 Zynq:
 - Support for AES engine
 - Enable bigger memory test by default
 - Extend documentation for SD preparation
 - Use different freq for Topic miami board
 
 mmc:
 - minor GD pointer removal
 
 net:
 - Support fixed-link cases by zynq gem
 - Fix phy looking loop in axi enet driver
 
 spi:
 - Cleanup global macros for xilinx spi drivers
 
 firmware:
 - Add support for pmufw reloading
 
 fpga:
 - Improve error status reporting
 
 common:
 - Remove 4kB addition space for FDT allocation
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXvScEQAKCRDKSWXLKUoM
 IeHUAJ9Z1shAlbILuHZKEpqQySLHdUVgBQCff8Nf+wi1rByTrwflKt14MtIsdFY=
 =2Yuu
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2020.10

Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default

ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform

Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board

mmc:
- minor GD pointer removal

net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver

spi:
- Cleanup global macros for xilinx spi drivers

firmware:
- Add support for pmufw reloading

fpga:
- Improve error status reporting

common:
- Remove 4kB addition space for FDT allocation
This commit is contained in:
Tom Rini 2020-06-25 09:33:39 -04:00
parent 6ccbd1590f b8fd54d62f
commit f0e236c8d6
141 changed files with 3716 additions and 2497 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.azure-pipelines.yml
View File

@ -2,7 +2,7 @@ variables:
windows_vm: vs2017-win2016
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200526-18Jun2020
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.

2
.gitlab-ci.yml
View File

@ -2,7 +2,7 @@
# Grab our configured image. The source for this is found at:
# https://gitlab.denx.de/u-boot/gitlab-ci-runner
image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020
image: trini/u-boot-gitlab-ci-runner:bionic-20200526-18Jun2020
# We run some tests in different order, to catch some failures quicker.
stages:

1
MAINTAINERS
View File

@ -145,6 +145,7 @@ F: drivers/power/domain/meson-gx-pwrc-vpu.c
F: drivers/video/meson/
F: include/configs/meson64.h
F: include/configs/meson64_android.h
F: doc/board/amlogic/
N: meson
ARM BROADCOM BCM283X

2
Makefile
View File

@ -3,7 +3,7 @@
VERSION = 2020
PATCHLEVEL = 07
SUBLEVEL =
EXTRAVERSION = -rc4
EXTRAVERSION = -rc5
NAME =
# *DOCUMENTATION*

2
arch/arm/Kconfig
View File

@ -873,11 +873,11 @@ config ARCH_MX7ULP
config ARCH_MX7
bool "Freescale MX7"
select ARCH_MISC_INIT
select BOARD_EARLY_INIT_F
select CPU_V7A
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
imply BOARD_EARLY_INIT_F
imply MXC_GPIO
imply SYS_THUMB_BUILD

1
arch/arm/dts/Makefile
View File

@ -280,6 +280,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc1.dtb \
zynqmp-mini-nand.dtb \
zynqmp-mini-qspi.dtb \
zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \
zynqmp-zcu100-revC.dtb \
zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \

15
arch/arm/dts/fsl-imx8qm.dtsi
View File

@ -21,13 +21,14 @@
aliases {
ethernet0 = &fec1;
ethernet1 = &fec2;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
gpio5 = &gpio6;
gpio6 = &gpio7;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
gpio5 = &gpio5;
gpio6 = &gpio6;
gpio7 = &gpio7;
serial0 = &lpuart0;
serial1 = &lpuart1;
serial2 = &lpuart2;

8
arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
View File

@ -34,3 +34,11 @@
&usdhc1 {
status = "disabled";
};
&usdhc2 {
u-boot,dm-pre-reloc;
};
&usdhc3 {
u-boot,dm-pre-reloc;
};

2
arch/arm/dts/imx6qdl-sabreauto.dtsi
View File

@ -281,7 +281,7 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;

2
arch/arm/dts/imx6qdl-sabresd.dtsi
View File

@ -204,7 +204,7 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
status = "okay";
};

11
arch/arm/dts/imx6qdl-sr-som.dtsi
View File

@ -53,10 +53,21 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@0 {
reg = <0>;
qca,clk-out-frequency = <125000000>;
};
};
};
&iomuxc {

2
arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
View File

@ -171,6 +171,8 @@
&sdmmc1 {
u-boot,dm-spl;
broken-cd;
/delete-property/ cd-gpios;
};
&sdmmc1_b4_pins_a {

2
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
View File

@ -167,6 +167,8 @@
&sdmmc1 {
u-boot,dm-spl;
broken-cd;
/delete-property/ cd-gpios;
};
&sdmmc1_b4_pins_a {

3
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
View File

@ -273,6 +273,9 @@
&sdmmc1 {
u-boot,dm-spl;
broken-cd;
/delete-property/ cd-gpios;
/delete-property/ disable-wp;
};
&sdmmc1_b4_pins_a {

5
arch/arm/dts/tegra186.dtsi
View File

@ -335,4 +335,9 @@
status = "disabled";
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
};

5
arch/arm/dts/tegra210.dtsi
View File

@ -867,6 +867,11 @@
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13

10
arch/arm/dts/zynqmp-e-a2197-00-revA.dts
View File

@ -2,7 +2,7 @@
/*
* dts file for Xilinx Versal a2197 RevA System Controller
*
* (C) Copyright 2019, Xilinx, Inc.
* (C) Copyright 2019 - 2020, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@ -421,14 +421,14 @@
temperature-stability = <50>;
factory-fout = <156250000>;
clock-frequency = <156250000>;
clock-output-names = "si570_hsdp_clk";
clock-output-names = "si570_zsfp_clk";
};
};
i2c@6 { /* USER_SI570_1 */
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
si570_user1_clk: clock-generator@5d { /* u205 */
si570_user1: clock-generator@5d { /* u205 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5f>;
@ -510,7 +510,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
si570_ddr_dimm2: clock-generator@60 { /* u3 */
si570_lpddr4clk2: clock-generator@60 { /* u3 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x60>;
@ -524,7 +524,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
si570_lpddr4: clock-generator@60 { /* u4 */
si570_lpddr4clk1: clock-generator@60 { /* u4 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x60>;

2
arch/arm/dts/zynqmp-mini-qspi.dts
View File

@ -70,7 +70,7 @@
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10000000>;
spi-max-frequency = <108000000>;
};
};

117
arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts Normal file
View File

@ -0,0 +1,117 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Topic XDP (Xilinx Drone Platform)
*
* (C) Copyright 2016, Topic Embedded Products BV
* Mike Looijmans <mike.looijmans@topic.nl>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/ {
model = "Topic Miamimp ZynqMP XDP v1r1";
compatible = "topic,miamimp-xdp-v1r1", "topic,miamimp-xdp",
"topic,miamimp", "xlnx,zynqmp";
aliases {
gpio0 = &gpio;
i2c0 = &i2c0;
i2c1 = &i2c1;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
rtc0 = &rtc;
serial0 = &uart1;
serial1 = &uart0;
serial2 = &dcc;
spi0 = &qspi;
usb0 = &usb0;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
};
};
&dcc {
status = "okay";
};
&gpio {
status = "okay";
};
&gpu {
status = "okay";
};
&qspi {
status = "okay";
is-dual = <1>;
flash@0 {
compatible = "st,m25p80", "n25q256a";
m25p,fast-read;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <166000000>;
#address-cells = <1>;
#size-cells = <1>;
is-dual = <1>;
partition@0 {
label = "qspi-boot-bin";
reg = <0x00000 0x60000>;
};
partition@60000 {
label = "qspi-u-boot-itb";
reg = <0x60000 0x100000>;
};
partition@160000 {
label = "qspi-u-boot-env";
reg = <0x160000 0x20000>;
};
partition@200000 {
label = "qspi-rootfs";
reg = <0x200000 0x1e00000>;
};
};
};
&rtc {
status = "okay";
};
/* eMMC device */
&sdhci0 {
status = "okay";
non-removable;
disable-wp; /* We don't have a write-protect detection */
bus-width = <8>;
xlnx,mio_bank = <0>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
xlnx,mio_bank = <1>;
disable-wp; /* We don't have a write-protect detection */
bus-width = <4>;
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};

4
arch/arm/include/asm/arch-mx7/mx7-ddr.h
View File

@ -39,7 +39,9 @@ struct ddrc {
u32 dramtmg8; /* 0x0120 */
u32 reserved7[0x17];
u32 zqctl0; /* 0x0180 */
u32 reserved8[0x03];
u32 zqctl1; /* 0x0184 */
u32 zqctl2; /* 0x0188 */
u32 zqstat; /* 0x018c */
u32 dfitmg0; /* 0x0190 */
u32 dfitmg1; /* 0x0194 */
u32 reserved9[0x02];

7
arch/arm/mach-imx/mx7/Kconfig
View File

@ -16,6 +16,13 @@ config MX7D
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
config SYS_TEXT_BASE
default 0x87800000
config SPL_TEXT_BASE
depends on SPL
default 0x00912000
choice
prompt "MX7 board select"
optional

1
arch/arm/mach-imx/mx7/ddr.c
View File

@ -74,6 +74,7 @@ void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val,
writel(ddrc_regs_val->dramtmg5, &ddrc_regs->dramtmg5);
writel(ddrc_regs_val->dramtmg8, &ddrc_regs->dramtmg8);
writel(ddrc_regs_val->zqctl0, &ddrc_regs->zqctl0);
writel(ddrc_regs_val->zqctl1, &ddrc_regs->zqctl1);
writel(ddrc_regs_val->dfitmg0, &ddrc_regs->dfitmg0);
writel(ddrc_regs_val->dfitmg1, &ddrc_regs->dfitmg1);
writel(ddrc_regs_val->dfiupd0, &ddrc_regs->dfiupd0);

11
board/advantech/imx8qm_rom7720_a1/README
View File

@ -29,6 +29,17 @@ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
$ chmod +x firmware-imx-8.0.bin
$ ./firmware-imx-8.0.bin
Or use this to avoid running random scripts from the internet,
but note that you must agree to the license the script displays:
$ dd if=imx-sc-firmware-1.1.bin of=imx-sc-firmware-1.1.tar.bz2 bs=37185 skip=1
$ tar -xf imx-sc-firmware-1.1.tar.bz2
$ cp imx-sc-firmware-1.1/mx8qm-val-scfw-tcm.bin $(builddir)
$ dd if=firmware-imx-8.0.bin of=firmware-imx-8.0.tar.bz2 bs=37180 skip=1
$ tar -xf firmware-imx-8.0.tar.bz2
$ cp firmware-imx-8.0/firmware/seco/mx8qm-ahab-container.img $(builddir)
Build U-Boot
============

3
board/amlogic/p200/MAINTAINERS
View File

@ -7,3 +7,6 @@ F: board/amlogic/p200/
F: configs/nanopi-k2_defconfig
F: configs/odroid-c2_defconfig
F: configs/p200_defconfig
F: doc/board/amlogic/p200.rst
F: doc/board/amlogic/nanopi-k2.rst
F: doc/board/amlogic/odroid-c2.rst

98
board/amlogic/p200/README.nanopi-k2
View File

@ -1,98 +0,0 @@
U-Boot for NanoPi-K2
====================
NanoPi-K2 is a single board computer manufactured by FriendlyElec
with the following specifications:
- Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- Gigabit Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 2.0 Host, 1 x USB OTG
- eMMC, microSD
- Infrared receiver
Schematics are available on the manufacturer website.
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make nanopi-k2_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
> git clone https://github.com/friendlyarm/u-boot.git -b nanopi-k2-v2015.01 amlogic-u-boot
> cd amlogic-u-boot
> sed -i 's/aarch64-linux-gnu-/aarch64-none-elf-/' Makefile
> sed -i 's/arm-linux-/arm-none-eabi-/' arch/arm/cpu/armv8/gxb/firmware/scp_task/Makefile
> make nanopi-k2_defconfig
> make
> export FIPDIR=$PWD/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $FIPDIR/gxb/bl2.bin fip/
> cp $FIPDIR/gxb/acs.bin fip/
> cp $FIPDIR/gxb/bl21.bin fip/
> cp $FIPDIR/gxb/bl30.bin fip/
> cp $FIPDIR/gxb/bl301.bin fip/
> cp $FIPDIR/gxb/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> $FIPDIR/fip_create \
--bl30 fip/bl30_new.bin \
--bl31 fip/bl31.img \
--bl33 fip/bl33.bin \
fip/fip.bin
> python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
> $FIPDIR/gxb/aml_encrypt_gxb --bootsig \
--input fip/boot_new.bin
--output fip/u-boot.bin
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin of=$DEV conv=fsync,notrunc bs=512 seek=1

102
board/amlogic/p200/README.p200
View File

@ -1,102 +0,0 @@
U-Boot for Amlogic P200
=======================
P200 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- Gigabit Ethernet
- HDMI 2.0 4K/60Hz display
- 2 x USB 2.0 Host
- eMMC, microSD
- Infrared receiver
- SDIO WiFi Module
- CVBS+Stereo Audio Jack
Schematics are available from Amlogic on demand.
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make p200_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
> cd amlogic-u-boot
> make gxb_p200_v1_defconfig
> make
> export FIPDIR=$PWD/fip
Go back to mainline U-boot source tree then :
> mkdir fip
> cp $FIPDIR/gxl/bl2.bin fip/
> cp $FIPDIR/gxl/acs.bin fip/
> cp $FIPDIR/gxl/bl21.bin fip/
> cp $FIPDIR/gxl/bl30.bin fip/
> cp $FIPDIR/gxl/bl301.bin fip/
> cp $FIPDIR/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

1
board/amlogic/p201/MAINTAINERS
View File

@ -4,3 +4,4 @@ S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/p201/
F: configs/p201_defconfig
F: doc/board/amlogic/p201.rst

102
board/amlogic/p201/README.p201
View File

@ -1,102 +0,0 @@
U-Boot for Amlogic P201
=======================
P201 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 2 x USB 2.0 Host
- eMMC, microSD
- Infrared receiver
- SDIO WiFi Module
- CVBS+Stereo Audio Jack
Schematics are available from Amlogic on demand.
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make p201_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
> cd amlogic-u-boot
> make gxb_p201_v1_defconfig
> make
> export FIPDIR=$PWD/fip
Go back to mainline U-boot source tree then :
> mkdir fip
> cp $FIPDIR/gxl/bl2.bin fip/
> cp $FIPDIR/gxl/acs.bin fip/
> cp $FIPDIR/gxl/bl21.bin fip/
> cp $FIPDIR/gxl/bl30.bin fip/
> cp $FIPDIR/gxl/bl301.bin fip/
> cp $FIPDIR/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

4
board/amlogic/p212/MAINTAINERS
View File

@ -8,3 +8,7 @@ F: configs/khadas-vim_defconfig
F: configs/libretech-ac_defconfig
F: configs/libretech-cc_defconfig
F: configs/p212_defconfig
F: doc/board/amlogic/p212.rst
F: doc/board/amlogic/libretech-ac.rst
F: doc/board/amlogic/libretech-cc.rst
F: doc/board/amlogic/khadas-vim.rst

101
board/amlogic/p212/README.khadas-vim
View File

@ -1,101 +0,0 @@
U-Boot for Khadas VIM
=======================
Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Wesion
Technology Co., Ltd with the following specifications:
- Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
- 8GB/16GBeMMC
- microSD
- SDIO Wifi Module, Bluetooth
- Two channels IR receiver
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
U-Boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make khadas-vim_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/khadas/u-boot -b Vim vim-u-boot
> cd vim-u-boot
> make kvim_defconfig
> make CROSS_COMPILE=aarch64-none-elf-
> export FIPDIR=$PWD/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $FIPDIR/gxl/bl2.bin fip/
> cp $FIPDIR/gxl/acs.bin fip/
> cp $FIPDIR/gxl/bl21.bin fip/
> cp $FIPDIR/gxl/bl30.bin fip/
> cp $FIPDIR/gxl/bl301.bin fip/
> cp $FIPDIR/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

102
board/amlogic/p212/README.libretech-ac
View File

@ -1,102 +0,0 @@
U-Boot for LibreTech AC
=======================
LibreTech AC is a single board computer manufactured by Libre Technology
with the following specifications:
- Amlogic S805X ARM Cortex-A53 quad-core SoC @ 1.2GHz
- ARM Mali 450 GPU
- 512MiB DDR4 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 2.0 Host
- eMMC, SPI NOR Flash
- Infrared receiver
Schematics are available on the manufacturer website.
Currently the U-Boot port supports the following devices:
- serial
- eMMC
- Ethernet
- USB
U-Boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make libretech-ac_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b libretech-ac amlogic-u-boot
> cd amlogic-u-boot
> wget https://raw.githubusercontent.com/BayLibre/u-boot/libretech-cc/fip/blx_fix.sh
> make libretech_ac_defconfig
> make
> export UBOOTDIR=$PWD
Download the latest Amlogic Buildroot package, and extract it :
> wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180418.tar.gz
> tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180418.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180418/bootloader
> export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180418
Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/amlogic/libretech_ac/firmware/bl21.bin fip/
> cp $UBOOTDIR/build/board/amlogic/libretech_ac/firmware/acs.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl2/bin/gxl/bl2.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl30/bin/gxl/bl30.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl31/bin/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> sh $UBOOTDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> $BRDIR/bootloader/uboot-repo/fip/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> sh $UBOOTDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

134
board/amlogic/p212/README.libretech-cc
View File

@ -1,134 +0,0 @@
U-Boot for LibreTech CC
=======================
LibreTech CC is a single board computer manufactured by Libre Technology
with the following specifications:
- Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 2.0 Host
- eMMC, microSD
- Infrared receiver
Schematics are available on the manufacturer website.
Currently the U-Boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
U-Boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make libretech-cc_defconfig
> make
Image creation
==============
To boot the system, u-boot must be combined with several earlier stage
bootloaders:
* bl2.bin: vendor-provided binary blob
* bl21.bin: built from vendor u-boot source
* bl30.bin: vendor-provided binary blob
* bl301.bin: built from vendor u-boot source
* bl31.bin: vendor-provided binary blob
* acs.bin: built from vendor u-boot source
These binaries and the tools required below have been collected and prebuilt
for convenience at <https://github.com/BayLibre/u-boot/releases/>
Download and extract the libretech-cc release from there, and set FIPDIR to
point to the `fip` subdirectory.
> export FIPDIR=/path/to/extracted/fip
Alternatively, you can obtain the original vendor u-boot tree which
contains the required blobs and sources, and build yourself.
Note that old compilers are required for this to build. The compilers here
are suggested by Amlogic, and they are 32-bit x86 binaries.
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
> cd amlogic-u-boot
> make libretech_cc_defconfig
> make
> export FIPDIR=$PWD/fip
Once you have the binaries available (either through the prebuilt download,
or having built the vendor u-boot yourself), you can then proceed to glue
everything together. Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $FIPDIR/gxl/bl2.bin fip/
> cp $FIPDIR/gxl/acs.bin fip/
> cp $FIPDIR/gxl/bl21.bin fip/
> cp $FIPDIR/gxl/bl30.bin fip/
> cp $FIPDIR/gxl/bl301.bin fip/
> cp $FIPDIR/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
Note that Amlogic provides aml_encrypt_gxl as a 32-bit x86 binary with no
source code. Should you prefer to avoid that, there are open source reverse
engineered versions available:
1. gxlimg <https://github.com/repk/gxlimg>, which comes with a handy
Makefile that automates the whole process.
2. meson-tools <https://github.com/afaerber/meson-tools>
However, these community-developed alternatives are not endorsed by or
supported by Amlogic.

102
board/amlogic/p212/README.p212
View File

@ -1,102 +0,0 @@
U-Boot for Amlogic P212
=======================
P212 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 2 x USB 2.0 Host
- eMMC, microSD
- Infrared receiver
- SDIO WiFi Module
- CVBS+Stereo Audio Jack
Schematics are available from Amlogic on demand.
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make p212_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
> cd amlogic-u-boot
> make gxl_p212_v1_defconfig
> make
> export FIPDIR=$PWD/fip
Go back to mainline U-boot source tree then :
> mkdir fip
> cp $FIPDIR/gxl/bl2.bin fip/
> cp $FIPDIR/gxl/acs.bin fip/
> cp $FIPDIR/gxl/bl21.bin fip/
> cp $FIPDIR/gxl/bl30.bin fip/
> cp $FIPDIR/gxl/bl301.bin fip/
> cp $FIPDIR/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

1
board/amlogic/q200/MAINTAINERS
View File

@ -7,3 +7,4 @@ F: include/configs/q200.h
F: configs/khadas-vim2_defconfig
F: configs/libretech-s905d-pc_defconfig
F: configs/libretech-s912-pc_defconfig
F: doc/board/amlogic/khadas-vim2.rst

102
board/amlogic/q200/README.khadas-vim2
View File

@ -1,102 +0,0 @@
U-Boot for Khadas VIM2
=======================
Khadas VIM2 is an Open Source DIY Box manufactured by Shenzhen Wesion
Technology Co., Ltd with the following specifications:
- Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz
- ARM Mali T860 GPU
- 2/3GB DDR4 SDRAM
- 10/100/1000 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
- 16GB/32GB/64GB eMMC
- 2MB SPI Flash
- microSD
- SDIO Wifi Module, Bluetooth
- Two channels IR receiver
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
U-Boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make khadas-vim2_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/khadas/u-boot -b khadas-vim-v2015.01 vim-u-boot
> cd vim-u-boot
> make kvim2_defconfig
> make
> export FIPDIR=$PWD/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $FIPDIR/gxl/bl2.bin fip/
> cp $FIPDIR/gxl/acs.bin fip/
> cp $FIPDIR/gxl/bl21.bin fip/
> cp $FIPDIR/gxl/bl30.bin fip/
> cp $FIPDIR/gxl/bl301.bin fip/
> cp $FIPDIR/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

101
board/amlogic/q200/README.q200
View File

@ -1,101 +0,0 @@
U-Boot for Amlogic Q200
=======================
Q200 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz
- ARM Mali T860 GPU
- 2/3GB DDR4 SDRAM
- 10/100/1000 Ethernet
- HDMI 2.0 4K/60Hz display
- 2 x USB 2.0 Host, 1 x USB 2.0 Device
- 16GB/32GB/64GB eMMC
- 2MB SPI Flash
- microSD
- SDIO Wifi Module, Bluetooth
- IR receiver
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
U-Boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make khadas-vim2_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
> cd amlogic-u-boot
> make gxm_q200_v1_defconfig
> make
> export FIPDIR=$PWD/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $FIPDIR/gxl/bl2.bin fip/
> cp $FIPDIR/gxl/acs.bin fip/
> cp $FIPDIR/gxl/bl21.bin fip/
> cp $FIPDIR/gxl/bl30.bin fip/
> cp $FIPDIR/gxl/bl301.bin fip/
> cp $FIPDIR/gxl/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
> $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
> $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
> $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

1
board/amlogic/s400/MAINTAINERS
View File

@ -5,3 +5,4 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/s400/
F: include/configs/s400.h
F: configs/s400_defconfig
F: doc/board/amlogic/s400.rst

109
board/amlogic/s400/README
View File

@ -1,109 +0,0 @@
U-Boot for Amlogic S400
=======================
S400 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz
- 1GB DDR4 SDRAM
- 10/100 Ethernet
- 2 x USB 2.0 Host
- eMMC
- Infrared receiver
- SDIO WiFi Module
- MIPI DSI Connector
- Audio HAT Connector
- PCI-E M.2 Connectors
Schematics are available from Amlogic on demand.
Currently the u-boot port supports the following devices:
- serial
- eMMC
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- USB Host
- ADC
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make s400_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
> cd amlogic-u-boot
> make axg_s400_v1_defconfig
> make
> export FIPDIR=$PWD/fip
Go back to mainline U-boot source tree then :
> mkdir fip
> cp $FIPDIR/axg/bl2.bin fip/
> cp $FIPDIR/axg/acs.bin fip/
> cp $FIPDIR/axg/bl21.bin fip/
> cp $FIPDIR/axg/bl30.bin fip/
> cp $FIPDIR/axg/bl301.bin fip/
> cp $FIPDIR/axg/bl31.img fip/
> cp u-boot.bin fip/bl33.bin
> $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
> $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33
> $FIPDIR/axg/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $FIPDIR/axg/aml_encrypt_axg --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc --level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

1
board/amlogic/sei510/MAINTAINERS
View File

@ -5,3 +5,4 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/sei510/
F: configs/sei510_defconfig
F: include/configs/sei510.h
F: doc/board/amlogic/sei510.rst

122
board/amlogic/sei510/README
View File

@ -1,122 +0,0 @@
U-Boot for Amlogic SEI510
=======================
SEI510 is a customer board manufactured by SEI Robotics with the following
specifications:
- Amlogic S905X2 ARM Cortex-A53 quad-core SoC
- 2GB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
Currently the u-boot port supports the following devices:
- serial
- Ethernet
- Regulators
- Clock controller
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make sei510_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot
> cd amlogic-u-boot
> make g12a_u200_v1_defconfig
> make
> export UBOOTDIR=$PWD
Download the latest Amlogic Buildroot package, and extract it :
> wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz
> tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader
> export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706
> export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/
> cp $FIPDIR/g12a/ddr3_1d.fw fip/
> cp $FIPDIR/g12a/ddr4_1d.fw fip/
> cp $FIPDIR/g12a/ddr4_2d.fw fip/
> cp $FIPDIR/g12a/diag_lpddr4.fw fip/
> cp $FIPDIR/g12a/lpddr4_1d.fw fip/
> cp $FIPDIR/g12a/lpddr4_2d.fw fip/
> cp $FIPDIR/g12a/piei.fw fip/
> cp u-boot.bin fip/bl33.bin
> sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33
> $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $FIPDIR/g12a/aml_encrypt_g12a --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

1
board/amlogic/sei610/MAINTAINERS
View File

@ -5,3 +5,4 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/sei610/
F: configs/sei610_defconfig
F: include/configs/sei610.h
F: doc/board/amlogic/sei610.rst

118
board/amlogic/sei610/README
View File

@ -1,118 +0,0 @@
U-Boot for Amlogic SEI610
=========================
SEI610 is a customer board manufactured by SEI Robotics with the following
specifications:
- Amlogic S905X3 ARM Cortex-A55 quad-core SoC
- 2GB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- 1 x USB Type-C DRD
- 1 x FTDI USB Serial Debug Interface
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make sei610_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-4.9-g12a-201904 amlogic-u-boot
> cd amlogic-u-boot
> make sm1_ac200_v1_defconfig
> make
> export UBOOTDIR=$PWD
Download the latest Amlogic Buildroot package, and extract it :
> wget http://openlinux2.amlogic.com:8000/ARM/filesystem/buildroot-openlinux-A113-201901.tgz
> tar xfz buildroot-openlinux-A113-201901.tgz buildroot-openlinux-A113-201901/bootloader
> export BRDIR=$PWD/buildroot-openlinux-A113-201901
> export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/
> cp $FIPDIR/g12a/ddr3_1d.fw fip/
> cp $FIPDIR/g12a/ddr4_1d.fw fip/
> cp $FIPDIR/g12a/ddr4_2d.fw fip/
> cp $FIPDIR/g12a/diag_lpddr4.fw fip/
> cp $FIPDIR/g12a/lpddr4_1d.fw fip/
> cp $FIPDIR/g12a/lpddr4_2d.fw fip/
> cp $FIPDIR/g12a/piei.fw fip/
> cp u-boot.bin fip/bl33.bin
> sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33
> $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $FIPDIR/g12a/aml_encrypt_g12a --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

1
board/amlogic/u200/MAINTAINERS
View File

@ -4,3 +4,4 @@ S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/u200/
F: configs/u200_defconfig
F: doc/board/amlogic/u200.rst

127
board/amlogic/u200/README
View File

@ -1,127 +0,0 @@
U-Boot for Amlogic U200
=======================
U200 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic S905D2 ARM Cortex-A53 quad-core SoC
- 2GB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
- MIPI DSI Connector
- Audio HAT Connector
- PCI-E M.2 Connector
Schematics are available from Amlogic on demand.
Currently the u-boot port supports the following devices:
- serial
- Ethernet
- Regulators
- Clock controller
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make u200_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot
> cd amlogic-u-boot
> make g12a_u200_v1_defconfig
> make
> export UBOOTDIR=$PWD
Download the latest Amlogic Buildroot package, and extract it :
> wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz
> tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader
> export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706
> export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/
> cp $FIPDIR/g12a/ddr3_1d.fw fip/
> cp $FIPDIR/g12a/ddr4_1d.fw fip/
> cp $FIPDIR/g12a/ddr4_2d.fw fip/
> cp $FIPDIR/g12a/diag_lpddr4.fw fip/
> cp $FIPDIR/g12a/lpddr4_1d.fw fip/
> cp $FIPDIR/g12a/lpddr4_2d.fw fip/
> cp $FIPDIR/g12a/piei.fw fip/
> cp u-boot.bin fip/bl33.bin
> sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33
> $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $FIPDIR/g12a/aml_encrypt_g12a --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

4
board/amlogic/w400/MAINTAINERS
View File

@ -6,3 +6,7 @@ F: board/amlogic/w400/
F: configs/khadas-vim3_defconfig
F: configs/khadas-vim3l_defconfig
F: configs/odroid-n2_defconfig
F: doc/board/amlogic/w400.rst
F: doc/board/amlogic/khadas-vim3.rst
F: doc/board/amlogic/khadas-vim3l.rst
F: doc/board/amlogic/odroid-n2.rst

131
board/amlogic/w400/README.khadas-vim3
View File

@ -1,131 +0,0 @@
U-Boot for Khadas VIM3
======================
Khadas VIM3 is a single board computer manufactured by Shenzhen Wesion
Technology Co., Ltd. with the following specifications:
- Amlogic A311D Arm Cortex-A53 dual-core + Cortex-A73 quad-core SoC
- 4GB LPDDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 display
- 40-pin GPIO header
- 1 x USB 3.0 Host, 1 x USB 2.0 Host
- eMMC, microSD
- M.2
- Infrared receiver
Schematics are available on the manufacturer website.
Currently the U-Boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- ADC
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make khadas-vim3_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> DIR=vim3-u-boot
> git clone --depth 1 \
https://github.com/khadas/u-boot.git -b khadas-vims-v2015.01 \
$DIR
> cd vim3-u-boot
> make kvim3_defconfig
> make
> export UBOOTDIR=$PWD
Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/khadas/kvim3/firmware/acs.bin fip/
> cp $UBOOTDIR/fip/g12b/bl2.bin fip/
> cp $UBOOTDIR/fip/g12b/bl30.bin fip/
> cp $UBOOTDIR/fip/g12b/bl31.img fip/
> cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
> cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
> cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
> cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
> cp $UBOOTDIR/fip/g12b/lpddr3_1d.fw fip/
> cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
> cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
> cp $UBOOTDIR/fip/g12b/piei.fw fip/
> cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
> cp u-boot.bin fip/bl33.bin
> sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33 --compress lz4
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--ddrfw9 fip/lpddr3_1d.fw \
--level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

131
board/amlogic/w400/README.khadas-vim3l
View File

@ -1,131 +0,0 @@
U-Boot for Khadas VIM3L
=======================
Khadas VIM3L is a single board computer manufactured by Shenzhen Wesion
Technology Co., Ltd. with the following specifications:
- Amlogic S905D3 Arm Cortex-A55 quad-core SoC
- 2GB LPDDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 display
- 40-pin GPIO header
- 1 x USB 3.0 Host, 1 x USB 2.0 Host
- eMMC, microSD
- M.2
- Infrared receiver
Schematics are available on the manufacturer website.
Currently the U-Boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- ADC
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make khadas-vim3l_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> DIR=vim3l-u-boot
> git clone --depth 1 \
https://github.com/khadas/u-boot.git -b khadas-vims-v2015.01 \
$DIR
> cd vim3l-u-boot
> make kvim3l_defconfig
> make
> export UBOOTDIR=$PWD
Go back to mainline U-Boot source tree then :
> mkdir fip
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/khadas/kvim3l/firmware/acs.bin fip/
> cp $UBOOTDIR/fip/g12a/bl2.bin fip/
> cp $UBOOTDIR/fip/g12a/bl30.bin fip/
> cp $UBOOTDIR/fip/g12a/bl31.img fip/
> cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
> cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
> cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
> cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
> cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
> cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
> cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
> cp $UBOOTDIR/fip/g12a/piei.fw fip/
> cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
> cp u-boot.bin fip/bl33.bin
> sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
> $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33 --compress lz4
> $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--ddrfw9 fip/lpddr3_1d.fw \
--level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

129
board/amlogic/w400/README.odroid-n2
View File

@ -1,129 +0,0 @@
U-Boot for ODROID-N2
====================
ODROID-N2 is a single board computer manufactured by Hardkernel
Co. Ltd with the following specifications:
- Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
- 4GB DDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 3.0 Host, 1 x USB OTG
- eMMC, microSD
- Infrared receiver
Schematics are available on the manufacturer website.
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- ADC
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make odroid-n2_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> DIR=odroid-n2
> git clone --depth 1 \
https://github.com/hardkernel/u-boot.git -b odroidn2-v2015.01 \
$DIR
> cd odroid-n2
> make odroidn2_defconfig
> make
> export UBOOTDIR=$PWD
Go back to mainline U-Boot source tree then :
> mkdir fip
> wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/hardkernel/odroidn2/firmware/acs.bin fip/
> cp $UBOOTDIR/fip/g12b/bl2.bin fip/
> cp $UBOOTDIR/fip/g12b/bl30.bin fip/
> cp $UBOOTDIR/fip/g12b/bl31.img fip/
> cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
> cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
> cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
> cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
> cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
> cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
> cp $UBOOTDIR/fip/g12b/piei.fw fip/
> cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
> cp u-boot.bin fip/bl33.bin
> sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33 --compress lz4
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

129
board/amlogic/w400/README.w400
View File

@ -1,129 +0,0 @@
U-Boot for Amlogic W400
=======================
U200 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
- 2GB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
- MIPI DSI Connector
- Audio HAT Connector
- PCI-E M.2 Connector
Schematics are available from Amlogic on demand.
Currently the u-boot port supports the following devices:
- serial
- Ethernet
- Regulators
- Clock controller
u-boot compilation
==================
> export CROSS_COMPILE=aarch64-none-elf-
> make w400_defconfig
> make
Image creation
==============
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
> tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
> export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
> git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot
> cd amlogic-u-boot
> make g12b_w400_v1_defconfig
> make
> export UBOOTDIR=$PWD
Download the latest Amlogic Buildroot package, and extract it :
> wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz
> tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader
> export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706
> export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
Go back to mainline U-Boot source tree then :
> mkdir fip
> wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
> cp $UBOOTDIR/build/scp_task/bl301.bin fip/
> cp $UBOOTDIR/build/board/amlogic/g12b_w400_v1/firmware/acs.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12b/bl2.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12b/bl30.bin fip/
> cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12b/bl31.img fip/
> cp $FIPDIR/g12b/ddr3_1d.fw fip/
> cp $FIPDIR/g12b/ddr4_1d.fw fip/
> cp $FIPDIR/g12b/ddr4_2d.fw fip/
> cp $FIPDIR/g12b/diag_lpddr4.fw fip/
> cp $FIPDIR/g12b/lpddr4_1d.fw fip/
> cp $FIPDIR/g12b/lpddr4_2d.fw fip/
> cp $FIPDIR/g12b/piei.fw fip/
> cp $FIPDIR/g12b/aml_ddr.fw fip/
> cp u-boot.bin fip/bl33.bin
> sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
> sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
> $FIPDIR/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
> $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
> $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
> $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33
> $FIPDIR/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
> $FIPDIR/g12b/aml_encrypt_g12b --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--level v3
and then write the image to SD with:
> DEV=/dev/your_sd_device
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
> dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

72
board/boundary/nitrogen6x/nitrogen6x.c
View File

@ -25,7 +25,6 @@
#include <asm/mach-imx/spi.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/video.h>
#include <mmc.h>
#include <fsl_esdhc_imx.h>
#include <micrel.h>
#include <miiphy.h>
@ -161,26 +160,6 @@ static iomux_v3_cfg_t const usdhc2_pads[] = {
IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL),
};
static iomux_v3_cfg_t const usdhc3_pads[] = {
IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, NO_PAD_CTRL), /* CD */
};
static iomux_v3_cfg_t const usdhc4_pads[] = {
IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, NO_PAD_CTRL), /* CD */
};
static iomux_v3_cfg_t const enet_pads1[] = {
IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL),
IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL),
@ -305,57 +284,6 @@ int board_ehci_power(int port, int on)
#endif
#ifdef CONFIG_FSL_ESDHC_IMX
static struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC3_BASE_ADDR},
{USDHC4_BASE_ADDR},
};
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) :
IMX_GPIO_NR(2, 6);
gpio_direction_input(gp_cd);
return !gpio_get_value(gp_cd);
}
int board_mmc_init(bd_t *bis)
{
int ret;
u32 index = 0;
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
usdhc_cfg[0].max_bus_width = 4;
usdhc_cfg[1].max_bus_width = 4;
for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
switch (index) {
case 0:
SETUP_IOMUX_PADS(usdhc3_pads);
break;
case 1:
SETUP_IOMUX_PADS(usdhc4_pads);
break;
default:
printf("Warning: you configured more USDHC controllers"
"(%d) then supported by the board (%d)\n",
index + 1, CONFIG_SYS_FSL_USDHC_NUM);
return -EINVAL;
}
ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
if (ret)
return ret;
}
return 0;
}
#endif
#ifdef CONFIG_MXC_SPI
int board_spi_cs_gpio(unsigned bus, unsigned cs)
{

4
board/dhelectronics/dh_imx6/dh_imx6.c
View File

@ -142,8 +142,6 @@ int board_init(void)
/* Enable eim_slow clocks */
setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
setup_dhcom_mac_from_fuse();
setup_fec_clock();
return 0;
@ -189,6 +187,8 @@ int board_late_init(void)
u32 hw_code;
char buf[16];
setup_dhcom_mac_from_fuse();
hw_code = board_get_hwcode();
switch (get_cpu_type()) {

247
board/solidrun/mx6cuboxi/mx6cuboxi.c
View File

@ -17,7 +17,6 @@
#include <image.h>
#include <init.h>
#include <log.h>
#include <net.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
@ -33,8 +32,6 @@
#include <mmc.h>
#include <fsl_esdhc_imx.h>
#include <malloc.h>
#include <miiphy.h>
#include <netdev.h>
#include <asm/arch/crm_regs.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
@ -52,16 +49,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define ETH_PHY_RESET IMX_GPIO_NR(4, 15)
#define USB_H1_VBUS IMX_GPIO_NR(1, 0)
enum board_type {
@ -167,180 +154,11 @@ static void setup_iomux_uart(void)
SETUP_IOMUX_PADS(uart1_pads);
}
static struct fsl_esdhc_cfg usdhc_cfg = {
.esdhc_base = USDHC2_BASE_ADDR,
.max_bus_width = 4,
};
static struct fsl_esdhc_cfg emmc_cfg = {
.esdhc_base = USDHC3_BASE_ADDR,
.max_bus_width = 8,
};
int board_mmc_get_env_dev(int devno)
{
return devno;
}
#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = mmc->priv;
int ret = 0;
switch (cfg->esdhc_base) {
case USDHC2_BASE_ADDR:
ret = !gpio_get_value(USDHC2_CD_GPIO);
break;
case USDHC3_BASE_ADDR:
ret = (mmc_get_op_cond(mmc) < 0) ? 0 : 1; /* eMMC/uSDHC3 has no CD GPIO */
break;
}
return ret;
}
static int mmc_init_spl(bd_t *bis)
{
struct src *psrc = (struct src *)SRC_BASE_ADDR;
unsigned reg = readl(&psrc->sbmr1) >> 11;
/*
* Upon reading BOOT_CFG register the following map is done:
* Bit 11 and 12 of BOOT_CFG register can determine the current
* mmc port
* 0x1 SD2
* 0x2 SD3
*/
switch (reg & 0x3) {
case 0x1:
SETUP_IOMUX_PADS(usdhc2_pads);
usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
gd->arch.sdhc_clk = usdhc_cfg.sdhc_clk;
return fsl_esdhc_initialize(bis, &usdhc_cfg);
case 0x2:
SETUP_IOMUX_PADS(usdhc3_pads);
emmc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
gd->arch.sdhc_clk = emmc_cfg.sdhc_clk;
return fsl_esdhc_initialize(bis, &emmc_cfg);
}
return -ENODEV;
}
int board_mmc_init(bd_t *bis)
{
if (IS_ENABLED(CONFIG_SPL_BUILD))
return mmc_init_spl(bis);
return 0;
}
static iomux_v3_cfg_t const enet_pads[] = {
IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
/* AR8035 reset */
IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
/* AR8035 interrupt */
IOMUX_PADS(PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),
/* GPIO16 -> AR8035 25MHz */
IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK)),
IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_ENET_RXD1__GPIO1_IO26 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
};
static void setup_iomux_enet(void)
{
struct gpio_desc desc;
int ret;
SETUP_IOMUX_PADS(enet_pads);
ret = dm_gpio_lookup_name("GPIO4_15", &desc);
if (ret) {
printf("%s: phy reset lookup failed\n", __func__);
return;
}
ret = dm_gpio_request(&desc, "phy-reset");
if (ret) {
printf("%s: phy reset request failed\n", __func__);
return;
}
gpio_direction_output(ETH_PHY_RESET, 0);
mdelay(10);
gpio_set_value(ETH_PHY_RESET, 1);
udelay(100);
gpio_free_list_nodev(&desc, 1);
}
int board_phy_config(struct phy_device *phydev)
{
if (phydev->drv->config)
phydev->drv->config(phydev);
return 0;
}
/* On Cuboxi Ethernet PHY can be located at addresses 0x0 or 0x4 */
#define ETH_PHY_MASK ((1 << 0x0) | (1 << 0x4))
int board_eth_init(bd_t *bis)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
struct mii_dev *bus;
struct phy_device *phydev;
int ret = enable_fec_anatop_clock(0, ENET_25MHZ);
if (ret)
return ret;
/* set gpr1[ENET_CLK_SEL] */
setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
setup_iomux_enet();
bus = fec_get_miibus(IMX_FEC_BASE, -1);
if (!bus)
return -EINVAL;
phydev = phy_find_by_mask(bus, ETH_PHY_MASK, PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
ret = -EINVAL;
goto free_bus;
}
debug("using phy at address %d\n", phydev->addr);
ret = fec_probe(bis, -1, IMX_FEC_BASE, bus, phydev);
if (ret)
goto free_phydev;
return 0;
free_phydev:
free(phydev);
free_bus:
free(bus);
return ret;
}
#ifdef CONFIG_VIDEO_IPUV3
static void do_enable_hdmi(struct display_info_t const *dev)
{
@ -433,6 +251,21 @@ static int setup_display(void)
}
#endif /* CONFIG_VIDEO_IPUV3 */
static int setup_fec(void)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
int ret;
ret = enable_fec_anatop_clock(0, ENET_25MHZ);
if (ret)
return ret;
/* set gpr1[ENET_CLK_SEL] */
setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
return 0;
}
int board_early_init_f(void)
{
setup_iomux_uart();
@ -440,6 +273,8 @@ int board_early_init_f(void)
#ifdef CONFIG_CMD_SATA
setup_sata();
#endif
setup_fec();
return 0;
}
@ -629,6 +464,54 @@ int board_fit_config_name_match(const char *name)
return strcmp(name, tmp_name);
}
void board_boot_order(u32 *spl_boot_list)
{
struct src *psrc = (struct src *)SRC_BASE_ADDR;
unsigned int reg = readl(&psrc->sbmr1) >> 11;
u32 boot_mode = imx6_src_get_boot_mode() & IMX6_BMODE_MASK;
unsigned int bmode = readl(&src_base->sbmr2);
/* If bmode is serial or USB phy is active, return serial */
if (((bmode >> 24) & 0x03) == 0x01 || is_usbotg_phy_active()) {
spl_boot_list[0] = BOOT_DEVICE_BOARD;
return;
}
switch (boot_mode >> IMX6_BMODE_SHIFT) {
case IMX6_BMODE_SD:
case IMX6_BMODE_ESD:
case IMX6_BMODE_MMC:
case IMX6_BMODE_EMMC:
/*
* Upon reading BOOT_CFG register the following map is done:
* Bit 11 and 12 of BOOT_CFG register can determine the current
* mmc port
* 0x1 SD2
* 0x2 SD3
*/
reg &= 0x3; /* Only care about bottom 2 bits */
switch (reg) {
case 1:
SETUP_IOMUX_PADS(usdhc2_pads);
spl_boot_list[0] = BOOT_DEVICE_MMC1;
break;
case 2:
SETUP_IOMUX_PADS(usdhc3_pads);
spl_boot_list[0] = BOOT_DEVICE_MMC2;
break;
}
break;
default:
/* By default use USB downloader */
spl_boot_list[0] = BOOT_DEVICE_BOARD;
break;
}
/* As a last resort, use serial downloader */
spl_boot_list[1] = BOOT_DEVICE_BOARD;
}
#ifdef CONFIG_SPL_BUILD
#include <asm/arch/mx6-ddr.h>
static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {

2
board/topic/zynq/zynq-topic-miami/ps7_init_gpl.c
View File

@ -49,7 +49,7 @@ static unsigned long ps7_clock_init_data_3_0[] = {
EMIT_MASKWRITE(0XF8000158, 0x00003F33U, 0x00000601U),
EMIT_MASKWRITE(0XF8000168, 0x00003F31U, 0x00000601U),
EMIT_MASKWRITE(0XF8000170, 0x03F03F30U, 0x00100C00U),
EMIT_MASKWRITE(0XF8000180, 0x03F03F30U, 0x00100C00U),
EMIT_MASKWRITE(0XF8000180, 0x03F03F30U, 0x00100800U),
EMIT_MASKWRITE(0XF8000190, 0x03F03F30U, 0x00100600U),
EMIT_MASKWRITE(0XF80001A0, 0x03F03F30U, 0x00101800U),
EMIT_MASKWRITE(0XF80001C4, 0x00000001U, 0x00000001U),

2
board/topic/zynq/zynq-topic-miamilite/ps7_init_gpl.c
View File

@ -49,7 +49,7 @@ static unsigned long ps7_clock_init_data_3_0[] = {
EMIT_MASKWRITE(0xF8000158, 0x00003F33U, 0x00000601U),
EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000601U),
EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00100C00U),
EMIT_MASKWRITE(0xF8000180, 0x03F03F30U, 0x00100C00U),
EMIT_MASKWRITE(0xF8000180, 0x03F03F30U, 0x00100800U),
EMIT_MASKWRITE(0xF8000190, 0x03F03F30U, 0x00100600U),
EMIT_MASKWRITE(0xF80001A0, 0x03F03F30U, 0x00101800U),
EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U),

2
board/toradex/colibri_t20/MAINTAINERS
View File

@ -1,5 +1,5 @@
COLIBRI_T20
M: Lucas Stach <dev@lynxeye.de>
M: Igor Opaniuk <igor.opaniuk@toradex.com>
S: Maintained
F: board/toradex/colibri_t20/
F: include/configs/colibri_t20.h

10
board/wandboard/README
View File

@ -37,3 +37,13 @@ as the mx6 processor)
- Connect the serial cable to the host PC
- Power up the board and U-Boot messages will appear in the serial console.
Debug UART
----------
The following settings provide a debug UART for the Wandboard:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_MXC=y
CONFIG_DEBUG_UART_BASE=0x02020000
CONFIG_DEBUG_UART_CLOCK=80000000

54
board/xilinx/zynq/cmds.c
View File

@ -399,7 +399,8 @@ static int zynq_verify_image(u32 src_ptr)
status = zynq_decrypt_load(part_load_addr,
part_img_len,
part_dst_addr,
part_data_len);
part_data_len,
BIT_NONE);
if (status != 0) {
printf("DECRYPTION_FAIL\n");
return -1;
@ -438,22 +439,42 @@ static int zynq_decrypt_image(struct cmd_tbl *cmdtp, int flag, int argc,
char *endp;
u32 srcaddr, srclen, dstaddr, dstlen;
int status;
u8 imgtype = BIT_NONE;
if (argc < 5 && argc > cmdtp->maxargs)
return CMD_RET_USAGE;
srcaddr = simple_strtoul(argv[2], &endp, 16);
if (*argv[2] == 0 || *endp != 0)
return CMD_RET_USAGE;
srclen = simple_strtoul(argv[3], &endp, 16);
if (*argv[3] == 0 || *endp != 0)
return CMD_RET_USAGE;
dstaddr = simple_strtoul(argv[4], &endp, 16);
if (*argv[4] == 0 || *endp != 0)
return CMD_RET_USAGE;
dstlen = simple_strtoul(argv[5], &endp, 16);
if (*argv[5] == 0 || *endp != 0)
return CMD_RET_USAGE;
if (argc == 5) {
if (!strcmp("load", argv[2]))
imgtype = BIT_FULL;
else if (!strcmp("loadp", argv[2]))
imgtype = BIT_PARTIAL;
else
return CMD_RET_USAGE;
srcaddr = simple_strtoul(argv[3], &endp, 16);
if (*argv[3] == 0 || *endp != 0)
return CMD_RET_USAGE;
srclen = simple_strtoul(argv[4], &endp, 16);
if (*argv[4] == 0 || *endp != 0)
return CMD_RET_USAGE;
dstaddr = 0xFFFFFFFF;
dstlen = srclen;
} else {
srcaddr = simple_strtoul(argv[2], &endp, 16);
if (*argv[2] == 0 || *endp != 0)
return CMD_RET_USAGE;
srclen = simple_strtoul(argv[3], &endp, 16);
if (*argv[3] == 0 || *endp != 0)
return CMD_RET_USAGE;
dstaddr = simple_strtoul(argv[4], &endp, 16);
if (*argv[4] == 0 || *endp != 0)
return CMD_RET_USAGE;
dstlen = simple_strtoul(argv[5], &endp, 16);
if (*argv[5] == 0 || *endp != 0)
return CMD_RET_USAGE;
}
/*
* Roundup source and destination lengths to
@ -464,7 +485,8 @@ static int zynq_decrypt_image(struct cmd_tbl *cmdtp, int flag, int argc,
if (dstlen % 4)
dstlen = roundup(dstlen, 4);
status = zynq_decrypt_load(srcaddr, srclen >> 2, dstaddr, dstlen >> 2);
status = zynq_decrypt_load(srcaddr, srclen >> 2, dstaddr,
dstlen >> 2, imgtype);
if (status != 0)
return CMD_RET_FAILURE;
@ -517,6 +539,10 @@ static char zynq_help_text[] =
" - Decrypts the encrypted image present in source\n"
" address and places the decrypted image at\n"
" destination address\n"
"aes load <srcaddr> <srclen>\n"
"aes loadp <srcaddr> <srclen>\n"
" if operation type is load or loadp, it loads the encrypted\n"
" full or partial bitstream on to PL respectively.\n"
#endif
;
#endif

20
board/xilinx/zynqmp/cmds.c
View File

@ -130,8 +130,27 @@ static int do_zynqmp_tcm_init(struct cmd_tbl *cmdtp, int flag, int argc,
}
#endif
static int do_zynqmp_pmufw(struct cmd_tbl *cmdtp, int flag, int argc,
char * const argv[])
{
u32 addr, size;
if (argc != cmdtp->maxargs)
return CMD_RET_USAGE;
addr = simple_strtoul(argv[2], NULL, 16);
size = simple_strtoul(argv[3], NULL, 16);
flush_dcache_range((ulong)addr, (ulong)(addr + size));
zynqmp_pmufw_load_config_object((const void *)(uintptr_t)addr,
(size_t)size);
return 0;
}
static struct cmd_tbl cmd_zynqmp_sub[] = {
U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""),
U_BOOT_CMD_MKENT(pmufw, 4, 0, do_zynqmp_pmufw, "", ""),
U_BOOT_CMD_MKENT(mmio_read, 3, 0, do_zynqmp_mmio_read, "", ""),
U_BOOT_CMD_MKENT(mmio_write, 5, 0, do_zynqmp_mmio_write, "", ""),
#ifdef CONFIG_DEFINE_TCM_OCM_MMAP
@ -184,6 +203,7 @@ static char zynqmp_help_text[] =
" to be initialized. Supported modes will be\n"
" lock(0)/split(1)\n"
#endif
"zynqmp pmufw address size - load PMU FW configuration object\n"
;
#endif

1038
board/xilinx/zynqmp/zynqmp-topic-miamimp-xilinx-xdp-v1r1/psu_init_gpl.c Normal file
View File

File diff suppressed because it is too large Load Diff

8
board/xilinx/zynqmp/zynqmp.c
View File

@ -354,11 +354,14 @@ static int multi_boot(void)
multiboot = readl(&csu_base->multi_boot);
printf("Multiboot:\t%x\n", multiboot);
printf("Multiboot:\t%d\n", multiboot);
return 0;
}
#define PS_SYSMON_ANALOG_BUS_VAL 0x3210
#define PS_SYSMON_ANALOG_BUS_REG 0xFFA50914
int board_init(void)
{
#if defined(CONFIG_ZYNQMP_FIRMWARE)
@ -378,6 +381,9 @@ int board_init(void)
printf("EL Level:\tEL%d\n", current_el());
/* Bug in ROM sets wrong value in this register */
writel(PS_SYSMON_ANALOG_BUS_VAL, PS_SYSMON_ANALOG_BUS_REG);
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
!defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FPGA_SUPPORT) && \
defined(CONFIG_SPL_BUILD))

9
cmd/bootefi.c
View File

@ -189,16 +189,19 @@ static void efi_carve_out_dt_rsv(void *fdt)
if (nodeoffset >= 0) {
subnode = fdt_first_subnode(fdt, nodeoffset);
while (subnode >= 0) {
fdt_addr_t fdt_addr, fdt_size;
/* check if this subnode has a reg property */
addr = fdtdec_get_addr_size(fdt, subnode, "reg",
(fdt_size_t *)&size);
fdt_addr = fdtdec_get_addr_size_auto_parent(
fdt, nodeoffset, subnode,
"reg", 0, &fdt_size, false);
/*
* The /reserved-memory node may have children with
* a size instead of a reg property.
*/
if (addr != FDT_ADDR_T_NONE &&
fdtdec_get_is_enabled(fdt, subnode))
efi_reserve_memory(addr, size);
efi_reserve_memory(fdt_addr, fdt_size);
subnode = fdt_next_subnode(fdt, subnode);
}
}

2
common/board_f.c
View File

@ -537,7 +537,7 @@ static int reserve_fdt(void)
* will be relocated with other data.
*/
if (gd->fdt_blob) {
gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);

2
configs/apalis-imx8qm_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_TARGET_APALIS_IMX8=y
CONFIG_NR_DRAM_BANKS=3
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg"
CONFIG_LOG=y
CONFIG_VERSION_VARIABLE=y
@ -61,4 +62,5 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
# CONFIG_EFI_LOADER is not set

2
configs/apalis-tk1_defconfig
View File

@ -11,7 +11,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run emmcboot; setenv fdtfile ${soc}-${fdt-module}-${fdt_board}.dtb && run distro_bootcmd"
CONFIG_BOOTCOMMAND="setenv fdtfile ${soc}-${fdt_module}-${fdt_board}.dtb && run distro_bootcmd"
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_VERSION_VARIABLE=y

3
configs/apalis_imx6_defconfig
View File

@ -53,6 +53,7 @@ CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
@ -65,6 +66,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_DWC_AHSATA=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y

2
configs/cl-som-imx7_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -17,7 +16,6 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3

3
configs/colibri-imx6ull_defconfig
View File

@ -40,6 +40,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_MTDPARTS=y
@ -54,6 +55,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y

1
configs/colibri-imx8qxp_defconfig
View File

@ -59,4 +59,5 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
# CONFIG_EFI_LOADER is not set

3
configs/colibri_imx6_defconfig
View File

@ -52,6 +52,7 @@ CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
@ -64,6 +65,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y

3
configs/colibri_imx7_defconfig
View File

@ -40,6 +40,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_BOOTP_PXE is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_MTDPARTS=y
@ -54,6 +55,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_FSL_CAAM=y
CONFIG_DFU_NAND=y
CONFIG_DM_I2C=y

3
configs/colibri_imx7_emmc_defconfig
View File

@ -38,6 +38,7 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_HASH is not set
# CONFIG_ISO_PARTITION is not set
@ -48,6 +49,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_FSL_CAAM=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000

3
configs/colibri_vf_defconfig
View File

@ -18,8 +18,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="Colibri VFxx # "
# CONFIG_CMD_BOOTD is not set
@ -39,6 +37,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set

2
configs/imx8mp_evk_defconfig
View File

@ -5,7 +5,6 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
CONFIG_SYS_I2C_MXC_I2C1=y
@ -31,6 +30,7 @@ CONFIG_BOARD_LATE_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y

6
configs/mx6cuboxi_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;"
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
@ -37,6 +38,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-hummingboard2-emmc-som-v15"
CONFIG_OF_LIST="imx6dl-hummingboard2-emmc-som-v15 imx6q-hummingboard2-emmc-som-v15"
CONFIG_MULTI_DTB_FIT=y
@ -45,11 +47,15 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_DWC_AHSATA=y
CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y

3
configs/mx6qsabrelite_defconfig
View File

@ -28,6 +28,7 @@ CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
@ -55,6 +56,8 @@ CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y

3
configs/mx6slevk_spinor_defconfig
View File

@ -44,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y

3
configs/mx6slevk_spl_defconfig
View File

@ -52,6 +52,9 @@ CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y

13
configs/mx6ul_14x14_evk_defconfig
View File

@ -5,7 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x80000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_TARGET_MX6UL_14X14_EVK=y
CONFIG_DM_GPIO=y
CONFIG_SPL_MMC_SUPPORT=y
@ -22,6 +22,9 @@ CONFIG_BOUNCE_BUFFER=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_USB_HOST_SUPPORT=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@ -32,6 +35,8 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
@ -46,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6ul-14x14-evk"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
@ -73,5 +79,10 @@ CONFIG_SOFT_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y

6
configs/mx6ull_14x14_evk_plugin_defconfig
View File

@ -41,6 +41,12 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y

1
configs/p3450-0000_defconfig
View File

@ -37,6 +37,7 @@ CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_RTL8169=y
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y

2
configs/pico-dwarf-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-hobbit-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-nymph-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-pi-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

1
configs/wandboard_defconfig
View File

@ -67,6 +67,7 @@ CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_SCSI=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_DM_USB=y

2
configs/xilinx_versal_virt_defconfig
View File

@ -3,11 +3,11 @@ CONFIG_ARCH_VERSAL=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x100000
CONFIG_DM_GPIO=y
CONFIG_DEFINE_TCM_OCM_MMAP=y
CONFIG_COUNTER_FREQUENCY=62500000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTDELAY=5
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y

1
configs/xilinx_zynq_virt_defconfig
View File

@ -24,6 +24,7 @@ CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
CONFIG_CMD_DFU=y

2
configs/xilinx_zynqmp_virt_defconfig
View File

@ -54,7 +54,7 @@ CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_CMD_UBI=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC"
CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA"
CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA zynqmp-topic-miamimp-xilinx-xdp-v1r1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_NETCONSOLE=y

95
doc/board/amlogic/index.rst Normal file
View File

@ -0,0 +1,95 @@
.. SPDX-License-Identifier: GPL-2.0+
Amlogic
=======
Hardware Support Matrix
-----------------------
An up-do-date matrix is also available on: http://linux-meson.com
This matrix concerns the actual source code version.
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| | S905 | S905X | S912 | A113X | S905X2 | S922X | S905X3 |
| | | S805X | S905D | | S905D2 | A311D | S905D3 |
| | | | | | S905Y2 | | |
+===============================+===========+==============+==============+============+============+=============+==============+
| Boards | Odroid-C2 | P212 | Khadas VIM2 | S400 | U200 | Odroid-N2 | SEI610 |
| | Nanopi-K2 | Khadas-VIM | Libretech-PC | | SEI510 | Khadas-VIM3 | Khadas-VIM3L |
| | P200 | LibreTech-CC | | | | | |
| | P201 | LibreTech-AC | | | | | |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| UART | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Pinctrl/GPIO | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Clock Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| PWM | No | No | No | No | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Reset Control | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Infrared Decoder | No | No | No | No | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Ethernet | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Multi-core | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Fuse access | **Yes** | **Yes** |**Yes** |**Yes** |**Yes** |**Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| SPI (FC) | **Yes** | **Yes** | **Yes** | **Yes** |**Yes** | **Yes** | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| SPI (CC) | No | No | No | No | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| I2C | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| USB | **Yes** | **Yes** | **Yes** | No | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| USB OTG | No | **Yes** | **Yes** | No | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| eMMC | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| SDCard | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| NAND | No | No | No | No | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| ADC | **Yes** | **Yes** | **Yes** | No | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| CVBS Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| HDMI Output | **Yes** | **Yes** | **Yes** | *N/A* | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| CEC | No | No | No | *N/A* | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| Thermal Sensor | No | No | No | No | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| LCD/LVDS Output | No | *N/A* | No | No | No | No | No |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
| SoC (version) information | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** | **Yes** |
+-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
Board Documentation
-------------------
.. toctree::
:maxdepth: 1
khadas-vim2
khadas-vim3l
khadas-vim3
khadas-vim
libretech-ac
libretech-cc
nanopi-k2
odroid-c2
odroid-n2
p200
p201
p212
q200
s400
sei510
sei610
u200
w400

101
doc/board/amlogic/khadas-vim.rst Normal file
View File

@ -0,0 +1,101 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for Khadas VIM
======================
Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Wesion
Technology Co., Ltd with the following specifications:
- Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
- 8GB/16GBeMMC
- microSD
- SDIO Wifi Module, Bluetooth
- Two channels IR receiver
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make khadas-vim_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ git clone https://github.com/khadas/u-boot -b Vim vim-u-boot
$ cd vim-u-boot
$ make kvim_defconfig
$ make CROSS_COMPILE=aarch64-none-elf-
$ export FIPDIR=$PWD/fip
Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $FIPDIR/gxl/bl2.bin fip/
$ cp $FIPDIR/gxl/acs.bin fip/
$ cp $FIPDIR/gxl/bl21.bin fip/
$ cp $FIPDIR/gxl/bl30.bin fip/
$ cp $FIPDIR/gxl/bl301.bin fip/
$ cp $FIPDIR/gxl/bl31.img fip/
$ cp u-boot.bin fip/bl33.bin
$ $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
$ $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
$ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

102
doc/board/amlogic/khadas-vim2.rst Normal file
View File

@ -0,0 +1,102 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for Khadas VIM2
=======================
Khadas VIM2 is an Open Source DIY Box manufactured by Shenzhen Wesion
Technology Co., Ltd with the following specifications:
- Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz
- ARM Mali T860 GPU
- 2/3GB DDR4 SDRAM
- 10/100/1000 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
- 16GB/32GB/64GB eMMC
- 2MB SPI Flash
- microSD
- SDIO Wifi Module, Bluetooth
- Two channels IR receiver
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make khadas-vim2_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ git clone https://github.com/khadas/u-boot -b khadas-vim-v2015.01 vim-u-boot
$ cd vim-u-boot
$ make kvim2_defconfig
$ make
$ export FIPDIR=$PWD/fip
Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $FIPDIR/gxl/bl2.bin fip/
$ cp $FIPDIR/gxl/acs.bin fip/
$ cp $FIPDIR/gxl/bl21.bin fip/
$ cp $FIPDIR/gxl/bl30.bin fip/
$ cp $FIPDIR/gxl/bl301.bin fip/
$ cp $FIPDIR/gxl/bl31.img fip/
$ cp u-boot.bin fip/bl33.bin
$ $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
$ $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
$ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

132
doc/board/amlogic/khadas-vim3.rst Normal file
View File

@ -0,0 +1,132 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for Khadas VIM3
======================
Khadas VIM3 is a single board computer manufactured by Shenzhen Wesion
Technology Co., Ltd. with the following specifications:
- Amlogic A311D Arm Cortex-A53 dual-core + Cortex-A73 quad-core SoC
- 4GB LPDDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 display
- 40-pin GPIO header
- 1 x USB 3.0 Host, 1 x USB 2.0 Host
- eMMC, microSD
- M.2
- Infrared receiver
Schematics are available on the manufacturer website.
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make khadas-vim3_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ DIR=vim3-u-boot
$ git clone --depth 1 \
https://github.com/khadas/u-boot.git -b khadas-vims-v2015.01 \
$DIR
$ cd vim3-u-boot
$ make kvim3_defconfig
$ make
$ export UBOOTDIR=$PWD
Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
$ cp $UBOOTDIR/build/board/khadas/kvim3/firmware/acs.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl2.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl30.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl31.img fip/
$ cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
$ cp $UBOOTDIR/fip/g12b/lpddr3_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12b/piei.fw fip/
$ cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
$ cp u-boot.bin fip/bl33.bin
$ sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33 --compress lz4
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--ddrfw9 fip/lpddr3_1d.fw \
--level v3
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

130
doc/board/amlogic/khadas-vim3l.rst Normal file
View File

@ -0,0 +1,130 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for Khadas VIM3L
=======================
Khadas VIM3L is a single board computer manufactured by Shenzhen Wesion
Technology Co., Ltd. with the following specifications:
- Amlogic S905D3 Arm Cortex-A55 quad-core SoC
- 2GB LPDDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 display
- 40-pin GPIO header
- 1 x USB 3.0 Host, 1 x USB 2.0 Host
- eMMC, microSD
- M.2
- Infrared receiver
Schematics are available on the manufacturer website.
U-Boot compilation
------------------
$ export CROSS_COMPILE=aarch64-none-elf-
$ make khadas-vim3l_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ DIR=vim3l-u-boot
$ git clone --depth 1 \
https://github.com/khadas/u-boot.git -b khadas-vims-v2015.01 \
$DIR
$ cd vim3l-u-boot
$ make kvim3l_defconfig
$ make
$ export UBOOTDIR=$PWD
Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
$ cp $UBOOTDIR/build/board/khadas/kvim3l/firmware/acs.bin fip/
$ cp $UBOOTDIR/fip/g12a/bl2.bin fip/
$ cp $UBOOTDIR/fip/g12a/bl30.bin fip/
$ cp $UBOOTDIR/fip/g12a/bl31.img fip/
$ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
$ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
$ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
$ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12a/piei.fw fip/
$ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
$ cp u-boot.bin fip/bl33.bin
$ sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33 --compress lz4
$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--ddrfw9 fip/lpddr3_1d.fw \
--level v3
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

110
doc/board/amlogic/libretech-ac.rst Normal file
View File

@ -0,0 +1,110 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for LibreTech AC
=======================
LibreTech AC is a single board computer manufactured by Libre Technology
with the following specifications:
- Amlogic S805X ARM Cortex-A53 quad-core SoC @ 1.2GHz
- ARM Mali 450 GPU
- 512MiB DDR4 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 2.0 Host
- eMMC, SPI NOR Flash
- Infrared receiver
Schematics are available on the manufacturer website.
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make libretech-ac_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ git clone https://github.com/BayLibre/u-boot.git -b libretech-ac amlogic-u-boot
$ cd amlogic-u-boot
$ wget https://raw.githubusercontent.com/BayLibre/u-boot/libretech-cc/fip/blx_fix.sh
$ make libretech_ac_defconfig
$ make
$ export UBOOTDIR=$PWD
Download the latest Amlogic Buildroot package, and extract it :
.. code-block:: bash
$ wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180418.tar.gz
$ tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180418.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180418/bootloader
$ export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180418
Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
$ cp $UBOOTDIR/build/board/amlogic/libretech_ac/firmware/bl21.bin fip/
$ cp $UBOOTDIR/build/board/amlogic/libretech_ac/firmware/acs.bin fip/
$ cp $BRDIR/bootloader/uboot-repo/bl2/bin/gxl/bl2.bin fip/
$ cp $BRDIR/bootloader/uboot-repo/bl30/bin/gxl/bl30.bin fip/
$ cp $BRDIR/bootloader/uboot-repo/bl31/bin/gxl/bl31.img fip/
$ cp u-boot.bin fip/bl33.bin
$ sh $UBOOTDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ $BRDIR/bootloader/uboot-repo/fip/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
$ sh $UBOOTDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
$ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
$ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
$ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
$ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

135
doc/board/amlogic/libretech-cc.rst Normal file
View File

@ -0,0 +1,135 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for LibreTech CC
=======================
LibreTech CC is a single board computer manufactured by Libre Technology
with the following specifications:
- Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- 10/100 Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 2.0 Host
- eMMC, microSD
- Infrared receiver
Schematics are available on the manufacturer website.
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make libretech-cc_defconfig
$ make
Image creation
--------------
To boot the system, u-boot must be combined with several earlier stage
bootloaders:
* bl2.bin: vendor-provided binary blob
* bl21.bin: built from vendor u-boot source
* bl30.bin: vendor-provided binary blob
* bl301.bin: built from vendor u-boot source
* bl31.bin: vendor-provided binary blob
* acs.bin: built from vendor u-boot source
These binaries and the tools required below have been collected and prebuilt
for convenience at <https://github.com/BayLibre/u-boot/releases/>
Download and extract the libretech-cc release from there, and set FIPDIR to
point to the `fip` subdirectory.
.. code-block:: bash
$ export FIPDIR=/path/to/extracted/fip
Alternatively, you can obtain the original vendor u-boot tree which
contains the required blobs and sources, and build yourself.
Note that old compilers are required for this to build. The compilers here
are suggested by Amlogic, and they are 32-bit x86 binaries.
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
$ cd amlogic-u-boot
$ make libretech_cc_defconfig
$ make
$ export FIPDIR=$PWD/fip
Once you have the binaries available (either through the prebuilt download,
or having built the vendor u-boot yourself), you can then proceed to glue
everything together. Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $FIPDIR/gxl/bl2.bin fip/
$ cp $FIPDIR/gxl/acs.bin fip/
$ cp $FIPDIR/gxl/bl21.bin fip/
$ cp $FIPDIR/gxl/bl30.bin fip/
$ cp $FIPDIR/gxl/bl301.bin fip/
$ cp $FIPDIR/gxl/bl31.img fip/
$ cp u-boot.bin fip/bl33.bin
$ $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
$ $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
$ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
Note that Amlogic provides aml_encrypt_gxl as a 32-bit x86 binary with no
source code. Should you prefer to avoid that, there are open source reverse
engineered versions available:
1. gxlimg <https://github.com/repk/gxlimg>, which comes with a handy
Makefile that automates the whole process.
2. meson-tools <https://github.com/afaerber/meson-tools>
However, these community-developed alternatives are not endorsed by or
supported by Amlogic.

104
doc/board/amlogic/nanopi-k2.rst Normal file
View File

@ -0,0 +1,104 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for NanoPi-K2
====================
NanoPi-K2 is a single board computer manufactured by FriendlyElec
with the following specifications:
- Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- Gigabit Ethernet
- HDMI 2.0 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 2.0 Host, 1 x USB OTG
- eMMC, microSD
- Infrared receiver
Schematics are available on the manufacturer website.
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make nanopi-k2_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
$ git clone https://github.com/friendlyarm/u-boot.git -b nanopi-k2-v2015.01 amlogic-u-boot
$ cd amlogic-u-boot
$ sed -i 's/aarch64-linux-gnu-/aarch64-none-elf-/' Makefile
$ sed -i 's/arm-linux-/arm-none-eabi-/' arch/arm/cpu/armv8/gxb/firmware/scp_task/Makefile
$ make nanopi-k2_defconfig
$ make
$ export FIPDIR=$PWD/fip
Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $FIPDIR/gxb/bl2.bin fip/
$ cp $FIPDIR/gxb/acs.bin fip/
$ cp $FIPDIR/gxb/bl21.bin fip/
$ cp $FIPDIR/gxb/bl30.bin fip/
$ cp $FIPDIR/gxb/bl301.bin fip/
$ cp $FIPDIR/gxb/bl31.img fip/
$ cp u-boot.bin fip/bl33.bin
$ $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ $FIPDIR/fip_create \
--bl30 fip/bl30_new.bin \
--bl31 fip/bl31.img \
--bl33 fip/bl33.bin \
fip/fip.bin
$ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
$ $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
$ $FIPDIR/gxb/aml_encrypt_gxb --bootsig \
--input fip/boot_new.bin
--output fip/u-boot.bin
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin of=$DEV conv=fsync,notrunc bs=512 seek=1

52
board/amlogic/p200/README.odroid-c2 → doc/board/amlogic/odroid-c2.rst
View File

@ -1,3 +1,5 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for ODROID-C2
====================
@ -16,50 +18,46 @@ Co. Ltd with the following specifications:
Schematics are available on the manufacturer website.
Currently the u-boot port supports the following devices:
- serial
- eMMC, microSD
- Ethernet
- I2C
- Regulators
- Reset controller
- Clock controller
- ADC
U-Boot compilation
------------------
u-boot compilation
==================
.. code-block:: bash
> export CROSS_COMPILE=aarch64-none-elf-
> make odroid-c2_defconfig
> make
$ export CROSS_COMPILE=aarch64-none-elf-
$ make odroid-c2_defconfig
$ make
Image creation
==============
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
> DIR=odroid-c2
> git clone --depth 1 \
.. code-block:: bash
$ DIR=odroid-c2
$ git clone --depth 1 \
https://github.com/hardkernel/u-boot.git -b odroidc2-v2015.01 \
$DIR
> $DIR/fip/fip_create --bl30 $DIR/fip/gxb/bl30.bin \
$ $DIR/fip/fip_create --bl30 $DIR/fip/gxb/bl30.bin \
--bl301 $DIR/fip/gxb/bl301.bin \
--bl31 $DIR/fip/gxb/bl31.bin \
--bl33 u-boot.bin \
$DIR/fip.bin
> $DIR/fip/fip_create --dump $DIR/fip.bin
> cat $DIR/fip/gxb/bl2.package $DIR/fip.bin > $DIR/boot_new.bin
> $DIR/fip/gxb/aml_encrypt_gxb --bootsig \
$ $DIR/fip/fip_create --dump $DIR/fip.bin
$ cat $DIR/fip/gxb/bl2.package $DIR/fip.bin > $DIR/boot_new.bin
$ $DIR/fip/gxb/aml_encrypt_gxb --bootsig \
--input $DIR/boot_new.bin \
--output $DIR/u-boot.img
> dd if=$DIR/u-boot.img of=$DIR/u-boot.gxbb bs=512 skip=96
$ dd if=$DIR/u-boot.img of=$DIR/u-boot.gxbb bs=512 skip=96
and then write the image to SD with:
> DEV=/dev/your_sd_device
> BL1=$DIR/sd_fuse/bl1.bin.hardkernel
> dd if=$BL1 of=$DEV conv=fsync bs=1 count=442
> dd if=$BL1 of=$DEV conv=fsync bs=512 skip=1 seek=1
> dd if=$DIR/u-boot.gxbb of=$DEV conv=fsync bs=512 seek=97
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ BL1=$DIR/sd_fuse/bl1.bin.hardkernel
$ dd if=$BL1 of=$DEV conv=fsync bs=1 count=442
$ dd if=$BL1 of=$DEV conv=fsync bs=512 skip=1 seek=1
$ dd if=$DIR/u-boot.gxbb of=$DEV conv=fsync bs=512 seek=97

130
doc/board/amlogic/odroid-n2.rst Normal file
View File

@ -0,0 +1,130 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for ODROID-N2
====================
ODROID-N2 is a single board computer manufactured by Hardkernel
Co. Ltd with the following specifications:
- Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
- 4GB DDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 3.0 Host, 1 x USB OTG
- eMMC, microSD
- Infrared receiver
Schematics are available on the manufacturer website.
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make odroid-n2_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ DIR=odroid-n2
$ git clone --depth 1 \
https://github.com/hardkernel/u-boot.git -b odroidn2-v2015.01 \
$DIR
$ cd odroid-n2
$ make odroidn2_defconfig
$ make
$ export UBOOTDIR=$PWD
Go back to mainline U-Boot source tree then :
.. code-block:: bash
$ mkdir fip
$ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
$ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
$ cp $UBOOTDIR/build/board/hardkernel/odroidn2/firmware/acs.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl2.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl30.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl31.img fip/
$ cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
$ cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12b/piei.fw fip/
$ cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
$ cp u-boot.bin fip/bl33.bin
$ sh fip/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ sh fip/blx_fix.sh \
fip/bl2.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/acs.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
--output fip/bl30_new.bin.g12a.enc \
--level v3
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
--output fip/bl30_new.bin.enc \
--level v3 --type bl30
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
--output fip/bl31.img.enc \
--level v3 --type bl31
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33 --compress lz4
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--level v3
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

102
doc/board/amlogic/p200.rst Normal file
View File

@ -0,0 +1,102 @@
.. SPDX-License-Identifier: GPL-2.0+
U-Boot for Amlogic P200
=======================
P200 is a reference board manufactured by Amlogic with the following
specifications:
- Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
- ARM Mali 450 GPU
- 2GB DDR3 SDRAM
- Gigabit Ethernet
- HDMI 2.0 4K/60Hz display
- 2 x USB 2.0 Host
- eMMC, microSD
- Infrared receiver
- SDIO WiFi Module
- CVBS+Stereo Audio Jack
Schematics are available from Amlogic on demand.
U-Boot compilation
------------------
.. code-block:: bash
$ export CROSS_COMPILE=aarch64-none-elf-
$ make p200_defconfig
$ make
Image creation
--------------
Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:
.. code-block:: bash
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
$ cd amlogic-u-boot
$ make gxb_p200_v1_defconfig
$ make
$ export FIPDIR=$PWD/fip
Go back to mainline U-boot source tree then :
.. code-block:: bash
$ mkdir fip
$ cp $FIPDIR/gxl/bl2.bin fip/
$ cp $FIPDIR/gxl/acs.bin fip/
$ cp $FIPDIR/gxl/bl21.bin fip/
$ cp $FIPDIR/gxl/bl30.bin fip/
$ cp $FIPDIR/gxl/bl301.bin fip/
$ cp $FIPDIR/gxl/bl31.img fip/
$ cp u-boot.bin fip/bl33.bin
$ $FIPDIR/blx_fix.sh \
fip/bl30.bin \
fip/zero_tmp \
fip/bl30_zero.bin \
fip/bl301.bin \
fip/bl301_zero.bin \
fip/bl30_new.bin \
bl30
$ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
$ $FIPDIR/blx_fix.sh \
fip/bl2_acs.bin \
fip/zero_tmp \
fip/bl2_zero.bin \
fip/bl21.bin \
fip/bl21_zero.bin \
fip/bl2_new.bin \
bl2
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
$ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
$ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
$ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
--output fip/u-boot.bin \
--bl2 fip/bl2.n.bin.sig \
--bl30 fip/bl30_new.bin.enc \
--bl31 fip/bl31.img.enc \
--bl33 fip/bl33.bin.enc
and then write the image to SD with:
.. code-block:: bash
$ DEV=/dev/your_sd_device
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444

Some files were not shown because too many files have changed in this diff Show More