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ARM: tegra: p2371-2180: A03 board PMIC config update
Rev A03 of P2180 requires some PMIC programming adjustments, yet the PMIC's own OTP has not been updated. Consequently, U-Boot must make these changes itself. NVIDIA's syseng team has confirmed that these changes can be enabled on all board revisions without issue. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -30,6 +30,28 @@ void pin_mux_mmc(void)
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ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
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ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
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if (ret)
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if (ret)
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printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
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printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
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/* Disable LDO4 discharge */
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ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1);
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if (ret) {
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printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret);
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} else {
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val &= ~BIT(1); /* ADE */
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ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1);
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if (ret)
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printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret);
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}
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/* Set MBLPD */
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ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
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if (ret) {
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printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
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} else {
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val |= BIT(6); /* MBLPD */
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ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
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if (ret)
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printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
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}
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}
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}
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/*
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/*
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@ -13,6 +13,8 @@
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#define MAX77620_I2C_ADDR 0x78
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#define MAX77620_I2C_ADDR 0x78
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#define MAX77620_I2C_ADDR_7BIT 0x3C
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#define MAX77620_I2C_ADDR_7BIT 0x3C
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#define MAX77620_CNFGGLBL1_REG 0x00
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#define MAX77620_SD0_REG 0x16
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#define MAX77620_SD0_REG 0x16
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#define MAX77620_SD1_REG 0x17
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#define MAX77620_SD1_REG 0x17
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#define MAX77620_SD2_REG 0x18
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#define MAX77620_SD2_REG 0x18
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