mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-01 00:50:43 +09:00
Merge git://www.denx.de/git/u-boot-marvell
This commit is contained in:
commit
ebca2083d3
@ -61,6 +61,7 @@
|
|||||||
ethernet1 = ð0;
|
ethernet1 = ð0;
|
||||||
ethernet2 = ð1;
|
ethernet2 = ð1;
|
||||||
ethernet3 = ð2;
|
ethernet3 = ð2;
|
||||||
|
spi1 = &spi1;
|
||||||
};
|
};
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
@ -330,11 +331,9 @@
|
|||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
spi@10680 {
|
spi1: spi@10680 {
|
||||||
/*
|
/*
|
||||||
* We don't seem to have the W25Q32 on the
|
* CS0: W25Q32
|
||||||
* A1 Rev 2.0 boards, so disable SPI.
|
|
||||||
* CS0: W25Q32 (doesn't appear to be present)
|
|
||||||
* CS1:
|
* CS1:
|
||||||
* CS2: mikrobus
|
* CS2: mikrobus
|
||||||
*/
|
*/
|
||||||
@ -345,10 +344,9 @@
|
|||||||
spi-flash@0 {
|
spi-flash@0 {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "w25q32", "jedec,spi-nor";
|
compatible = "w25q32", "jedec,spi-nor", "spi-flash";
|
||||||
reg = <0>; /* Chip select 0 */
|
reg = <0>; /* Chip select 0 */
|
||||||
spi-max-frequency = <3000000>;
|
spi-max-frequency = <3000000>;
|
||||||
status = "disabled";
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -554,6 +554,47 @@ void scsi_init(void)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_USB_XHCI_MVEBU
|
||||||
|
#define USB3_MAX_WINDOWS 4
|
||||||
|
#define USB3_WIN_CTRL(w) (0x0 + ((w) * 8))
|
||||||
|
#define USB3_WIN_BASE(w) (0x4 + ((w) * 8))
|
||||||
|
|
||||||
|
static void xhci_mvebu_mbus_config(void __iomem *base,
|
||||||
|
const struct mbus_dram_target_info *dram)
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = 0; i < USB3_MAX_WINDOWS; i++) {
|
||||||
|
writel(0, base + USB3_WIN_CTRL(i));
|
||||||
|
writel(0, base + USB3_WIN_BASE(i));
|
||||||
|
}
|
||||||
|
|
||||||
|
for (i = 0; i < dram->num_cs; i++) {
|
||||||
|
const struct mbus_dram_window *cs = dram->cs + i;
|
||||||
|
|
||||||
|
/* Write size, attributes and target id to control register */
|
||||||
|
writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
|
||||||
|
(dram->mbus_dram_target_id << 4) | 1,
|
||||||
|
base + USB3_WIN_CTRL(i));
|
||||||
|
|
||||||
|
/* Write base address to base register */
|
||||||
|
writel((cs->base & 0xffff0000), base + USB3_WIN_BASE(i));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int board_xhci_enable(fdt_addr_t base)
|
||||||
|
{
|
||||||
|
const struct mbus_dram_target_info *dram;
|
||||||
|
|
||||||
|
printf("MVEBU XHCI INIT controller @ 0x%lx\n", base);
|
||||||
|
|
||||||
|
dram = mvebu_mbus_dram_info();
|
||||||
|
xhci_mvebu_mbus_config((void __iomem *)base, dram);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
void enable_caches(void)
|
void enable_caches(void)
|
||||||
{
|
{
|
||||||
/* Avoid problem with e.g. neta ethernet driver */
|
/* Avoid problem with e.g. neta ethernet driver */
|
||||||
|
@ -123,7 +123,7 @@ int board_ahci_enable(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Board specific xHCI enable code */
|
/* Board specific xHCI enable code */
|
||||||
int board_xhci_enable(void)
|
int board_xhci_enable(fdt_addr_t base)
|
||||||
{
|
{
|
||||||
struct udevice *dev;
|
struct udevice *dev;
|
||||||
int ret;
|
int ret;
|
||||||
|
@ -95,7 +95,7 @@ int board_xhci_config(void)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int board_xhci_enable(void)
|
int board_xhci_enable(fdt_addr_t base)
|
||||||
{
|
{
|
||||||
struct udevice *dev;
|
struct udevice *dev;
|
||||||
int ret;
|
int ret;
|
||||||
|
@ -43,5 +43,9 @@ CONFIG_DEBUG_UART_SHIFT=2
|
|||||||
CONFIG_SYS_NS16550=y
|
CONFIG_SYS_NS16550=y
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
CONFIG_DM_USB=y
|
CONFIG_DM_USB=y
|
||||||
CONFIG_USB_EHCI_HCD=y
|
CONFIG_USB_XHCI_HCD=y
|
||||||
|
CONFIG_USB_XHCI_MVEBU=y
|
||||||
CONFIG_USB_STORAGE=y
|
CONFIG_USB_STORAGE=y
|
||||||
|
CONFIG_SPI_FLASH_BAR=y
|
||||||
|
CONFIG_SPI_FLASH_WINBOND=y
|
||||||
|
CONFIG_SPI_FLASH_MTD=y
|
||||||
|
@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
|
|||||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||||
CONFIG_TARGET_MVEBU_ARMADA_8K=y
|
CONFIG_TARGET_MVEBU_ARMADA_8K=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db"
|
CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db"
|
||||||
|
CONFIG_DISTRO_DEFAULTS=y
|
||||||
CONFIG_SMBIOS_PRODUCT_NAME=""
|
CONFIG_SMBIOS_PRODUCT_NAME=""
|
||||||
CONFIG_DEBUG_UART=y
|
CONFIG_DEBUG_UART=y
|
||||||
CONFIG_AHCI=y
|
CONFIG_AHCI=y
|
||||||
|
@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
|
|||||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||||
CONFIG_TARGET_MVEBU_ARMADA_8K=y
|
CONFIG_TARGET_MVEBU_ARMADA_8K=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin"
|
CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin"
|
||||||
|
CONFIG_DISTRO_DEFAULTS=y
|
||||||
CONFIG_SMBIOS_PRODUCT_NAME=""
|
CONFIG_SMBIOS_PRODUCT_NAME=""
|
||||||
CONFIG_DEBUG_UART=y
|
CONFIG_DEBUG_UART=y
|
||||||
CONFIG_AHCI=y
|
CONFIG_AHCI=y
|
||||||
|
@ -26,7 +26,6 @@ CONFIG_CMD_PCI=y
|
|||||||
CONFIG_CMD_SF=y
|
CONFIG_CMD_SF=y
|
||||||
CONFIG_CMD_SPI=y
|
CONFIG_CMD_SPI=y
|
||||||
CONFIG_CMD_USB=y
|
CONFIG_CMD_USB=y
|
||||||
# CONFIG_CMD_SETEXPR is not set
|
|
||||||
CONFIG_CMD_TFTPPUT=y
|
CONFIG_CMD_TFTPPUT=y
|
||||||
CONFIG_CMD_DHCP=y
|
CONFIG_CMD_DHCP=y
|
||||||
CONFIG_CMD_MII=y
|
CONFIG_CMD_MII=y
|
||||||
|
@ -82,11 +82,11 @@ struct mvebu_pcie {
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
* MVEBU PCIe controller needs MEMORY and I/O BARs to be mapped
|
* MVEBU PCIe controller needs MEMORY and I/O BARs to be mapped
|
||||||
* into SoCs address space. Each controller will map 32M of MEM
|
* into SoCs address space. Each controller will map 128M of MEM
|
||||||
* and 64K of I/O space when registered.
|
* and 64K of I/O space when registered.
|
||||||
*/
|
*/
|
||||||
static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;
|
static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;
|
||||||
#define PCIE_MEM_SIZE (32 << 20)
|
#define PCIE_MEM_SIZE (128 << 20)
|
||||||
|
|
||||||
#if defined(CONFIG_ARMADA_38X)
|
#if defined(CONFIG_ARMADA_38X)
|
||||||
#define PCIE_BASE(if) \
|
#define PCIE_BASE(if) \
|
||||||
|
@ -35,7 +35,7 @@ struct mvebu_xhci {
|
|||||||
* Dummy implementation that can be overwritten by a board
|
* Dummy implementation that can be overwritten by a board
|
||||||
* specific function
|
* specific function
|
||||||
*/
|
*/
|
||||||
__weak int board_xhci_enable(void)
|
__weak int board_xhci_enable(fdt_addr_t base)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -62,7 +62,7 @@ static int xhci_usb_probe(struct udevice *dev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Enable USB xHCI (VBUS, reset etc) in board specific code */
|
/* Enable USB xHCI (VBUS, reset etc) in board specific code */
|
||||||
board_xhci_enable();
|
board_xhci_enable(devfdt_get_addr_index(dev, 1));
|
||||||
|
|
||||||
return xhci_register(dev, ctx->hcd, hcor);
|
return xhci_register(dev, ctx->hcd, hcor);
|
||||||
}
|
}
|
||||||
@ -85,6 +85,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
|
|||||||
|
|
||||||
static const struct udevice_id xhci_usb_ids[] = {
|
static const struct udevice_id xhci_usb_ids[] = {
|
||||||
{ .compatible = "marvell,armada3700-xhci" },
|
{ .compatible = "marvell,armada3700-xhci" },
|
||||||
|
{ .compatible = "marvell,armada-380-xhci" },
|
||||||
{ .compatible = "marvell,armada-8k-xhci" },
|
{ .compatible = "marvell,armada-8k-xhci" },
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
|
@ -33,9 +33,7 @@
|
|||||||
#define CONFIG_SYS_I2C_SPEED 100000
|
#define CONFIG_SYS_I2C_SPEED 100000
|
||||||
|
|
||||||
/* SPI NOR flash default params, used by sf commands */
|
/* SPI NOR flash default params, used by sf commands */
|
||||||
#define CONFIG_SF_DEFAULT_SPEED 1000000
|
#define CONFIG_SF_DEFAULT_BUS 1
|
||||||
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
|
|
||||||
#define CONFIG_SPI_FLASH_STMICRO
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SDIO/MMC Card Configuration
|
* SDIO/MMC Card Configuration
|
||||||
|
Loading…
Reference in New Issue
Block a user