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i.MX7ULP: Fix SPLL/APLL clock rate calculation issue

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The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Ye Li 2019-07-22 01:25:00 +00:00 committed by Stefano Babic
parent 3399a2e1d2
commit eb6d2e5920
1 changed files with 8 additions and 2 deletions
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10
arch/arm/mach-imx/mx7ulp/scg.c
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@ -503,7 +503,10 @@ u32 decode_pll(enum pll_clocks pll)
infreq = infreq / pre_div;
return infreq * mult + infreq * num / denom;
if (denom)
return infreq * mult + infreq * num / denom;
else
return infreq * mult;
case PLL_A7_APLL:
reg = readl(&scg1_regs->apllcsr);
@ -532,7 +535,10 @@ u32 decode_pll(enum pll_clocks pll)
infreq = infreq / pre_div;
return infreq * mult + infreq * num / denom;
if (denom)
return infreq * mult + infreq * num / denom;
else
return infreq * mult;
case PLL_USB:
reg = readl(&scg1_regs->upllcsr);