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ARMv8: SError exception handling in PSCI exception vectors
Allow platform vendors to handle SError interrupt exceptions from ARMv8 PSCI exception vectors by overriding this weak function 'plat_error_handler'. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
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@ -236,6 +236,28 @@ handle_sync:
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b unhandled_exception
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b unhandled_exception
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#ifdef CONFIG_ARMV8_EA_EL3_FIRST
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/*
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* Override this function if custom error handling is
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* needed for asynchronous aborts
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*/
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ENTRY(plat_error_handler)
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ret
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ENDPROC(plat_error_handler)
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.weak plat_error_handler
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handle_error:
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bl psci_get_cpu_id
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bl psci_get_cpu_stack_top
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mov x9, #1
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msr spsel, x9
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mov sp, x0
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bl plat_error_handler /* Platform specific error handling */
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deadloop:
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b deadloop /* Never return */
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#endif
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.align 11
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.align 11
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.globl el3_exception_vectors
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.globl el3_exception_vectors
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el3_exception_vectors:
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el3_exception_vectors:
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@ -261,7 +283,11 @@ el3_exception_vectors:
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.align 7
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.align 7
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b unhandled_exception /* FIQ, Lower EL using AArch64 */
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b unhandled_exception /* FIQ, Lower EL using AArch64 */
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.align 7
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.align 7
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#ifdef CONFIG_ARMV8_EA_EL3_FIRST
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b handle_error /* SError, Lower EL using AArch64 */
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#else
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b unhandled_exception /* SError, Lower EL using AArch64 */
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b unhandled_exception /* SError, Lower EL using AArch64 */
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#endif
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.align 7
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.align 7
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b unhandled_exception /* Sync, Lower EL using AArch32 */
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b unhandled_exception /* Sync, Lower EL using AArch32 */
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.align 7
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.align 7
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