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arm: mvebu: add Armada XP SATA support

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This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.

Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This commit is contained in:
Anton Schubert 2015-07-15 14:50:05 +02:00 committed by Luka Perkov
parent b217c89e85
commit e863f7f051
3 changed files with 71 additions and 0 deletions
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1
arch/arm/mach-mvebu/include/mach/soc.h
View File

@ -52,6 +52,7 @@
#define MVEBU_USB20_BASE (MVEBU_REGISTER(0x58000))
#define MVEBU_EGIGA0_BASE (MVEBU_REGISTER(0x70000))
#define MVEBU_EGIGA1_BASE (MVEBU_REGISTER(0x74000))
#define MVEBU_AXP_SATA_BASE (MVEBU_REGISTER(0xa0000))
#define MVEBU_SATA0_BASE (MVEBU_REGISTER(0xa8000))
#define MVEBU_SDIO_BASE (MVEBU_REGISTER(0xd8000))

41
drivers/block/mvsata_ide.c
View File

@ -13,6 +13,8 @@
#include <asm/arch/orion5x.h>
#elif defined(CONFIG_KIRKWOOD)
#include <asm/arch/soc.h>
#elif defined(CONFIG_ARMADA_XP)
#include <linux/mbus.h>
#endif
/* SATA port registers */
@ -89,6 +91,41 @@ struct mvsata_port_registers {
#define MVSATA_STATUS_OK 0
#define MVSATA_STATUS_TIMEOUT -1
/*
* Registers for SATA MBUS memory windows
*/
#define MVSATA_WIN_CONTROL(w) (MVEBU_AXP_SATA_BASE + 0x30 + ((w) << 4))
#define MVSATA_WIN_BASE(w) (MVEBU_AXP_SATA_BASE + 0x34 + ((w) << 4))
/*
* Initialize SATA memory windows for Armada XP
*/
#ifdef CONFIG_ARMADA_XP
static void mvsata_ide_conf_mbus_windows(void)
{
const struct mbus_dram_target_info *dram;
int i;
dram = mvebu_mbus_dram_info();
/* Disable windows, Set Size/Base to 0 */
for (i = 0; i < 4; i++) {
writel(0, MVSATA_WIN_CONTROL(i));
writel(0, MVSATA_WIN_BASE(i));
}
for (i = 0; i < dram->num_cs; i++) {
const struct mbus_dram_window *cs = dram->cs + i;
writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
(dram->mbus_dram_target_id << 4) | 1,
MVSATA_WIN_CONTROL(i));
writel(cs->base & 0xffff0000, MVSATA_WIN_BASE(i));
}
}
#endif
/*
* Initialize one MVSATAHC port: set SControl's IPM to "always active"
* and DET to "reset", then wait for SStatus's DET to become "device and
@ -137,6 +174,10 @@ int ide_preinit(void)
int ret = MVSATA_STATUS_TIMEOUT;
int status;
#ifdef CONFIG_ARMADA_XP
mvsata_ide_conf_mbus_windows();
#endif
/* Enable ATA port 0 (could be SATA port 0 or 1) if declared */
#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
status = mvsata_ide_initialize_port(

29
include/configs/db-mv784mp-gp.h
View File

@ -27,6 +27,7 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IDE
#define CONFIG_CMD_PING
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
@ -60,6 +61,34 @@
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
#define CONFIG_SYS_ALT_MEMTEST
/* SATA support */
#ifdef CONFIG_CMD_IDE
#define __io
#define CONFIG_IDE_PREINIT
#define CONFIG_MVSATA_IDE
/* Needs byte-swapping for ATA data register */
#define CONFIG_IDE_SWAP_IO
#define CONFIG_SYS_ATA_REG_OFFSET 0x0100 /* Offset for register access */
#define CONFIG_SYS_ATA_DATA_OFFSET 0x0100 /* Offset for data I/O */
#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
/* Each 8-bit ATA register is aligned to a 4-bytes address */
#define CONFIG_SYS_ATA_STRIDE 4
/* CONFIG_CMD_IDE requires some #defines for ATA registers */
#define CONFIG_SYS_IDE_MAXBUS 2
#define CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IDE_MAXBUS
/* ATA registers base is at SATA controller base */
#define CONFIG_SYS_ATA_BASE_ADDR MVEBU_AXP_SATA_BASE
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x2000
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x4000
#define CONFIG_DOS_PARTITION
#endif /* CONFIG_CMD_IDE */
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros