From e5fc9037dd3391a63cf6f6f7da015507ae12158d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= Date: Thu, 20 May 2021 13:24:11 +0200 Subject: [PATCH] ARM: fix LTO build for some thumb-interwork cases MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix LTO build for some thumb-interwork usecases (such as for da850evm_defconfig), where inline assmebly such as mrc p15,0,r2,c1,c0,0 causes the compiler to fail during LTO linking with Error: selected processor does not support `mrc p15,0,r2,c1,c0,0' in Thumb mode Signed-off-by: Marek Behún Reviewed-by: Simon Glass --- arch/arm/cpu/arm926ejs/Makefile | 2 ++ arch/arm/lib/Makefile | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index af63d5cc5e..98aafe805a 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -25,6 +25,8 @@ ifndef CONFIG_HAS_THUMB2 CFLAGS_cpu.o := -marm CFLAGS_cache.o := -marm +CFLAGS_REMOVE_cpu.o := $(LTO_CFLAGS) +CFLAGS_REMOVE_cache.o := $(LTO_CFLAGS) endif endif diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 27b12e7f2b..61bef1d5af 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -64,6 +64,7 @@ endif obj-y += cache.o obj-$(CONFIG_SYS_ARM_CACHE_CP15) += cache-cp15.o +CFLAGS_REMOVE_cache-cp15.o := $(LTO_CFLAGS) obj-y += psci-dt.o