mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-27 23:20:26 +09:00
- Convert qemu-ppce500 to driver model and enable additional driver support - bug fixes/updates in net-dsa driver, vid driver, move configs to kconfig - Update Maintainers of some powerpc, layerscape platforms
This commit is contained in:
commit
e4dba4ba6f
@ -640,3 +640,13 @@ config HAS_FSL_XHCI_USB
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help
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For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use
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pins, select it when the pins are assigned to USB.
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config SYS_FSL_BOOTROM_BASE
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hex
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depends on FSL_LSCH2
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default 0
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config SYS_FSL_BOOTROM_SIZE
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hex
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depends on FSL_LSCH2
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default 0x1000000
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@ -69,8 +69,6 @@
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#define CONFIG_SYS_FSL_DRAM_SIZE2 0x7F80000000
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#endif
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#elif defined(CONFIG_FSL_LSCH2)
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#define CONFIG_SYS_FSL_BOOTROM_BASE 0x0
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#define CONFIG_SYS_FSL_BOOTROM_SIZE 0x1000000
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#define CONFIG_SYS_FSL_CCSR_BASE 0x1000000
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#define CONFIG_SYS_FSL_CCSR_SIZE 0xf000000
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#define CONFIG_SYS_FSL_DCSR_BASE 0x20000000
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@ -51,14 +51,17 @@ config TARGET_P5040DS
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config TARGET_MPC8541CDS
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bool "Support MPC8541CDS"
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select ARCH_MPC8541
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select FSL_VIA
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config TARGET_MPC8548CDS
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bool "Support MPC8548CDS"
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select ARCH_MPC8548
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select FSL_VIA
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config TARGET_MPC8555CDS
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bool "Support MPC8555CDS"
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select ARCH_MPC8555
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select FSL_VIA
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config TARGET_MPC8568MDS
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bool "Support MPC8568MDS"
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@ -1409,6 +1412,10 @@ config SYS_FSL_LBC_CLK_DIV
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Defines divider of platform clock(clock input to
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eLBC controller).
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config FSL_VIA
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bool
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source "board/emulation/qemu-ppce500/Kconfig"
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source "board/freescale/corenet_ds/Kconfig"
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source "board/freescale/mpc8541cds/Kconfig"
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source "board/freescale/mpc8548cds/Kconfig"
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@ -1417,7 +1424,6 @@ source "board/freescale/mpc8568mds/Kconfig"
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source "board/freescale/p1010rdb/Kconfig"
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source "board/freescale/p1_p2_rdb_pc/Kconfig"
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source "board/freescale/p2041rdb/Kconfig"
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source "board/freescale/qemu-ppce500/Kconfig"
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source "board/freescale/t102xrdb/Kconfig"
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source "board/freescale/t104xrdb/Kconfig"
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source "board/freescale/t208xqds/Kconfig"
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@ -395,7 +395,9 @@ int cpu_mmc_init(struct bd_info *bis)
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void print_reginfo(void)
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{
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print_tlbcam();
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#ifdef CONFIG_FSL_LAW
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print_laws();
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#endif
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#if defined(CONFIG_FSL_LBC)
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print_lbc_regs();
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#endif
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@ -123,7 +123,9 @@ void cpu_init_early_f(void *fdt)
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setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_LCLK_IFC_CS3);
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#endif
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#ifdef CONFIG_FSL_LAW
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init_laws();
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#endif
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/*
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* Work Around for IFC Erratum A003399, issue will hit only when execution
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@ -18,7 +18,7 @@
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#endif
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struct mpc8xxx_gpio_plat {
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ulong addr;
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phys_addr_t addr;
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unsigned long size;
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uint ngpios;
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};
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@ -272,6 +272,7 @@ typedef struct ccsr_gpio {
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u32 gpier;
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u32 gpimr;
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u32 gpicr;
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u32 gpibe;
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} ccsr_gpio_t;
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#endif
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@ -10,7 +10,10 @@
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#include <asm/byteorder.h>
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#ifdef CONFIG_ADDR_MAP
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#include <asm/global_data.h>
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#include <addr_map.h>
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DECLARE_GLOBAL_DATA_PTR;
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#endif
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#define SIO_CONFIG_RA 0x398
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@ -303,20 +306,20 @@ static inline void out_be32(volatile unsigned __iomem *addr, u32 val)
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static inline void *phys_to_virt(phys_addr_t paddr)
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{
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#ifdef CONFIG_ADDR_MAP
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return addrmap_phys_to_virt(paddr);
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#else
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return (void *)((unsigned long)paddr);
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if (gd->flags & GD_FLG_RELOC)
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return addrmap_phys_to_virt(paddr);
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#endif
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return (void *)((unsigned long)paddr);
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}
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#define phys_to_virt phys_to_virt
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static inline phys_addr_t virt_to_phys(void * vaddr)
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{
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#ifdef CONFIG_ADDR_MAP
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return addrmap_virt_to_phys(vaddr);
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#else
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return (phys_addr_t)((unsigned long)vaddr);
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if (gd->flags & GD_FLG_RELOC)
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return addrmap_virt_to_phys(vaddr);
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#endif
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return (phys_addr_t)((unsigned long)vaddr);
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}
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#define virt_to_phys virt_to_phys
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@ -4,7 +4,7 @@ config SYS_BOARD
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default "qemu-ppce500"
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config SYS_VENDOR
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default "freescale"
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default "emulation"
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config SYS_CONFIG_NAME
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default "qemu-ppce500"
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7
board/emulation/qemu-ppce500/MAINTAINERS
Normal file
7
board/emulation/qemu-ppce500/MAINTAINERS
Normal file
@ -0,0 +1,7 @@
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QEMU-PPCE500 BOARD
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M: Alexander Graf <agraf@csgraf.de>
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M: Bin Meng <bmeng.cn@gmail.com>
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S: Maintained
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F: board/emulation/qemu-ppce500/
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F: include/configs/qemu-ppce500.h
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F: configs/qemu-ppce500_defconfig
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@ -1,11 +1,13 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2007,2009-2014 Freescale Semiconductor, Inc.
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* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <command.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <env.h>
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#include <init.h>
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#include <log.h>
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@ -23,12 +25,17 @@
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#include <fdtdec.h>
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#include <errno.h>
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#include <malloc.h>
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#include <virtio_types.h>
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#include <virtio.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void *get_fdt_virt(void)
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{
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return (void *)CONFIG_SYS_TMPVIRT;
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if (gd->flags & GD_FLG_RELOC)
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return (void *)gd->fdt_blob;
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else
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return (void *)CONFIG_SYS_TMPVIRT;
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}
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static uint64_t get_fdt_phys(void)
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@ -74,33 +81,14 @@ uint64_t get_phys_ccsrbar_addr_early(void)
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return r;
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}
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int board_early_init_f(void)
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{
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return 0;
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}
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int checkboard(void)
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{
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return 0;
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}
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static int pci_map_region(void *fdt, int pci_node, int range_id,
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phys_size_t *ppaddr, pci_addr_t *pvaddr,
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pci_size_t *psize, ulong *pmap_addr)
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static int pci_map_region(phys_addr_t paddr, phys_size_t size, ulong *pmap_addr)
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{
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uint64_t addr;
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uint64_t size;
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ulong map_addr;
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int r;
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r = fdt_read_range(fdt, pci_node, range_id, NULL, &addr, &size);
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if (r)
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return r;
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if (ppaddr)
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*ppaddr = addr;
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if (psize)
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*psize = size;
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if (!pmap_addr)
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return 0;
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@ -115,90 +103,52 @@ static int pci_map_region(void *fdt, int pci_node, int range_id,
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return -1;
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/* Map virtual memory for range */
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assert(!tlb_map_range(map_addr, addr, size, TLB_MAP_IO));
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assert(!tlb_map_range(map_addr, paddr, size, TLB_MAP_IO));
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*pmap_addr = map_addr + size;
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if (pvaddr)
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*pvaddr = map_addr;
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return 0;
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}
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void pci_init_board(void)
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int misc_init_r(void)
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{
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struct pci_controller *pci_hoses;
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void *fdt = get_fdt_virt();
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int pci_node = -1;
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int pci_num = 0;
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int pci_count = 0;
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struct udevice *dev;
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struct pci_region *io;
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struct pci_region *mem;
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struct pci_region *pre;
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ulong map_addr;
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int ret;
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puts("\n");
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/* Ensure PCI is probed */
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uclass_first_device(UCLASS_PCI, &dev);
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pci_get_regions(dev, &io, &mem, &pre);
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/* Start MMIO and PIO range maps above RAM */
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map_addr = CONFIG_SYS_PCI_MAP_START;
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/* Count and allocate PCI buses */
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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while (pci_node != -FDT_ERR_NOTFOUND) {
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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pci_count++;
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}
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/* Map MMIO range */
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ret = pci_map_region(mem->phys_start, mem->size, &map_addr);
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if (ret)
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return ret;
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if (pci_count) {
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pci_hoses = malloc(sizeof(struct pci_controller) * pci_count);
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} else {
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printf("PCI: disabled\n\n");
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return;
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}
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/* Map PIO range */
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ret = pci_map_region(io->phys_start, io->size, &map_addr);
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if (ret)
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return ret;
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/* Spawn PCI buses based on device tree */
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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while (pci_node != -FDT_ERR_NOTFOUND) {
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struct fsl_pci_info pci_info = { };
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const fdt32_t *reg;
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int r;
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/*
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* Make sure virtio bus is enumerated so that peripherals
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* on the virtio bus can be discovered by their drivers.
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*/
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virtio_init();
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reg = fdt_getprop(fdt, pci_node, "reg", NULL);
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pci_info.regs = fdt_translate_address(fdt, pci_node, reg);
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/*
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* U-Boot is relocated to RAM already, let's delete the temporary FDT
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* virtual-physical mapping that was used in the pre-relocation phase.
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*/
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disable_tlb(find_tlb_idx((void *)CONFIG_SYS_TMPVIRT, 1));
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/* Map MMIO range */
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r = pci_map_region(fdt, pci_node, 0, &pci_info.mem_phys, NULL,
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&pci_info.mem_size, &map_addr);
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if (r)
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break;
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/* Map PIO range */
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r = pci_map_region(fdt, pci_node, 1, &pci_info.io_phys, NULL,
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&pci_info.io_size, &map_addr);
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if (r)
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break;
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/*
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* The PCI framework finds virtual addresses for the buses
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* through our address map, so tell it the physical addresses.
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*/
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pci_info.mem_bus = pci_info.mem_phys;
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pci_info.io_bus = pci_info.io_phys;
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/* Instantiate */
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pci_info.pci_num = pci_num + 1;
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fsl_setup_hose(&pci_hoses[pci_num], pci_info.regs);
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printf("PCI: base address %lx\n", pci_info.regs);
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fsl_pci_init_port(&pci_info, &pci_hoses[pci_num], pci_num);
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/* Jump to next PCI node */
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pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
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"device_type", "pci", 4);
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pci_num++;
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}
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puts("\n");
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return 0;
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}
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int last_stage_init(void)
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@ -219,9 +169,6 @@ int last_stage_init(void)
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if (prop && (len >= 8))
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env_set_hex("qemu_kernel_addr", *prop);
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/* Give the user a variable for the host fdt */
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env_set_hex("fdt_addr_r", (ulong)fdt);
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return 0;
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}
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@ -241,30 +188,6 @@ static uint64_t get_linear_ram_size(void)
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panic("Couldn't determine RAM size");
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}
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int board_eth_init(struct bd_info *bis)
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{
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return pci_eth_init(bis);
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}
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|
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#if defined(CONFIG_OF_BOARD_SETUP)
|
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int ft_board_setup(void *blob, struct bd_info *bd)
|
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{
|
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FT_FSL_PCI_SETUP;
|
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|
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return 0;
|
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}
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#endif
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void print_laws(void)
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{
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/* We don't emulate LAWs yet */
|
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}
|
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|
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phys_size_t fixed_sdram(void)
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{
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return get_linear_ram_size();
|
||||
}
|
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|
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phys_size_t fsl_ddr_sdram_size(void)
|
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{
|
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return get_linear_ram_size();
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@ -303,11 +226,6 @@ void init_tlbs(void)
|
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1024 * 1024, TLB_MAP_RAM));
|
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}
|
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|
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void init_laws(void)
|
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{
|
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/* We don't emulate LAWs yet */
|
||||
}
|
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|
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static uint32_t get_cpu_freq(void)
|
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{
|
||||
void *fdt = get_fdt_virt();
|
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@ -380,3 +298,19 @@ u32 cpu_mask(void)
|
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{
|
||||
return (1 << cpu_numcores()) - 1;
|
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}
|
||||
|
||||
/**
|
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* Return the virtual address of FDT that was passed by QEMU
|
||||
*
|
||||
* @return virtual address of FDT received from QEMU in r3 register
|
||||
*/
|
||||
void *board_fdt_blob_setup(void)
|
||||
{
|
||||
return get_fdt_virt();
|
||||
}
|
||||
|
||||
/* See CONFIG_SYS_NS16550_CLK in arch/powerpc/include/asm/config.h */
|
||||
int get_serial_clock(void)
|
||||
{
|
||||
return get_bus_freq(0);
|
||||
}
|
@ -21,18 +21,37 @@ config CMD_ESBC_VALIDATE
|
||||
esbc_validate - validate signature using RSA verification
|
||||
esbc_halt - put the core in spin loop (Secure Boot Only)
|
||||
|
||||
config VID
|
||||
depends on DM_I2C
|
||||
bool "Enable Freescale VID"
|
||||
help
|
||||
This option enables setting core voltage based on individual
|
||||
values saved in SoC fuses.
|
||||
|
||||
config VOL_MONITOR_LTC3882_READ
|
||||
depends on VID
|
||||
bool "Enable the LTC3882 voltage monitor read"
|
||||
default n
|
||||
help
|
||||
This option enables LTC3882 voltage monitor read
|
||||
functionality. It is used by common VID driver.
|
||||
functionality. It is used by the common VID driver.
|
||||
|
||||
config VOL_MONITOR_LTC3882_SET
|
||||
depends on VID
|
||||
bool "Enable the LTC3882 voltage monitor set"
|
||||
default n
|
||||
help
|
||||
This option enables LTC3882 voltage monitor set
|
||||
functionality. It is used by common VID driver.
|
||||
functionality. It is used by the common VID driver.
|
||||
|
||||
config VOL_MONITOR_ISL68233_READ
|
||||
depends on VID
|
||||
bool "Enable the ISL68233 voltage monitor read"
|
||||
help
|
||||
This option enables ISL68233 voltage monitor read
|
||||
functionality. It is used by the common VID driver.
|
||||
|
||||
config VOL_MONITOR_ISL68233_SET
|
||||
depends on VID
|
||||
bool "Enable the ISL68233 voltage monitor set"
|
||||
help
|
||||
This option enables ISL68233 voltage monitor set
|
||||
functionality. It is used by the common VID driver.
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -7,16 +7,17 @@
|
||||
#ifndef __VID_H_
|
||||
#define __VID_H_
|
||||
|
||||
/* IR36021 command codes */
|
||||
#define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A
|
||||
#define IR36021_LOOP1_VOUT_OFFSET 0x9A
|
||||
#define IR36021_MFR_ID_OFFSET 0x92
|
||||
#define IR36021_MFR_ID 0x43
|
||||
#define IR36021_INTEL_MODE_OOFSET 0x14
|
||||
#define IR36021_INTEL_MODE_OFFSET 0x14
|
||||
#define IR36021_MODE_MASK 0x20
|
||||
#define IR36021_INTEL_MODE 0x00
|
||||
#define IR36021_AMD_MODE 0x20
|
||||
|
||||
/* step the IR regulator in 5mV increments */
|
||||
/* Step the IR regulator in 5mV increments */
|
||||
#define IR_VDD_STEP_DOWN 5
|
||||
#define IR_VDD_STEP_UP 5
|
||||
|
||||
@ -50,15 +51,16 @@
|
||||
#define VDD_MV_MAX 925
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) || \
|
||||
defined(CONFIG_TARGET_LX2160ARDB)
|
||||
/* PM Bus commands code for LTC3882*/
|
||||
#define PWM_CHANNEL0 0x0
|
||||
#define PMBUS_CMD_PAGE 0x0
|
||||
#define PMBUS_CMD_READ_VOUT 0x8B
|
||||
#define PMBUS_CMD_VOUT_MODE 0x20
|
||||
#define PMBUS_CMD_VOUT_COMMAND 0x21
|
||||
#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
|
||||
|
||||
#if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) || \
|
||||
defined(CONFIG_TARGET_LX2160ARDB)
|
||||
/* Voltage monitor on channel 2*/
|
||||
#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2
|
||||
#define I2C_VOL_MONITOR_BUS_V_OVF 0x1
|
||||
@ -68,5 +70,6 @@ defined(CONFIG_TARGET_LX2160ARDB)
|
||||
#endif
|
||||
|
||||
int adjust_vdd(ulong vdd_override);
|
||||
u16 soc_get_fuse_vid(int vid_index);
|
||||
|
||||
#endif /* __VID_H_ */
|
||||
|
@ -19,9 +19,3 @@ F: configs/P5040DS_NAND_defconfig
|
||||
F: configs/P5040DS_SDCARD_defconfig
|
||||
F: configs/P5040DS_SPIFLASH_defconfig
|
||||
F: configs/P5040DS_SECURE_BOOT_defconfig
|
||||
|
||||
CORENET_DS_SECURE_BOOT BOARD
|
||||
M: Ruchika Gupta <ruchika.gupta@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/P3041DS_NAND_SECURE_BOOT_defconfig
|
||||
F: configs/P5040DS_NAND_SECURE_BOOT_defconfig
|
||||
|
@ -1,5 +1,4 @@
|
||||
LS1012AFRDM BOARD
|
||||
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls1012afrdm/
|
||||
@ -10,12 +9,9 @@ F: configs/ls1012afrwy_tfa_defconfig
|
||||
F: configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
LS1012AFRWY BOARD
|
||||
M: Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
|
||||
M: Pramod Kumar <pramod.kumar_1@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls1012afrwy/
|
||||
F: include/configs/ls1012afrwy.h
|
||||
F: configs/ls1012afrwy_qspi_defconfig
|
||||
|
||||
M: Vinitha V Pillai <vinitha.pillai@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
|
||||
|
@ -1,6 +1,6 @@
|
||||
LS1012AQDS BOARD
|
||||
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
M: Pramod Kumar <pramod.kumar_1@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls1012aqds/
|
||||
F: include/configs/ls1012aqds.h
|
||||
|
@ -1,6 +1,6 @@
|
||||
LS1012ARDB BOARD
|
||||
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
M: Pramod Kumar <pramod.kumar_1@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls1012ardb/
|
||||
F: include/configs/ls1012ardb.h
|
||||
@ -8,13 +8,10 @@ F: configs/ls1012ardb_qspi_defconfig
|
||||
F: configs/ls1012ardb_tfa_defconfig
|
||||
F: configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
|
||||
F: configs/ls1012a2g5rdb_tfa_defconfig
|
||||
|
||||
M: Sumit Garg <sumit.garg@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
|
||||
|
||||
LS1012A2G5RDB BOARD
|
||||
M: Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
|
||||
M: Pramod Kumar <pramod.kumar_1@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls1012ardb/
|
||||
F: include/configs/ls1012a2g5rdb.h
|
||||
|
@ -1,5 +1,5 @@
|
||||
LS1021AIOT BOARD
|
||||
M: Feng Li <feng.li_2@nxp.com>
|
||||
M: Alison Wang <alison.wang@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls1021aiot/
|
||||
F: include/configs/ls1021aiot.h
|
||||
|
@ -9,7 +9,4 @@ F: configs/ls1021atwr_nor_lpuart_defconfig
|
||||
F: configs/ls1021atwr_sdcard_ifc_defconfig
|
||||
F: configs/ls1021atwr_sdcard_qspi_defconfig
|
||||
F: configs/ls1021atwr_qspi_defconfig
|
||||
|
||||
M: Sumit Garg <sumit.garg@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
|
||||
|
@ -1,6 +1,4 @@
|
||||
LS1028AQDS BOARD
|
||||
M: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
|
||||
M: Rai Harninder <harninder.rai@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
M: Tang Yuantian <andy.tang@nxp.com>
|
||||
S: Maintained
|
||||
@ -11,8 +9,6 @@ F: configs/ls1028aqds_tfa_defconfig
|
||||
F: configs/ls1028aqds_tfa_lpuart_defconfig
|
||||
|
||||
LS1028ARDB BOARD
|
||||
M: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
|
||||
M: Rai Harninder <harninder.rai@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
M: Tang Yuantian <andy.tang@nxp.com>
|
||||
S: Maintained
|
||||
|
@ -10,10 +10,6 @@ F: configs/ls1043ardb_nand_defconfig
|
||||
F: configs/ls1043ardb_sdcard_defconfig
|
||||
F: configs/ls1043ardb_tfa_defconfig
|
||||
F: configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
LS1043A_SECURE_BOOT BOARD
|
||||
M: Ruchika Gupta <ruchika.gupta@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1043ardb_SECURE_BOOT_defconfig
|
||||
F: configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
|
||||
F: configs/ls1043ardb_nand_SECURE_BOOT_defconfig
|
||||
|
@ -12,7 +12,4 @@ F: configs/ls1046aqds_qspi_defconfig
|
||||
F: configs/ls1046aqds_lpuart_defconfig
|
||||
F: configs/ls1046aqds_tfa_defconfig
|
||||
F: configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
M: Sumit Garg <sumit.garg@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1046aqds_SECURE_BOOT_defconfig
|
||||
|
@ -11,13 +11,6 @@ F: configs/ls1046ardb_sdcard_defconfig
|
||||
F: configs/ls1046ardb_emmc_defconfig
|
||||
F: configs/ls1046ardb_tfa_defconfig
|
||||
F: configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
LS1046A_SECURE_BOOT BOARD
|
||||
M: Ruchika Gupta <ruchika.gupta@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1046ardb_SECURE_BOOT_defconfig
|
||||
F: configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
|
||||
|
||||
M: Sumit Garg <sumit.garg@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
|
||||
|
@ -1,5 +1,4 @@
|
||||
LS1088ARDB BOARD
|
||||
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
|
||||
M: Ashish Kumar <Ashish.Kumar@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
S: Maintained
|
||||
@ -11,7 +10,6 @@ F: configs/ls1088ardb_tfa_defconfig
|
||||
F: configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
LS1088AQDS BOARD
|
||||
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
|
||||
M: Ashish Kumar <Ashish.Kumar@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
S: Maintained
|
||||
@ -25,17 +23,15 @@ F: configs/ls1088aqds_tfa_defconfig
|
||||
|
||||
LS1088AQDS_QSPI_SECURE_BOOT BOARD
|
||||
M: Udit Agarwal <udit.agarwal@nxp.com>
|
||||
M: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
|
||||
|
||||
LS1088ARDB_QSPI_SECURE_BOOT BOARD
|
||||
M: Udit Agarwal <udit.agarwal@nxp.com>
|
||||
M: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
|
||||
|
||||
LS1088ARDB_SD_SECURE_BOOT BOARD
|
||||
M: Sumit Garg <sumit.garg@nxp.com>
|
||||
M: Udit Agarwal <udit.agarwal@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
|
||||
|
@ -186,6 +186,46 @@ int init_func_vid(void)
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
u16 soc_get_fuse_vid(int vid_index)
|
||||
{
|
||||
static const u16 vdd[32] = {
|
||||
10250,
|
||||
9875,
|
||||
9750,
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
9000,
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
10000, /* 1.0000V */
|
||||
10125,
|
||||
10250,
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
};
|
||||
|
||||
return vdd[vid_index];
|
||||
};
|
||||
#endif
|
||||
|
||||
int is_pb_board(void)
|
||||
|
@ -1,5 +1,5 @@
|
||||
LS2080A BOARD
|
||||
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>, Priyanka Jain <priyanka.jain@nxp.com>
|
||||
M: Priyanka Jain <priyanka.jain@nxp.com>
|
||||
M: Rajesh Bhagat <rajesh.bhagat@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls2080aqds/
|
||||
@ -10,8 +10,4 @@ F: configs/ls2080aqds_nand_defconfig
|
||||
F: configs/ls2080aqds_qspi_defconfig
|
||||
F: configs/ls2080aqds_sdcard_defconfig
|
||||
F: configs/ls2088aqds_tfa_defconfig
|
||||
|
||||
LS2080A_SECURE_BOOT BOARD
|
||||
#M: Saksham Jain <saksham.jain@nxp.freescale.com>
|
||||
S: Orphan (since 2018-05)
|
||||
F: configs/ls2080aqds_SECURE_BOOT_defconfig
|
||||
|
@ -1,5 +1,5 @@
|
||||
LS2080A BOARD
|
||||
M: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>, Priyanka Jain <priyanka.jain@nxp.com>
|
||||
M: Priyanka Jain <priyanka.jain@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/ls2080ardb/
|
||||
F: board/freescale/ls2080a/ls2080ardb.c
|
||||
@ -21,8 +21,8 @@ S: Maintained
|
||||
F: configs/ls2081ardb_defconfig
|
||||
|
||||
LS2080A_SECURE_BOOT BOARD
|
||||
#M: Saksham Jain <saksham.jain@nxp.freescale.com>
|
||||
S: Orphan (since 2018-05)
|
||||
M: Udit Agarwal <udit.agarwal@nxp.com>
|
||||
S: Maintained
|
||||
F: configs/ls2080ardb_SECURE_BOOT_defconfig
|
||||
|
||||
LS2088A_QSPI_SECURE_BOOT BOARD
|
||||
|
@ -43,6 +43,48 @@ enum {
|
||||
MUX_TYPE_DSPI,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_VID
|
||||
u16 soc_get_fuse_vid(int vid_index)
|
||||
{
|
||||
static const u16 vdd[32] = {
|
||||
10500,
|
||||
0, /* reserved */
|
||||
9750,
|
||||
0, /* reserved */
|
||||
9500,
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
9000, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
10000, /* 1.0000V */
|
||||
0, /* reserved */
|
||||
10250,
|
||||
0, /* reserved */
|
||||
10500,
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
};
|
||||
|
||||
return vdd[vid_index];
|
||||
};
|
||||
#endif
|
||||
|
||||
unsigned long long get_qixis_addr(void)
|
||||
{
|
||||
unsigned long long addr;
|
||||
|
@ -16,7 +16,6 @@ F: configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
LX2160AQDS BOARD
|
||||
M: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
|
||||
M: Pankaj Bansal <pankaj.bansal@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/lx2160a/eth_lx2160aqds.h
|
||||
F: include/configs/lx2160aqds.h
|
||||
|
@ -649,6 +649,48 @@ int misc_init_r(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VID
|
||||
u16 soc_get_fuse_vid(int vid_index)
|
||||
{
|
||||
static const u16 vdd[32] = {
|
||||
8250,
|
||||
7875,
|
||||
7750,
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
8000,
|
||||
8125,
|
||||
8250,
|
||||
0, /* reserved */
|
||||
8500,
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
0, /* reserved */
|
||||
};
|
||||
|
||||
return vdd[vid_index];
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FSL_MC_ENET
|
||||
extern int fdt_fixup_board_phy(void *fdt);
|
||||
|
||||
|
@ -1,6 +0,0 @@
|
||||
QEMU-PPCE500 BOARD
|
||||
M: Alexander Graf <agraf@suse.de>
|
||||
S: Maintained
|
||||
F: board/freescale/qemu-ppce500/
|
||||
F: include/configs/qemu-ppce500.h
|
||||
F: configs/qemu-ppce500_defconfig
|
@ -97,6 +97,13 @@ config CMD_ACPI
|
||||
between the firmware and OS, and is particularly useful when you
|
||||
want to make hardware changes without the OS needing to be adjusted.
|
||||
|
||||
config CMD_ADDRMAP
|
||||
bool "addrmap"
|
||||
depends on ADDR_MAP
|
||||
default y
|
||||
help
|
||||
List non-identity virtual-physical memory mappings for 32-bit CPUs.
|
||||
|
||||
config CMD_BDI
|
||||
bool "bdinfo"
|
||||
default y
|
||||
@ -1338,6 +1345,7 @@ config CMD_PVBLOCK
|
||||
config CMD_VIRTIO
|
||||
bool "virtio"
|
||||
depends on VIRTIO
|
||||
depends on HAVE_BLOCK_DEVICE
|
||||
default y if VIRTIO
|
||||
help
|
||||
VirtIO block device support
|
||||
|
@ -13,6 +13,7 @@ obj-y += version.o
|
||||
|
||||
# command
|
||||
obj-$(CONFIG_CMD_ACPI) += acpi.o
|
||||
obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
|
||||
obj-$(CONFIG_CMD_AES) += aes.o
|
||||
obj-$(CONFIG_CMD_AB_SELECT) += ab_select.o
|
||||
obj-$(CONFIG_CMD_ADC) += adc.o
|
||||
|
35
cmd/addrmap.c
Normal file
35
cmd/addrmap.c
Normal file
@ -0,0 +1,35 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <addr_map.h>
|
||||
|
||||
static int do_addrmap(struct cmd_tbl *cmdtp, int flag, int argc,
|
||||
char *const argv[])
|
||||
{
|
||||
int i;
|
||||
|
||||
printf(" vaddr paddr size\n");
|
||||
printf("================ ================ ================\n");
|
||||
|
||||
for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++) {
|
||||
if (address_map[i].size == 0)
|
||||
continue;
|
||||
|
||||
printf("%16.8lx %16.8llx %16.8llx\n",
|
||||
address_map[i].vaddr,
|
||||
(unsigned long long)address_map[i].paddr,
|
||||
(unsigned long long)address_map[i].size);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
addrmap, 1, 1, do_addrmap,
|
||||
"List non-identity virtual-physical memory mappings for 32-bit CPUs",
|
||||
""
|
||||
);
|
@ -626,6 +626,9 @@ static init_fnc_t init_sequence_r[] = {
|
||||
#ifdef CONFIG_DM
|
||||
initr_dm,
|
||||
#endif
|
||||
#ifdef CONFIG_ADDR_MAP
|
||||
initr_addr_map,
|
||||
#endif
|
||||
#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \
|
||||
defined(CONFIG_SANDBOX)
|
||||
board_init, /* Setup chipselects */
|
||||
@ -661,9 +664,6 @@ static init_fnc_t init_sequence_r[] = {
|
||||
initr_manual_reloc_cmdtable,
|
||||
#endif
|
||||
arch_initr_trap,
|
||||
#ifdef CONFIG_ADDR_MAP
|
||||
initr_addr_map,
|
||||
#endif
|
||||
#if defined(CONFIG_BOARD_EARLY_INIT_R)
|
||||
board_early_init_r,
|
||||
#endif
|
||||
|
@ -1668,22 +1668,36 @@ u64 fdt_get_base_address(const void *fdt, int node)
|
||||
}
|
||||
|
||||
/*
|
||||
* Read a property of size <prop_len>. Currently only supports 1 or 2 cells.
|
||||
* Read a property of size <prop_len>. Currently only supports 1 or 2 cells,
|
||||
* or 3 cells specially for a PCI address.
|
||||
*/
|
||||
static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off,
|
||||
uint64_t *val, int cells)
|
||||
{
|
||||
const fdt32_t *prop32 = &prop[cell_off];
|
||||
const unaligned_fdt64_t *prop64 = (const fdt64_t *)&prop[cell_off];
|
||||
const fdt32_t *prop32;
|
||||
const unaligned_fdt64_t *prop64;
|
||||
|
||||
if ((cell_off + cells) > prop_len)
|
||||
return -FDT_ERR_NOSPACE;
|
||||
|
||||
prop32 = &prop[cell_off];
|
||||
|
||||
/*
|
||||
* Special handling for PCI address in PCI bus <ranges>
|
||||
*
|
||||
* PCI child address is made up of 3 cells. Advance the cell offset
|
||||
* by 1 so that the PCI child address can be correctly read.
|
||||
*/
|
||||
if (cells == 3)
|
||||
cell_off += 1;
|
||||
prop64 = (const fdt64_t *)&prop[cell_off];
|
||||
|
||||
switch (cells) {
|
||||
case 1:
|
||||
*val = fdt32_to_cpu(*prop32);
|
||||
break;
|
||||
case 2:
|
||||
case 3:
|
||||
*val = fdt64_to_cpu(*prop64);
|
||||
break;
|
||||
default:
|
||||
|
@ -6,28 +6,47 @@ CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_QEMU_PPCE500=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
CONFIG_LAST_STAGE_INIT=y
|
||||
# CONFIG_MISC_INIT_R is not set
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_REGINFO=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_GREPENV=y
|
||||
CONFIG_CMD_DM=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_POWEROFF=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_PING=y
|
||||
# CONFIG_CMD_HASH is not set
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_DOS_PARTITION=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_OF_BOARD=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_BLK=y
|
||||
CONFIG_HAVE_BLOCK_DEVICE=y
|
||||
CONFIG_MPC8XXX_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_FSL=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_DM_PCI=y
|
||||
CONFIG_PCI_MPC85XX=y
|
||||
CONFIG_DM_RTC=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_SYSRESET=y
|
||||
# CONFIG_SYSRESET_CMD_RESET is not set
|
||||
CONFIG_SYSRESET_CMD_POWEROFF=y
|
||||
CONFIG_POWEROFF_GPIO=y
|
||||
CONFIG_VIRTIO_PCI=y
|
||||
CONFIG_VIRTIO_NET=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
CONFIG_ADDR_MAP=y
|
||||
CONFIG_PANIC_HANG=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
|
@ -8,6 +8,7 @@ Emulation
|
||||
|
||||
qemu-arm
|
||||
qemu-mips
|
||||
qemu-ppce500
|
||||
qemu-riscv
|
||||
qemu-x86
|
||||
qemu_capsule_update
|
||||
|
88
doc/board/emulation/qemu-ppce500.rst
Normal file
88
doc/board/emulation/qemu-ppce500.rst
Normal file
@ -0,0 +1,88 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
.. Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
|
||||
|
||||
QEMU PPC E500
|
||||
=============
|
||||
|
||||
QEMU for PPC supports a special 'ppce500' machine designed for emulation and
|
||||
virtualization purposes. This document describes how to run U-Boot under it.
|
||||
|
||||
The QEMU ppce500 machine models a generic PowerPC E500 virtual machine with
|
||||
support for the VirtIO standard networking device connected to the built-in
|
||||
PCI host controller. Some common devices in the CCSBAR space are modeled,
|
||||
including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller with
|
||||
MSI delivery to MPIC. It uses device-tree to pass configuration information
|
||||
to guest software.
|
||||
|
||||
Building U-Boot
|
||||
---------------
|
||||
Set the CROSS_COMPILE environment variable as usual, and run::
|
||||
|
||||
$ make qemu-ppce500_defconfig
|
||||
$ make
|
||||
|
||||
Running U-Boot
|
||||
--------------
|
||||
The minimal QEMU command line to get U-Boot up and running is::
|
||||
|
||||
$ qemu-system-ppc -nographic -machine ppce500 -bios u-boot
|
||||
|
||||
You can also run U-Boot using 'qemu-system-ppc64'::
|
||||
|
||||
$ qemu-system-ppc64 -nographic -machine ppce500 -bios u-boot
|
||||
|
||||
The commands above create a target with 128 MiB memory by default. A freely
|
||||
configurable amount of RAM can be created via the '-m' parameter. For example,
|
||||
'-m 2G' creates 2 GiB memory for the target, and the memory node in the
|
||||
embedded DTB created by QEMU reflects the new setting.
|
||||
|
||||
Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the following
|
||||
32-bit PowerPC CPUs:
|
||||
|
||||
* e500v2
|
||||
* e500mc
|
||||
|
||||
Additionally qemu-system-ppc64 provides support for the following 64-bit CPUs:
|
||||
|
||||
* e5500
|
||||
* e6500
|
||||
|
||||
The CPU type can be specified via the '-cpu' command line. If not specified,
|
||||
it creates a machine with e500v2 core. The following example shows an e6500
|
||||
based machine creation::
|
||||
|
||||
$ qemu-system-ppc64 -nographic -machine ppce500 -cpu e6500 -bios u-boot
|
||||
|
||||
When U-Boot boots, you will notice the following::
|
||||
|
||||
CPU: Unknown, Version: 0.0, (0x00000000)
|
||||
Core: e6500, Version: 2.0, (0x80400020)
|
||||
|
||||
This is because we only specified a core name to QEMU and it does not have a
|
||||
meaningful SVR value which represents an actual SoC that integrates such core.
|
||||
You can specify a real world SoC device that QEMU has built-in support but all
|
||||
these SoCs are e500v2 based MPC85xx series, hence you cannot test anything
|
||||
built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500).
|
||||
|
||||
By default a VirtIO standard PCI networking device is connected as an ethernet
|
||||
interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by::
|
||||
|
||||
$ qemu-system-ppc -nographic -machine ppce500 -bios u-boot \
|
||||
-nic tap,ifname=tap0,script=no,downscript=no,model=e1000
|
||||
|
||||
VirtIO BLK driver is also enabled to support booting from a disk image where
|
||||
a kernel image is stored. Append the following to QEMU::
|
||||
|
||||
-drive file=disk.img,format=raw,id=disk0 -device virtio-blk-pci,drive=disk0
|
||||
|
||||
Pericom pt7c4338 RTC is supported so we can use the 'date' command::
|
||||
|
||||
=> date
|
||||
Date: 2021-02-18 (Thursday) Time: 15:33:20
|
||||
|
||||
Additionally, 'poweroff' command is supported to shut down the QEMU session::
|
||||
|
||||
=> poweroff
|
||||
poweroff ...
|
||||
|
||||
These have been tested in QEMU 5.2.0.
|
41
doc/usage/addrmap.rst
Normal file
41
doc/usage/addrmap.rst
Normal file
@ -0,0 +1,41 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
addrmap command
|
||||
===============
|
||||
|
||||
Synopsis
|
||||
--------
|
||||
|
||||
::
|
||||
|
||||
addrmap
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
The addrmap command is used to display non-identity virtual-physical memory
|
||||
mappings for 32-bit CPUs.
|
||||
|
||||
The output may look like:
|
||||
|
||||
::
|
||||
|
||||
=> addrmap
|
||||
vaddr paddr size
|
||||
================ ================ ================
|
||||
e0000000 fe0000000 00100000
|
||||
00000000 00000000 04000000
|
||||
04000000 04000000 04000000
|
||||
80000000 c00000000 10000000
|
||||
90000000 c10000000 10000000
|
||||
a0000000 fe1000000 00010000
|
||||
|
||||
The first column indicates the virtual address.
|
||||
The second column indicates the physical address.
|
||||
The third column indicates the mapped size.
|
||||
|
||||
Configuration
|
||||
-------------
|
||||
|
||||
To use the addrmap command you must specify CONFIG_CMD_ADDRMAP=y.
|
||||
It is automatically turned on when CONFIG_ADDR_MAP is set.
|
@ -14,6 +14,7 @@ Shell commands
|
||||
.. toctree::
|
||||
:maxdepth: 1
|
||||
|
||||
addrmap
|
||||
base
|
||||
bootefi
|
||||
booti
|
||||
|
@ -20,7 +20,7 @@ struct mpc8xxx_gpio_data {
|
||||
/* The bank's register base in memory */
|
||||
struct ccsr_gpio __iomem *base;
|
||||
/* The address of the registers; used to identify the bank */
|
||||
ulong addr;
|
||||
phys_addr_t addr;
|
||||
/* The GPIO count of the bank */
|
||||
uint gpio_count;
|
||||
/* The GPDAT register cannot be used to determine the value of output
|
||||
@ -181,7 +181,7 @@ static int mpc8xxx_gpio_of_to_plat(struct udevice *dev)
|
||||
if (dev_read_bool(dev, "little-endian"))
|
||||
data->little_endian = true;
|
||||
|
||||
plat->addr = (ulong)dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size);
|
||||
plat->addr = dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size);
|
||||
plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
|
||||
|
||||
return 0;
|
||||
@ -220,7 +220,8 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)
|
||||
|
||||
mpc8xxx_gpio_plat_to_priv(dev);
|
||||
|
||||
snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
|
||||
snprintf(name, sizeof(name), "MPC@%.8llx",
|
||||
(unsigned long long)data->addr);
|
||||
str = strdup(name);
|
||||
|
||||
if (!str)
|
||||
|
@ -32,6 +32,8 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
#include <asm/io.h>
|
||||
#include <asm/fsl_pci.h>
|
||||
|
||||
#define MAX_PCI_REGIONS 7
|
||||
|
||||
#ifndef CONFIG_SYS_PCI_MEMORY_BUS
|
||||
#define CONFIG_SYS_PCI_MEMORY_BUS 0
|
||||
#endif
|
||||
@ -80,6 +82,9 @@ int fsl_setup_hose(struct pci_controller *hose, unsigned long addr)
|
||||
/* Reset hose to make sure its in a clean state */
|
||||
memset(hose, 0, sizeof(struct pci_controller));
|
||||
|
||||
hose->regions = (struct pci_region *)
|
||||
calloc(1, MAX_PCI_REGIONS * sizeof(struct pci_region));
|
||||
|
||||
pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
|
||||
|
||||
return fsl_is_pci_agent(hose);
|
||||
|
@ -46,6 +46,7 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf,
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FSL_LAW
|
||||
static int
|
||||
mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem,
|
||||
struct pci_region *pre)
|
||||
@ -68,6 +69,7 @@ mpc85xx_pci_dm_setup_laws(struct pci_region *io, struct pci_region *mem,
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int mpc85xx_pci_dm_probe(struct udevice *dev)
|
||||
{
|
||||
@ -85,22 +87,24 @@ static int mpc85xx_pci_dm_probe(struct udevice *dev)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FSL_LAW
|
||||
mpc85xx_pci_dm_setup_laws(io, mem, pre);
|
||||
#endif
|
||||
|
||||
pcix = priv->cfg_addr;
|
||||
/* BAR 1: memory */
|
||||
out_be32(&pcix->potar1, (mem->bus_start >> 12) & 0x000fffff);
|
||||
out_be32(&pcix->potear1, 0);
|
||||
out_be32(&pcix->powbar1, (mem->phys_start >> 12) & 0x000fffff);
|
||||
out_be32(&pcix->powbear1, 0);
|
||||
out_be32(&pcix->potar1, mem->bus_start >> 12);
|
||||
out_be32(&pcix->potear1, (u64)mem->bus_start >> 44);
|
||||
out_be32(&pcix->powbar1, mem->phys_start >> 12);
|
||||
out_be32(&pcix->powbear1, (u64)mem->phys_start >> 44);
|
||||
out_be32(&pcix->powar1, (POWAR_EN | POWAR_MEM_READ |
|
||||
POWAR_MEM_WRITE | (__ilog2(mem->size) - 1)));
|
||||
|
||||
/* BAR 1: IO */
|
||||
out_be32(&pcix->potar2, (io->bus_start >> 12) & 0x000fffff);
|
||||
out_be32(&pcix->potear2, 0);
|
||||
out_be32(&pcix->powbar2, (io->phys_start >> 12) & 0x000fffff);
|
||||
out_be32(&pcix->powbear2, 0);
|
||||
out_be32(&pcix->potar2, io->bus_start >> 12);
|
||||
out_be32(&pcix->potear2, (u64)io->bus_start >> 44);
|
||||
out_be32(&pcix->powbar2, io->phys_start >> 12);
|
||||
out_be32(&pcix->powbear2, (u64)io->phys_start >> 44);
|
||||
out_be32(&pcix->powar2, (POWAR_EN | POWAR_IO_READ |
|
||||
POWAR_IO_WRITE | (__ilog2(io->size) - 1)));
|
||||
|
||||
@ -130,9 +134,8 @@ static int mpc85xx_pci_of_to_plat(struct udevice *dev)
|
||||
addr = devfdt_get_addr_index(dev, 0);
|
||||
if (addr == FDT_ADDR_T_NONE)
|
||||
return -EINVAL;
|
||||
priv->cfg_addr = (void __iomem *)addr;
|
||||
addr += 4;
|
||||
priv->cfg_data = (void __iomem *)addr;
|
||||
priv->cfg_addr = (void __iomem *)map_physmem(addr, 0, MAP_NOCACHE);
|
||||
priv->cfg_data = (void __iomem *)((ulong)priv->cfg_addr + 4);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -33,6 +33,12 @@ config TPL_SYSRESET
|
||||
|
||||
if SYSRESET
|
||||
|
||||
config SYSRESET_CMD_RESET
|
||||
bool "sysreset implementation of the reset command"
|
||||
default y
|
||||
help
|
||||
Enable sysreset implementation of the reset command.
|
||||
|
||||
if CMD_POWEROFF
|
||||
|
||||
config SYSRESET_CMD_POWEROFF
|
||||
|
@ -119,6 +119,7 @@ void reset_cpu(ulong addr)
|
||||
}
|
||||
|
||||
|
||||
#if IS_ENABLED(CONFIG_SYSRESET_CMD_RESET)
|
||||
int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
|
||||
{
|
||||
printf("resetting ...\n");
|
||||
@ -128,6 +129,7 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
|
||||
int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
|
||||
|
@ -55,6 +55,7 @@ config VIRTIO_NET
|
||||
config VIRTIO_BLK
|
||||
bool "virtio block driver"
|
||||
depends on VIRTIO
|
||||
depends on BLK
|
||||
help
|
||||
This is the virtual block driver for virtio. It can be used with
|
||||
QEMU based targets.
|
||||
|
@ -8,9 +8,17 @@
|
||||
|
||||
#include <asm/types.h>
|
||||
|
||||
extern phys_addr_t addrmap_virt_to_phys(void *vaddr);
|
||||
extern void *addrmap_phys_to_virt(phys_addr_t paddr);
|
||||
extern void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr,
|
||||
phys_size_t size, int idx);
|
||||
struct addrmap {
|
||||
phys_addr_t paddr;
|
||||
phys_size_t size;
|
||||
unsigned long vaddr;
|
||||
};
|
||||
|
||||
extern struct addrmap address_map[CONFIG_SYS_NUM_ADDR_MAP];
|
||||
|
||||
phys_addr_t addrmap_virt_to_phys(void *vaddr);
|
||||
void *addrmap_phys_to_virt(phys_addr_t paddr);
|
||||
void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr,
|
||||
phys_size_t size, int idx);
|
||||
|
||||
#endif
|
||||
|
@ -18,8 +18,6 @@
|
||||
#define CONFIG_PCI_INDIRECT_BRIDGE
|
||||
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
|
||||
|
||||
#define CONFIG_FSL_VIA
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned long get_clock_freq(void);
|
||||
#endif
|
||||
|
@ -23,8 +23,6 @@
|
||||
|
||||
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
|
||||
|
||||
#define CONFIG_FSL_VIA
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <linux/stringify.h>
|
||||
extern unsigned long get_clock_freq(void);
|
||||
|
@ -18,8 +18,6 @@
|
||||
#define CONFIG_PCI_INDIRECT_BRIDGE
|
||||
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
|
||||
|
||||
#define CONFIG_FSL_VIA
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
extern unsigned long get_clock_freq(void);
|
||||
#endif
|
||||
|
@ -326,12 +326,6 @@ unsigned long get_board_ddr_clk(void);
|
||||
#define CONFIG_VOL_MONITOR_LTC3882_SET
|
||||
#define CONFIG_VOL_MONITOR_LTC3882_READ
|
||||
|
||||
/* PM Bus commands code for LTC3882*/
|
||||
#define PMBUS_CMD_PAGE 0x0
|
||||
#define PMBUS_CMD_READ_VOUT 0x8B
|
||||
#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
|
||||
#define PMBUS_CMD_VOUT_COMMAND 0x21
|
||||
|
||||
#define PWM_CHANNEL0 0x0
|
||||
|
||||
/*
|
||||
|
@ -203,7 +203,7 @@
|
||||
|
||||
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
|
||||
|
||||
#define I2C_MUX_CH_VOL_MONITOR 0xA
|
||||
#define I2C_MUX_CH_VOL_MONITOR 0xA
|
||||
/* Voltage monitor on channel 2*/
|
||||
#define I2C_VOL_MONITOR_ADDR 0x63
|
||||
#define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2
|
||||
@ -221,12 +221,6 @@
|
||||
#define CONFIG_VOL_MONITOR_LTC3882_SET
|
||||
#define CONFIG_VOL_MONITOR_LTC3882_READ
|
||||
|
||||
/* PM Bus commands code for LTC3882*/
|
||||
#define PMBUS_CMD_PAGE 0x0
|
||||
#define PMBUS_CMD_READ_VOUT 0x8B
|
||||
#define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
|
||||
#define PMBUS_CMD_VOUT_COMMAND 0x21
|
||||
|
||||
#define PWM_CHANNEL0 0x0
|
||||
|
||||
/*
|
||||
|
@ -13,8 +13,6 @@
|
||||
|
||||
#define CONFIG_SYS_RAMBOOT
|
||||
|
||||
#define CONFIG_PCI1 1 /* PCI controller 1 */
|
||||
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
|
||||
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
|
||||
|
||||
#define CONFIG_ENABLE_36BIT_PHYS
|
||||
@ -35,7 +33,7 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
|
||||
|
||||
/* Virtual address range for PCI region maps */
|
||||
#define CONFIG_SYS_PCI_MAP_START 0x80000000
|
||||
#define CONFIG_SYS_PCI_MAP_END 0xe8000000
|
||||
#define CONFIG_SYS_PCI_MAP_END 0xe0000000
|
||||
|
||||
/* Virtual address to a temporary map if we need it (max 128MB) */
|
||||
#define CONFIG_SYS_TMPVIRT 0xe8000000
|
||||
@ -73,29 +71,11 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
|
||||
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
|
||||
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
|
||||
|
||||
#define CONFIG_SYS_NS16550_SERIAL
|
||||
#define CONFIG_SYS_NS16550_REG_SIZE 1
|
||||
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
|
||||
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE \
|
||||
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
|
||||
|
||||
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
|
||||
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
|
||||
|
||||
/*
|
||||
* General PCI
|
||||
* Memory space is mapped 1-1, but I/O space must start from 0.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
#define CONFIG_PCI_INDIRECT_BRIDGE
|
||||
|
||||
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
#define CONFIG_LBA48
|
||||
|
||||
/* RTC */
|
||||
#define CONFIG_RTC_PT7C4338
|
||||
|
||||
/*
|
||||
* Environment
|
||||
*/
|
||||
@ -126,6 +106,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
|
||||
#define CONFIG_LOADADDR 1000000
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
|
||||
"test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr\0"
|
||||
|
||||
#endif /* __QEMU_PPCE500_H */
|
||||
|
@ -26,6 +26,8 @@ int cmd_ut_category(const char *name, const char *prefix,
|
||||
struct unit_test *tests, int n_ents,
|
||||
int argc, char *const argv[]);
|
||||
|
||||
int do_ut_addrmap(struct cmd_tbl *cmdtp, int flag, int argc,
|
||||
char *const argv[]);
|
||||
int do_ut_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
|
||||
int do_ut_bloblist(struct cmd_tbl *cmdtp, int flag, int argc,
|
||||
char *const argv[]);
|
||||
|
@ -6,6 +6,8 @@ config ADDR_MAP
|
||||
Enables helper code for implementing non-identity virtual-physical
|
||||
memory mappings for 32bit CPUs.
|
||||
|
||||
This library only works in the post-relocation phase.
|
||||
|
||||
config SYS_NUM_ADDR_MAP
|
||||
int "Size of the address-map table"
|
||||
depends on ADDR_MAP
|
||||
|
@ -6,11 +6,7 @@
|
||||
#include <common.h>
|
||||
#include <addr_map.h>
|
||||
|
||||
static struct {
|
||||
phys_addr_t paddr;
|
||||
phys_size_t size;
|
||||
unsigned long vaddr;
|
||||
} address_map[CONFIG_SYS_NUM_ADDR_MAP];
|
||||
struct addrmap address_map[CONFIG_SYS_NUM_ADDR_MAP];
|
||||
|
||||
phys_addr_t addrmap_virt_to_phys(void * vaddr)
|
||||
{
|
||||
|
@ -28,8 +28,8 @@ int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom)
|
||||
{
|
||||
struct dsa_priv *priv;
|
||||
|
||||
if (!dev || !dev_get_uclass_priv(dev))
|
||||
return -ENODEV;
|
||||
if (!dev)
|
||||
return -EINVAL;
|
||||
|
||||
if (headroom + tailroom > DSA_MAX_OVR)
|
||||
return -EINVAL;
|
||||
@ -47,11 +47,13 @@ int dsa_set_tagging(struct udevice *dev, ushort headroom, ushort tailroom)
|
||||
/* returns the DSA master Ethernet device */
|
||||
struct udevice *dsa_get_master(struct udevice *dev)
|
||||
{
|
||||
struct dsa_priv *priv = dev_get_uclass_priv(dev);
|
||||
struct dsa_priv *priv;
|
||||
|
||||
if (!priv)
|
||||
if (!dev)
|
||||
return NULL;
|
||||
|
||||
priv = dev_get_uclass_priv(dev);
|
||||
|
||||
return priv->master_dev;
|
||||
}
|
||||
|
||||
@ -67,14 +69,6 @@ static int dsa_port_start(struct udevice *pdev)
|
||||
struct dsa_ops *ops = dsa_get_ops(dev);
|
||||
int err;
|
||||
|
||||
if (!priv)
|
||||
return -ENODEV;
|
||||
|
||||
if (!master) {
|
||||
dev_err(pdev, "DSA master Ethernet device not found!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (ops->port_enable) {
|
||||
struct dsa_port_pdata *port_pdata;
|
||||
|
||||
@ -101,9 +95,6 @@ static void dsa_port_stop(struct udevice *pdev)
|
||||
struct udevice *master = dsa_get_master(dev);
|
||||
struct dsa_ops *ops = dsa_get_ops(dev);
|
||||
|
||||
if (!priv)
|
||||
return;
|
||||
|
||||
if (ops->port_disable) {
|
||||
struct dsa_port_pdata *port_pdata;
|
||||
|
||||
@ -112,13 +103,7 @@ static void dsa_port_stop(struct udevice *pdev)
|
||||
ops->port_disable(dev, priv->cpu_port, NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
* stop master only if it's active, don't probe it otherwise.
|
||||
* Under normal usage it would be active because we're using it, but
|
||||
* during tear-down it may have been removed ahead of us.
|
||||
*/
|
||||
if (master && device_active(master))
|
||||
eth_get_ops(master)->stop(master);
|
||||
eth_get_ops(master)->stop(master);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -137,9 +122,6 @@ static int dsa_port_send(struct udevice *pdev, void *packet, int length)
|
||||
struct dsa_port_pdata *port_pdata;
|
||||
int err;
|
||||
|
||||
if (!master)
|
||||
return -EINVAL;
|
||||
|
||||
if (length + head + tail > PKTSIZE_ALIGN)
|
||||
return -EINVAL;
|
||||
|
||||
@ -169,9 +151,6 @@ static int dsa_port_recv(struct udevice *pdev, int flags, uchar **packetp)
|
||||
struct dsa_port_pdata *port_pdata;
|
||||
int length, port_index, err;
|
||||
|
||||
if (!master)
|
||||
return -EINVAL;
|
||||
|
||||
length = eth_get_ops(master)->recv(master, flags, packetp);
|
||||
if (length <= 0)
|
||||
return length;
|
||||
@ -205,9 +184,6 @@ static int dsa_port_free_pkt(struct udevice *pdev, uchar *packet, int length)
|
||||
struct udevice *master = dsa_get_master(dev);
|
||||
struct dsa_priv *priv;
|
||||
|
||||
if (!master)
|
||||
return -EINVAL;
|
||||
|
||||
priv = dev_get_uclass_priv(dev);
|
||||
if (eth_get_ops(master)->free_pkt) {
|
||||
/* return the original pointer and length to master Eth */
|
||||
@ -272,6 +248,7 @@ static int dsa_port_probe(struct udevice *pdev)
|
||||
struct dsa_port_pdata *port_pdata;
|
||||
struct dsa_priv *dsa_priv;
|
||||
struct udevice *master;
|
||||
int ret;
|
||||
|
||||
port_pdata = dev_get_parent_plat(pdev);
|
||||
dsa_priv = dev_get_uclass_priv(dev);
|
||||
@ -280,6 +257,21 @@ static int dsa_port_probe(struct udevice *pdev)
|
||||
if (!port_pdata->phy)
|
||||
return -ENODEV;
|
||||
|
||||
master = dsa_get_master(dev);
|
||||
if (!master)
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* Probe the master device. We depend on the master device for proper
|
||||
* operation and we also need it for MAC inheritance below.
|
||||
*
|
||||
* TODO: we assume the master device is always there and doesn't get
|
||||
* removed during runtime.
|
||||
*/
|
||||
ret = device_probe(master);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Inherit port's hwaddr from the DSA master, unless the port already
|
||||
* has a unique MAC address specified in the environment.
|
||||
@ -288,10 +280,6 @@ static int dsa_port_probe(struct udevice *pdev)
|
||||
if (!is_zero_ethaddr(env_enetaddr))
|
||||
return 0;
|
||||
|
||||
master = dsa_get_master(dev);
|
||||
if (!master)
|
||||
return 0;
|
||||
|
||||
master_pdata = dev_get_plat(master);
|
||||
eth_pdata = dev_get_plat(pdev);
|
||||
memcpy(eth_pdata->enetaddr, master_pdata->enetaddr, ARP_HLEN);
|
||||
@ -338,7 +326,7 @@ static int dsa_post_bind(struct udevice *dev)
|
||||
ofnode node = dev_ofnode(dev), pnode;
|
||||
int i, err, first_err = 0;
|
||||
|
||||
if (!pdata || !ofnode_valid(node))
|
||||
if (!ofnode_valid(node))
|
||||
return -ENODEV;
|
||||
|
||||
pdata->master_node = ofnode_null();
|
||||
@ -450,9 +438,6 @@ static int dsa_pre_probe(struct udevice *dev)
|
||||
struct dsa_pdata *pdata = dev_get_uclass_plat(dev);
|
||||
struct dsa_priv *priv = dev_get_uclass_priv(dev);
|
||||
|
||||
if (!pdata || !priv)
|
||||
return -ENODEV;
|
||||
|
||||
priv->num_ports = pdata->num_ports;
|
||||
priv->cpu_port = pdata->cpu_port;
|
||||
priv->cpu_port_fixed_phy = fixed_phy_create(pdata->cpu_port_node);
|
||||
|
@ -551,7 +551,6 @@ CONFIG_FSL_SERDES2
|
||||
CONFIG_FSL_SGMII_RISER
|
||||
CONFIG_FSL_TBCLK_EXTRA_DIV
|
||||
CONFIG_FSL_TRUST_ARCH_v1
|
||||
CONFIG_FSL_VIA
|
||||
CONFIG_FSMC_NAND_BASE
|
||||
CONFIG_FSMTDBLK
|
||||
CONFIG_FSNOTIFY
|
||||
@ -2251,8 +2250,6 @@ CONFIG_SYS_FSL_AIOP1_SIZE
|
||||
CONFIG_SYS_FSL_B4860QDS_XFI_ERR
|
||||
CONFIG_SYS_FSL_BMAN_ADDR
|
||||
CONFIG_SYS_FSL_BMAN_OFFSET
|
||||
CONFIG_SYS_FSL_BOOTROM_BASE
|
||||
CONFIG_SYS_FSL_BOOTROM_SIZE
|
||||
CONFIG_SYS_FSL_CCSR_BASE
|
||||
CONFIG_SYS_FSL_CCSR_GUR_BE
|
||||
CONFIG_SYS_FSL_CCSR_GUR_LE
|
||||
|
@ -6,6 +6,7 @@ ifdef CONFIG_HUSH_PARSER
|
||||
obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
|
||||
endif
|
||||
obj-y += mem.o
|
||||
obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
|
||||
obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
|
||||
obj-$(CONFIG_CMD_PWM) += pwm.o
|
||||
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
|
||||
|
38
test/cmd/addrmap.c
Normal file
38
test/cmd/addrmap.c
Normal file
@ -0,0 +1,38 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Tests for addrmap command
|
||||
*
|
||||
* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <console.h>
|
||||
#include <test/suites.h>
|
||||
#include <test/ut.h>
|
||||
|
||||
/* Declare a new addrmap test */
|
||||
#define ADDRMAP_TEST(_name, _flags) UNIT_TEST(_name, _flags, addrmap_test)
|
||||
|
||||
/* Test 'addrmap' command output */
|
||||
static int addrmap_test_basic(struct unit_test_state *uts)
|
||||
{
|
||||
ut_assertok(console_record_reset_enable());
|
||||
ut_assertok(run_command("addrmap", 0));
|
||||
ut_assert_nextline(" vaddr paddr size");
|
||||
ut_assert_nextline("================ ================ ================");
|
||||
/* There should be at least one entry */
|
||||
ut_assertok(!ut_check_console_end(uts));
|
||||
|
||||
return 0;
|
||||
}
|
||||
ADDRMAP_TEST(addrmap_test_basic, UT_TESTF_CONSOLE_REC);
|
||||
|
||||
int do_ut_addrmap(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
|
||||
{
|
||||
struct unit_test *tests = ll_entry_start(struct unit_test,
|
||||
addrmap_test);
|
||||
const int n_ents = ll_entry_count(struct unit_test, addrmap_test);
|
||||
|
||||
return cmd_ut_category("cmd_addrmap", "cmd_addrmap_", tests, n_ents,
|
||||
argc, argv);
|
||||
}
|
@ -93,6 +93,9 @@ static struct cmd_tbl cmd_ut_sub[] = {
|
||||
U_BOOT_CMD_MKENT(bootm, CONFIG_SYS_MAXARGS, 1, do_ut_bootm, "", ""),
|
||||
#endif
|
||||
U_BOOT_CMD_MKENT(str, CONFIG_SYS_MAXARGS, 1, do_ut_str, "", ""),
|
||||
#ifdef CONFIG_CMD_ADDRMAP
|
||||
U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""),
|
||||
#endif
|
||||
};
|
||||
|
||||
static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc,
|
||||
@ -167,6 +170,9 @@ static char ut_help_text[] =
|
||||
#if defined(CONFIG_UT_UNICODE) && \
|
||||
!defined(CONFIG_SPL_BUILD) && !defined(API_BUILD)
|
||||
"ut unicode [test-name] - test Unicode functions\n"
|
||||
#endif
|
||||
#ifdef CONFIG_CMD_ADDRMAP
|
||||
"ut addrmap - Very basic test of addrmap command\n"
|
||||
#endif
|
||||
;
|
||||
#endif /* CONFIG_SYS_LONGHELP */
|
||||
|
Loading…
Reference in New Issue
Block a user