IPL: Remove remains of OneNAND IPL
After removing the Apollon board, remove the OneNAND IPL too. There are no users for it any more. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Minkyu Kang <promsoft@gmail.com> Cc: Tom Rini <trini@ti.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
parent
be7e41efda
commit
e4a189acfe
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@ -75,10 +75,5 @@ cscope.*
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/ctags
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/ctags
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/etags
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/etags
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# OneNAND IPL files
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/onenand_ipl/onenand-ipl*
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/onenand_ipl/board/*/onenand*
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/onenand_ipl/board/*/*.S
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# spl ais files
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# spl ais files
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/spl/*.ais
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/spl/*.ais
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10
Makefile
10
Makefile
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@ -378,7 +378,6 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
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ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
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ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
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ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
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ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
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ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
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ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
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ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
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ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
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ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
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@ -550,12 +549,6 @@ nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
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$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
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$(obj)u-boot-nand.bin: nand_spl $(obj)u-boot.bin
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cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
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cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
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onenand_ipl: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
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$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
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$(obj)u-boot-onenand.bin: onenand_ipl $(obj)u-boot.bin
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cat $(ONENAND_BIN) $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
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$(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
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$(obj)spl/u-boot-spl.bin: $(SUBDIR_TOOLS) depend
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$(MAKE) -C spl all
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$(MAKE) -C spl all
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@ -790,9 +783,7 @@ clean:
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@rm -f $(obj)include/generated/asm-offsets.h
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@rm -f $(obj)include/generated/asm-offsets.h
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@rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
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@rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s
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@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map,System.map}
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@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map,System.map}
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@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
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@rm -f $(ONENAND_BIN)
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@rm -f $(ONENAND_BIN)
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@rm -f $(obj)onenand_ipl/u-boot.lds
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@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.lds,u-boot-spl.map}
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@rm -f $(obj)spl/{u-boot-spl,u-boot-spl.bin,u-boot-spl.lds,u-boot-spl.map}
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@rm -f $(obj)MLO
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@rm -f $(obj)MLO
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@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
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@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
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@ -825,7 +816,6 @@ clobber: tidy
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@rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
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@rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
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@rm -fr $(obj)include/generated
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@rm -fr $(obj)include/generated
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@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
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@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
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@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
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@rm -f $(obj)dts/*.tmp
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@rm -f $(obj)dts/*.tmp
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@rm -f $(obj)spl/u-boot-spl{,-pad}.ais
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@rm -f $(obj)spl/u-boot-spl{,-pad}.ais
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@ -79,11 +79,7 @@ skip_check_didle:
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str r1, [r0, #0x0] @ GPIO_CON_OFFSET
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str r1, [r0, #0x0] @ GPIO_CON_OFFSET
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ldr r1, [r0, #0x4] @ GPIO_DAT_OFFSET
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ldr r1, [r0, #0x4] @ GPIO_DAT_OFFSET
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#ifdef CONFIG_ONENAND_IPL
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orr r1, r1, #(1 << 1) @ 1 * 1-bit
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#else
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bic r1, r1, #(1 << 1)
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bic r1, r1, #(1 << 1)
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#endif
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str r1, [r0, #0x4] @ GPIO_DAT_OFFSET
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str r1, [r0, #0x4] @ GPIO_DAT_OFFSET
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/* Don't setup at s5pc100 */
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/* Don't setup at s5pc100 */
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@ -182,7 +178,6 @@ skip_check_didle:
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/* Do not release retention here for S5PC110 */
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/* Do not release retention here for S5PC110 */
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streq r1, [r0]
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streq r1, [r0]
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#ifndef CONFIG_ONENAND_IPL
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/* Disable Watchdog */
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/* Disable Watchdog */
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ldreq r0, =S5PC100_WATCHDOG_BASE @ 0xEA200000
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ldreq r0, =S5PC100_WATCHDOG_BASE @ 0xEA200000
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ldrne r0, =S5PC110_WATCHDOG_BASE @ 0xE2700000
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ldrne r0, =S5PC110_WATCHDOG_BASE @ 0xE2700000
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@ -193,7 +188,6 @@ skip_check_didle:
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ldrne r0, =S5PC110_SROMC_BASE
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ldrne r0, =S5PC110_SROMC_BASE
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ldr r1, =0x9
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ldr r1, =0x9
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str r1, [r0]
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str r1, [r0]
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#endif
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/* S5PC100 has 3 groups of interrupt sources */
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/* S5PC100 has 3 groups of interrupt sources */
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ldreq r0, =S5PC100_VIC0_BASE @ 0xE4000000
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ldreq r0, =S5PC100_VIC0_BASE @ 0xE4000000
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@ -207,7 +201,6 @@ skip_check_didle:
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str r3, [r1, #0x14] @ INTENCLEAR
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str r3, [r1, #0x14] @ INTENCLEAR
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str r3, [r2, #0x14] @ INTENCLEAR
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str r3, [r2, #0x14] @ INTENCLEAR
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#ifndef CONFIG_ONENAND_IPL
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/* Set all interrupts as IRQ */
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/* Set all interrupts as IRQ */
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str r5, [r0, #0xc] @ INTSELECT
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str r5, [r0, #0xc] @ INTSELECT
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str r5, [r1, #0xc] @ INTSELECT
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str r5, [r1, #0xc] @ INTSELECT
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@ -217,120 +210,12 @@ skip_check_didle:
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str r5, [r0, #0xf00] @ INTADDRESS
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str r5, [r0, #0xf00] @ INTADDRESS
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str r5, [r1, #0xf00] @ INTADDRESS
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str r5, [r1, #0xf00] @ INTADDRESS
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str r5, [r2, #0xf00] @ INTADDRESS
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str r5, [r2, #0xf00] @ INTADDRESS
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#endif
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#ifndef CONFIG_ONENAND_IPL
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/* for UART */
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/* for UART */
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bl uart_asm_init
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bl uart_asm_init
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bl internal_ram_init
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bl internal_ram_init
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#endif
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#ifdef CONFIG_ONENAND_IPL
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/* init system clock */
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bl system_clock_init
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/* OneNAND Sync Read Support at S5PC110 only
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* RM[15] : Sync Read
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* BRWL[14:12] : 7 CLK
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* BL[11:9] : Continuous
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* VHF[3] : Very High Frequency Enable (Over 83MHz)
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* HF[2] : High Frequency Enable (Over 66MHz)
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* WM[1] : Sync Write
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*/
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cmp r7, r8
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ldrne r1, =0xE006
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ldrne r0, =0xB001E442
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strneh r1, [r0]
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/*
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* GCE[26] : Gated Clock Enable
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* RPE[17] : Enables Read Prefetch
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*/
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ldrne r1, =((1 << 26) | (1 << 17) | 0xE006)
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ldrne r0, =0xB0600000
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strne r1, [r0, #0x100] @ ONENAND_IF_CTRL
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ldrne r1, =0x1212
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strne r1, [r0, #0x108]
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/* Board detection to set proper memory configuration */
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cmp r7, r8
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moveq r9, #1 /* r9 has 1Gib default at s5pc100 */
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movne r9, #2 /* r9 has 2Gib default at s5pc110 */
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ldr r2, =0xE0200200
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ldr r4, [r2, #0x48]
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bic r1, r4, #(0x3F << 4) /* PULLUP_DISABLE: 3 * 2-bit */
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bic r1, r1, #(0x3 << 2) /* PULLUP_DISABLE: 2 * 2-bit */
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bic r1, r1, #(0x3 << 14) /* PULLUP_DISABLE: 2 * 2-bit */
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str r1, [r2, #0x48]
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/* For write completion */
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nop
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nop
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ldr r3, [r2, #0x44]
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and r1, r3, #(0x7 << 2)
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mov r1, r1, lsr #2
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cmp r1, #0x5
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moveq r9, #3
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cmp r1, #0x6
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moveq r9, #1
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cmp r1, #0x7
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moveq r9, #2
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and r0, r3, #(0x1 << 1)
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mov r0, r0, lsr #1
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orr r1, r1, r0, lsl #3
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cmp r1, #0x8
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moveq r9, #3
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and r1, r3, #(0x7 << 2)
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mov r1, r1, lsr #2
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and r0, r3, #(0x1 << 7)
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mov r0, r0, lsr #7
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orr r1, r1, r0, lsl #3
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cmp r1, #0x9
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moveq r9, #3
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str r4, [r2, #0x48] /* Restore PULLUP configuration */
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bl mem_ctrl_asm_init
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/* Wakeup support. Don't know if it's going to be used, untested. */
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ldreq r0, =S5PC100_RST_STAT
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ldrne r0, =S5PC110_RST_STAT
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ldr r1, [r0]
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biceq r1, r1, #0xfffffff7
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moveq r2, #(1 << 3)
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bicne r1, r1, #0xfffeffff
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movne r2, #(1 << 16)
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cmp r1, r2
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bne 1f
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wakeup:
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/* turn off L2 cache */
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bl l2_cache_disable
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cmp r7, r8
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ldreq r0, =0xC100
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ldrne r0, =0xC110
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/* invalidate L2 cache also */
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bl invalidate_dcache
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/* turn on L2 cache */
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bl l2_cache_enable
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cmp r7, r8
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/* Load return address and jump to kernel */
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ldreq r0, =S5PC100_INFORM0
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ldrne r0, =S5PC110_INFORM0
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/* r1 = physical address of s5pc1xx_cpu_resume function */
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ldr r1, [r0]
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/* Jump to kernel (sleep-s5pc1xx.S) */
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mov pc, r1
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nop
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nop
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#else
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cmp r7, r8
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cmp r7, r8
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/* Clear wakeup status register */
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/* Clear wakeup status register */
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ldreq r0, =S5PC100_WAKEUP_STAT
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ldreq r0, =S5PC100_WAKEUP_STAT
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@ -347,7 +232,6 @@ wakeup:
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orr r1, r1, r2
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orr r1, r1, r2
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str r1, [r0]
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str r1, [r0]
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#endif
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b 1f
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b 1f
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didle_wakeup:
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didle_wakeup:
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@ -517,7 +401,6 @@ system_clock_init:
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mov pc, lr
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mov pc, lr
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#ifndef CONFIG_ONENAND_IPL
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internal_ram_init:
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internal_ram_init:
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ldreq r0, =0xE3800000
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ldreq r0, =0xE3800000
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ldrne r0, =0xF1500000
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ldrne r0, =0xF1500000
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@ -525,9 +408,7 @@ internal_ram_init:
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str r1, [r0]
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str r1, [r0]
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mov pc, lr
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mov pc, lr
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#endif
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#ifndef CONFIG_ONENAND_IPL
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/*
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/*
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* uart_asm_init: Initialize UART's pins
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* uart_asm_init: Initialize UART's pins
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*/
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*/
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str r1, [r0, #0x4] @ S5PC1XX_GPIO_DAT_OFFSET
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str r1, [r0, #0x4] @ S5PC1XX_GPIO_DAT_OFFSET
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200:
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200:
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mov pc, lr
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mov pc, lr
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#endif
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orr r0, r0, #0x0
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orr r0, r0, #0x0
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str r5, [r0]
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str r5, [r0]
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#ifndef CONFIG_ONENAND_IPL
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/* setting SRAM */
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/* setting SRAM */
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ldr r0, =S5PC100_SROMC_BASE
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ldr r0, =S5PC100_SROMC_BASE
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ldr r1, =0x9
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ldr r1, =0x9
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str r1, [r0]
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str r1, [r0]
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#endif
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/* S5PC100 has 3 groups of interrupt sources */
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/* S5PC100 has 3 groups of interrupt sources */
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ldr r0, =S5PC100_VIC0_BASE @0xE4000000
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ldr r0, =S5PC100_VIC0_BASE @0xE4000000
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@ -68,7 +66,6 @@ lowlevel_init:
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str r3, [r1, #0x14] @INTENCLEAR
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str r3, [r1, #0x14] @INTENCLEAR
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str r3, [r2, #0x14] @INTENCLEAR
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str r3, [r2, #0x14] @INTENCLEAR
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#ifndef CONFIG_ONENAND_IPL
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/* Set all interrupts as IRQ */
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/* Set all interrupts as IRQ */
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str r5, [r0, #0xc] @INTSELECT
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str r5, [r0, #0xc] @INTSELECT
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str r5, [r1, #0xc] @INTSELECT
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str r5, [r1, #0xc] @INTSELECT
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@ -78,54 +75,17 @@ lowlevel_init:
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str r5, [r0, #0xf00] @INTADDRESS
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str r5, [r0, #0xf00] @INTADDRESS
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str r5, [r1, #0xf00] @INTADDRESS
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str r5, [r1, #0xf00] @INTADDRESS
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str r5, [r2, #0xf00] @INTADDRESS
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str r5, [r2, #0xf00] @INTADDRESS
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#endif
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#ifndef CONFIG_ONENAND_IPL
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/* for UART */
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/* for UART */
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bl uart_asm_init
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bl uart_asm_init
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/* for TZPC */
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/* for TZPC */
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bl tzpc_asm_init
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bl tzpc_asm_init
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#endif
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#ifdef CONFIG_ONENAND_IPL
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/* init system clock */
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bl system_clock_init
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bl mem_ctrl_asm_init
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/* Wakeup support. Don't know if it's going to be used, untested. */
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ldr r0, =S5PC100_RST_STAT
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ldr r1, [r0]
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bic r1, r1, #0xfffffff7
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cmp r1, #0x8
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beq wakeup_reset
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||||||
#endif
|
|
||||||
|
|
||||||
1:
|
1:
|
||||||
mov lr, r9
|
mov lr, r9
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
#ifdef CONFIG_ONENAND_IPL
|
|
||||||
wakeup_reset:
|
|
||||||
|
|
||||||
/* Clear wakeup status register */
|
|
||||||
ldr r0, =S5PC100_WAKEUP_STAT
|
|
||||||
ldr r1, [r0]
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/* Load return address and jump to kernel */
|
|
||||||
ldr r0, =S5PC100_INFORM0
|
|
||||||
|
|
||||||
/* r1 = physical address of s5pc100_cpu_resume function */
|
|
||||||
ldr r1, [r0]
|
|
||||||
|
|
||||||
/* Jump to kernel (sleep.S) */
|
|
||||||
mov pc, r1
|
|
||||||
nop
|
|
||||||
nop
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* system_clock_init: Initialize core clock and bus clock.
|
* system_clock_init: Initialize core clock and bus clock.
|
||||||
* void system_clock_init(void)
|
* void system_clock_init(void)
|
||||||
|
@ -178,7 +138,6 @@ system_clock_init:
|
||||||
|
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
#ifndef CONFIG_ONENAND_IPL
|
|
||||||
/*
|
/*
|
||||||
* uart_asm_init: Initialize UART's pins
|
* uart_asm_init: Initialize UART's pins
|
||||||
*/
|
*/
|
||||||
|
@ -212,4 +171,3 @@ tzpc_asm_init:
|
||||||
str r1, [r0, #0x810]
|
str r1, [r0, #0x810]
|
||||||
|
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
#endif
|
|
||||||
|
|
|
@ -1,48 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2005-2008 Samsung Electronics
|
|
||||||
* Kyungmin Park <kyungmin.park@samsung.com>
|
|
||||||
*
|
|
||||||
* Derived from x-loader
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
|
|
||||||
#include "onenand_ipl.h"
|
|
||||||
|
|
||||||
typedef int (init_fnc_t)(void);
|
|
||||||
|
|
||||||
void start_oneboot(void)
|
|
||||||
{
|
|
||||||
uchar *buf;
|
|
||||||
|
|
||||||
buf = (uchar *) CONFIG_SYS_LOAD_ADDR;
|
|
||||||
|
|
||||||
onenand_read_block(buf);
|
|
||||||
|
|
||||||
((init_fnc_t *)CONFIG_SYS_LOAD_ADDR)();
|
|
||||||
|
|
||||||
/* should never come here */
|
|
||||||
}
|
|
||||||
|
|
||||||
void hang(void)
|
|
||||||
{
|
|
||||||
for (;;);
|
|
||||||
}
|
|
|
@ -1,36 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2005-2008 Samsung Electronics
|
|
||||||
* Kyungmin Park <kyungmin.park@samsung.com>
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _ONENAND_IPL_H
|
|
||||||
#define _ONENAND_IPL_H
|
|
||||||
|
|
||||||
#include <linux/mtd/onenand_regs.h>
|
|
||||||
|
|
||||||
#define onenand_readw(a) readw(THIS_ONENAND(a))
|
|
||||||
#define onenand_writew(v, a) writew(v, THIS_ONENAND(a))
|
|
||||||
|
|
||||||
#define THIS_ONENAND(a) (CONFIG_SYS_ONENAND_BASE + (a))
|
|
||||||
|
|
||||||
#define READ_INTERRUPT() onenand_readw(ONENAND_REG_INTERRUPT)
|
|
||||||
|
|
||||||
extern int (*onenand_read_page)(ulong block, ulong page,
|
|
||||||
u_char *buf, int pagesize);
|
|
||||||
extern int onenand_read_block(unsigned char *buf);
|
|
||||||
#endif
|
|
|
@ -1,158 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2005-2009 Samsung Electronics
|
|
||||||
* Kyungmin Park <kyungmin.park@samsung.com>
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
|
|
||||||
#include <asm/io.h>
|
|
||||||
#include <asm/string.h>
|
|
||||||
|
|
||||||
#include "onenand_ipl.h"
|
|
||||||
|
|
||||||
#define onenand_block_address(block) (block)
|
|
||||||
#define onenand_sector_address(page) (page << 2)
|
|
||||||
#define onenand_buffer_address() ((1 << 3) << 8)
|
|
||||||
#define onenand_bufferram_address(block) (0)
|
|
||||||
|
|
||||||
#ifdef __HAVE_ARCH_MEMCPY32
|
|
||||||
extern void *memcpy32(void *dest, void *src, int size);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
int (*onenand_read_page)(ulong block, ulong page, u_char *buf, int pagesize);
|
|
||||||
|
|
||||||
/* read a page with ECC */
|
|
||||||
static int generic_onenand_read_page(ulong block, ulong page,
|
|
||||||
u_char * buf, int pagesize)
|
|
||||||
{
|
|
||||||
unsigned long *base;
|
|
||||||
|
|
||||||
#ifndef __HAVE_ARCH_MEMCPY32
|
|
||||||
unsigned int offset, value;
|
|
||||||
unsigned long *p;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
onenand_writew(onenand_block_address(block),
|
|
||||||
ONENAND_REG_START_ADDRESS1);
|
|
||||||
|
|
||||||
onenand_writew(onenand_bufferram_address(block),
|
|
||||||
ONENAND_REG_START_ADDRESS2);
|
|
||||||
|
|
||||||
onenand_writew(onenand_sector_address(page),
|
|
||||||
ONENAND_REG_START_ADDRESS8);
|
|
||||||
|
|
||||||
onenand_writew(onenand_buffer_address(),
|
|
||||||
ONENAND_REG_START_BUFFER);
|
|
||||||
|
|
||||||
onenand_writew(ONENAND_INT_CLEAR, ONENAND_REG_INTERRUPT);
|
|
||||||
|
|
||||||
onenand_writew(ONENAND_CMD_READ, ONENAND_REG_COMMAND);
|
|
||||||
|
|
||||||
#ifndef __HAVE_ARCH_MEMCPY32
|
|
||||||
p = (unsigned long *) buf;
|
|
||||||
#endif
|
|
||||||
base = (unsigned long *) (CONFIG_SYS_ONENAND_BASE + ONENAND_DATARAM);
|
|
||||||
|
|
||||||
while (!(READ_INTERRUPT() & ONENAND_INT_READ))
|
|
||||||
continue;
|
|
||||||
|
|
||||||
/* Check for invalid block mark */
|
|
||||||
if (page < 2 && (onenand_readw(ONENAND_SPARERAM) != 0xffff))
|
|
||||||
return 1;
|
|
||||||
|
|
||||||
#ifdef __HAVE_ARCH_MEMCPY32
|
|
||||||
/* 32 bytes boundary memory copy */
|
|
||||||
memcpy32(buf, base, pagesize);
|
|
||||||
#else
|
|
||||||
for (offset = 0; offset < (pagesize >> 2); offset++) {
|
|
||||||
value = *(base + offset);
|
|
||||||
*p++ = value;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifndef CONFIG_ONENAND_START_PAGE
|
|
||||||
#define CONFIG_ONENAND_START_PAGE 1
|
|
||||||
#endif
|
|
||||||
#define ONENAND_PAGES_PER_BLOCK 64
|
|
||||||
|
|
||||||
static void onenand_generic_init(int *page_is_4KiB, int *page)
|
|
||||||
{
|
|
||||||
int dev_id, density;
|
|
||||||
|
|
||||||
if (onenand_readw(ONENAND_REG_TECHNOLOGY))
|
|
||||||
*page_is_4KiB = 1;
|
|
||||||
dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
|
|
||||||
density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
|
|
||||||
density &= ONENAND_DEVICE_DENSITY_MASK;
|
|
||||||
if (density >= ONENAND_DEVICE_DENSITY_4Gb &&
|
|
||||||
!(dev_id & ONENAND_DEVICE_IS_DDP))
|
|
||||||
*page_is_4KiB = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining
|
|
||||||
* of OneNAND, skipping bad blocks
|
|
||||||
* @return 0 on success
|
|
||||||
*/
|
|
||||||
int onenand_read_block(unsigned char *buf)
|
|
||||||
{
|
|
||||||
int block, nblocks;
|
|
||||||
int page = CONFIG_ONENAND_START_PAGE, offset = 0;
|
|
||||||
int pagesize, erasesize, erase_shift;
|
|
||||||
int page_is_4KiB = 0;
|
|
||||||
|
|
||||||
onenand_read_page = generic_onenand_read_page;
|
|
||||||
|
|
||||||
onenand_generic_init(&page_is_4KiB, &page);
|
|
||||||
|
|
||||||
if (page_is_4KiB) {
|
|
||||||
pagesize = 4096; /* OneNAND has 4KiB pagesize */
|
|
||||||
erase_shift = 18;
|
|
||||||
} else {
|
|
||||||
pagesize = 2048; /* OneNAND has 2KiB pagesize */
|
|
||||||
erase_shift = 17;
|
|
||||||
}
|
|
||||||
|
|
||||||
erasesize = (1 << erase_shift);
|
|
||||||
nblocks = (CONFIG_SYS_MONITOR_LEN + erasesize - 1) >> erase_shift;
|
|
||||||
|
|
||||||
/* NOTE: you must read page from page 1 of block 0 */
|
|
||||||
/* read the block page by page */
|
|
||||||
for (block = 0; block < nblocks; block++) {
|
|
||||||
for (; page < ONENAND_PAGES_PER_BLOCK; page++) {
|
|
||||||
if (onenand_read_page(block, page, buf + offset,
|
|
||||||
pagesize)) {
|
|
||||||
/* This block is bad. Skip it
|
|
||||||
* and read next block */
|
|
||||||
offset -= page * pagesize;
|
|
||||||
nblocks++;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
offset += pagesize;
|
|
||||||
}
|
|
||||||
page = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
Loading…
Reference in New Issue