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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
i2c: remove i2c driver-model compatibility layer
There are no more users of the compatibility layer for i2c. Remove the driver and all references to it. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Bartosz Golaszewski
Tom Rini
parent
3ec7fc45e5
commit
e31148247a
7
Makefile
7
Makefile
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@ -936,13 +936,6 @@ ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy)
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endif
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endif
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endif
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ifeq ($(CONFIG_DM_I2C_COMPAT),y)
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@echo >&2 "===================== WARNING ======================"
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@echo >&2 "This board uses CONFIG_DM_I2C_COMPAT. Please remove"
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@echo >&2 "(possibly in a subsequent patch in your series)"
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@echo >&2 "before sending patches to the mailing list."
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@echo >&2 "===================================================="
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endif
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ifeq ($(CONFIG_MMC),y)
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ifneq ($(CONFIG_DM_MMC)$(CONFIG_OF_CONTROL)$(CONFIG_BLK),yyy)
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@echo >&2 "===================== WARNING ======================"
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@ -12,18 +12,7 @@ config DM_I2C
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write and speed, is implemented with the bus drivers operations,
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which provide methods for bus setting and data transfer. Each chip
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device (bus child) info is kept as parent platdata. The interface
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is defined in include/i2c.h. When i2c bus driver supports the i2c
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uclass, but the device drivers not, then DM_I2C_COMPAT config can
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be used as compatibility layer.
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config DM_I2C_COMPAT
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bool "Enable I2C compatibility layer"
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depends on DM
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help
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Enable old-style I2C functions for compatibility with existing code.
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This option can be enabled as a temporary measure to avoid needing
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to convert all code for a board in a single commit. It should not
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be enabled for any board in an official release.
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is defined in include/i2c.h.
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config I2C_CROS_EC_TUNNEL
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tristate "Chrome OS EC tunnel I2C bus"
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@ -3,7 +3,6 @@
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# (C) Copyright 2000-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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obj-$(CONFIG_DM_I2C) += i2c-uclass.o
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obj-$(CONFIG_DM_I2C_COMPAT) += i2c-uclass-compat.o
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obj-$(CONFIG_DM_I2C_GPIO) += i2c-gpio.o
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obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o
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obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
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@ -1,128 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2014 Google, Inc
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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static int cur_busnum __attribute__((section(".data")));
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static int i2c_compat_get_device(uint chip_addr, int alen,
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struct udevice **devp)
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{
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struct dm_i2c_chip *chip;
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int ret;
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ret = i2c_get_chip_for_busnum(cur_busnum, chip_addr, alen, devp);
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if (ret)
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return ret;
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chip = dev_get_parent_platdata(*devp);
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if (chip->offset_len != alen) {
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printf("I2C chip %x: requested alen %d does not match chip offset_len %d\n",
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chip_addr, alen, chip->offset_len);
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return -EADDRNOTAVAIL;
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}
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return 0;
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}
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int i2c_probe(uint8_t chip_addr)
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{
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struct udevice *bus, *dev;
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int ret;
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ret = uclass_get_device_by_seq(UCLASS_I2C, cur_busnum, &bus);
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if (ret) {
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debug("Cannot find I2C bus %d: err=%d\n", cur_busnum, ret);
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return ret;
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}
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if (!bus)
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return -ENOENT;
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return dm_i2c_probe(bus, chip_addr, 0, &dev);
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}
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int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
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int len)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_compat_get_device(chip_addr, alen, &dev);
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if (ret)
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return ret;
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return dm_i2c_read(dev, addr, buffer, len);
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}
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int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
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int len)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_compat_get_device(chip_addr, alen, &dev);
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if (ret)
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return ret;
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return dm_i2c_write(dev, addr, buffer, len);
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}
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int i2c_get_bus_num_fdt(int node)
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{
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struct udevice *bus;
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int ret;
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ret = uclass_get_device_by_of_offset(UCLASS_I2C, node, &bus);
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if (ret)
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return ret;
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return bus->seq;
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}
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unsigned int i2c_get_bus_num(void)
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{
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return cur_busnum;
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}
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int i2c_set_bus_num(unsigned int bus)
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{
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cur_busnum = bus;
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return 0;
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}
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void i2c_init(int speed, int slaveaddr)
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{
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/* Nothing to do here - the init happens through driver model */
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}
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void board_i2c_init(const void *blob)
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{
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/* Nothing to do here - the init happens through driver model */
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}
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uint8_t i2c_reg_read(uint8_t chip_addr, uint8_t offset)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_compat_get_device(chip_addr, 1, &dev);
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if (ret)
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return 0xff;
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return dm_i2c_reg_read(dev, offset);
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}
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void i2c_reg_write(uint8_t chip_addr, uint8_t offset, uint8_t val)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_compat_get_device(chip_addr, 1, &dev);
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if (!ret)
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dm_i2c_reg_write(dev, offset, val);
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}
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@ -40,8 +40,7 @@
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EXPORT_FUNC(simple_strtol, long, simple_strtol,
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const char *, char **, unsigned int)
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EXPORT_FUNC(strcmp, int, strcmp, const char *cs, const char *ct)
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#if defined(CONFIG_CMD_I2C) && \
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(!defined(CONFIG_DM_I2C) || defined(CONFIG_DM_I2C_COMPAT))
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#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C)
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EXPORT_FUNC(i2c_write, int, i2c_write, uchar, uint, int , uchar * , int)
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EXPORT_FUNC(i2c_read, int, i2c_read, uchar, uint, int , uchar * , int)
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#else
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@ -32,8 +32,7 @@ long simple_strtol(const char *cp, char **endp, unsigned int base);
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int strcmp(const char *cs, const char *ct);
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unsigned long ustrtoul(const char *cp, char **endp, unsigned int base);
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unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base);
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#if defined(CONFIG_CMD_I2C) && \
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(!defined(CONFIG_DM_I2C) || defined(CONFIG_DM_I2C_COMPAT))
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#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C)
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int i2c_write (uchar, uint, int , uchar* , int);
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int i2c_read (uchar, uint, int , uchar* , int);
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#endif
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@ -271,86 +271,6 @@ int i2c_get_chip_offset_len(struct udevice *dev);
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*/
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int i2c_deblock(struct udevice *bus);
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#ifdef CONFIG_DM_I2C_COMPAT
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/**
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* i2c_probe() - Compatibility function for driver model
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*
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* Calls dm_i2c_probe() on the current bus
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*/
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int i2c_probe(uint8_t chip_addr);
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/**
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* i2c_read() - Compatibility function for driver model
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*
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* Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
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* set to @addr. @alen must match the current setting for the device.
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*/
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int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
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int len);
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/**
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* i2c_write() - Compatibility function for driver model
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*
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* Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
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* set to @addr. @alen must match the current setting for the device.
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*/
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int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
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int len);
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/**
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* i2c_get_bus_num_fdt() - Compatibility function for driver model
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*
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* @return the bus number associated with the given device tree node
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*/
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int i2c_get_bus_num_fdt(int node);
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/**
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* i2c_get_bus_num() - Compatibility function for driver model
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*
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* @return the 'current' bus number
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*/
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unsigned int i2c_get_bus_num(void);
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/**
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* i2c_set_bus_num() - Compatibility function for driver model
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*
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* Sets the 'current' bus
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*/
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int i2c_set_bus_num(unsigned int bus);
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static inline void I2C_SET_BUS(unsigned int bus)
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{
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i2c_set_bus_num(bus);
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}
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static inline unsigned int I2C_GET_BUS(void)
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{
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return i2c_get_bus_num();
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}
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/**
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* i2c_init() - Compatibility function for driver model
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*
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* This function does nothing.
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*/
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void i2c_init(int speed, int slaveaddr);
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/**
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* board_i2c_init() - Compatibility function for driver model
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*
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* @param blob Device tree blbo
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* @return the number of I2C bus
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*/
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void board_i2c_init(const void *blob);
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/*
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* Compatibility functions for driver model.
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*/
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uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
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void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
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#endif
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/**
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* struct dm_i2c_ops - driver operations for I2C uclass
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*
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