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i.MX7ULP: Add CPU revision check for B0

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Since there is no register for CPU revision, we use ROM version to
check the A0 or B0 chip.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Peng Fan 2019-07-22 01:25:05 +00:00 committed by Stefano Babic
parent eae4e0f3c1
commit e25dc290aa
1 changed files with 5 additions and 2 deletions
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7
arch/arm/mach-imx/mx7ulp/soc.c
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@ -18,10 +18,13 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
};
#endif
#define ROM_VERSION_ADDR 0x80
u32 get_cpu_rev(void)
{
/* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */
return (MXC_CPU_MX7ULP << 12) | (1 << 4);
/* Check the ROM version for cpu revision */
u32 rom_version = readl((void __iomem *)ROM_VERSION_ADDR);
return (MXC_CPU_MX7ULP << 12) | (rom_version & 0xFF);
}
#ifdef CONFIG_REVISION_TAG