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ARM: OMAP5: Avoid writing into LDO SRAM bits

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Writing magic bits into LDO SRAM was suggested only for OMAP5432
ES1.0. Now these are no longer applicable. Moreover these bits should
not be overwritten as they are loaded from EFUSE. So avoid
writing into these registers.

Boot tested on OMAP5432 ES2.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Lokesh Vutla 2013-08-23 17:34:17 +05:30 committed by Tom Rini
parent d3d33daf11
commit e22cc0cf13
3 changed files with 0 additions and 25 deletions
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7
arch/arm/cpu/armv7/omap-common/clocks-common.c
View File

@ -589,13 +589,6 @@ void scale_vcores(struct vcores_data const *vcores)
val = optimize_vcore_voltage(&vcores->iva);
do_scale_vcore(vcores->iva.addr, val, vcores->iva.pmic);
if (emif_sdram_type() == EMIF_SDRAM_TYPE_DDR3) {
/* Configure LDO SRAM "magic" bits */
writel(2, (*prcm)->prm_sldo_core_setup);
writel(2, (*prcm)->prm_sldo_mpu_setup);
writel(2, (*prcm)->prm_sldo_mm_setup);
}
}
static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode)

12
arch/arm/cpu/armv7/omap5/prcm-regs.c
View File

@ -286,12 +286,6 @@ struct prcm_regs const omap5_es1_prcm = {
.prm_vc_val_bypass = 0x4ae07ba0,
.prm_vc_cfg_i2c_mode = 0x4ae07bb4,
.prm_vc_cfg_i2c_clk = 0x4ae07bb8,
.prm_sldo_core_setup = 0x4ae07bc4,
.prm_sldo_core_ctrl = 0x4ae07bc8,
.prm_sldo_mpu_setup = 0x4ae07bcc,
.prm_sldo_mpu_ctrl = 0x4ae07bd0,
.prm_sldo_mm_setup = 0x4ae07bd4,
.prm_sldo_mm_ctrl = 0x4ae07bd8,
/* SCRM stuff, used by some boards */
.scrm_auxclk0 = 0x4ae0a310,
@ -735,12 +729,6 @@ struct prcm_regs const omap5_es2_prcm = {
.prm_vc_cfg_i2c_mode = 0x4ae07cb4,
.prm_vc_cfg_i2c_clk = 0x4ae07cb8,
.prm_sldo_core_setup = 0x4ae07cc4,
.prm_sldo_core_ctrl = 0x4ae07cc8,
.prm_sldo_mpu_setup = 0x4ae07ccc,
.prm_sldo_mpu_ctrl = 0x4ae07cd0,
.prm_sldo_mm_setup = 0x4ae07cd4,
.prm_sldo_mm_ctrl = 0x4ae07cd8,
.prm_abbldo_mpu_setup = 0x4ae07cdc,
.prm_abbldo_mpu_ctrl = 0x4ae07ce0,

6
arch/arm/include/asm/omap_common.h
View File

@ -310,12 +310,6 @@ struct prcm_regs {
u32 prm_vc_val_bypass;
u32 prm_vc_cfg_i2c_mode;
u32 prm_vc_cfg_i2c_clk;
u32 prm_sldo_core_setup;
u32 prm_sldo_core_ctrl;
u32 prm_sldo_mpu_setup;
u32 prm_sldo_mpu_ctrl;
u32 prm_sldo_mm_setup;
u32 prm_sldo_mm_ctrl;
u32 prm_abbldo_mpu_setup;
u32 prm_abbldo_mpu_ctrl;