diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_defs.h b/arch/arm/include/asm/arch-stm32f4/stm32_defs.h
new file mode 100644
index 0000000000..29b98aecf4
--- /dev/null
+++ b/arch/arm/include/asm/arch-stm32f4/stm32_defs.h
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2016
+ * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __STM32_DEFS_H__
+#define __STM32_DEFS_H__
+#include <asm/arch/stm32_periph.h>
+
+int clock_setup(enum periph_clock);
+
+#endif
+
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_periph.h b/arch/arm/include/asm/arch-stm32f4/stm32_periph.h
new file mode 100644
index 0000000000..a1af25cb58
--- /dev/null
+++ b/arch/arm/include/asm/arch-stm32f4/stm32_periph.h
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2016
+ * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_ARM_ARCH_PERIPH_H
+#define __ASM_ARM_ARCH_PERIPH_H
+
+/*
+ * Peripherals required for pinmux configuration. List will
+ * grow with support for more devices getting added.
+ * Numbering based on interrupt table.
+ *
+ */
+enum periph_id {
+	UART1_GPIOA_9_10 = 0,
+	UART2_GPIOD_5_6,
+};
+
+enum periph_clock {
+	USART1_CLOCK_CFG = 0,
+	USART2_CLOCK_CFG,
+};
+
+#endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/arch/arm/mach-stm32/stm32f4/clock.c b/arch/arm/mach-stm32/stm32f4/clock.c
index 3deb17aa83..576d3e68ae 100644
--- a/arch/arm/mach-stm32/stm32f4/clock.c
+++ b/arch/arm/mach-stm32/stm32f4/clock.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
+#include <asm/arch/stm32_periph.h>
 
 #define RCC_CR_HSION		(1 << 0)
 #define RCC_CR_HSEON		(1 << 16)
@@ -50,6 +51,14 @@
 
 #define RCC_APB1ENR_PWREN	(1 << 28)
 
+/*
+ * RCC USART specific definitions
+ */
+#define RCC_ENR_USART1EN		(1 << 4)
+#define RCC_ENR_USART2EN		(1 << 17)
+#define RCC_ENR_USART3EN		(1 << 18)
+#define RCC_ENR_USART6EN		(1 <<  5)
+
 #define PWR_CR_VOS0		(1 << 14)
 #define PWR_CR_VOS1		(1 << 15)
 #define PWR_CR_VOS_MASK		0xC000
@@ -221,3 +230,14 @@ unsigned long clock_get(enum clock clck)
 		break;
 	}
 }
+
+void clock_setup(int peripheral)
+{
+	switch (peripheral) {
+	case USART1_CLOCK_CFG:
+		setbits_le32(&STM32_RCC->apb2enr, RCC_ENR_USART1EN);
+		break;
+	default:
+		break;
+	}
+}
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c
index 8bc2d9e4c1..fb8475f65f 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -19,6 +19,8 @@
 #include <asm/arch/fmc.h>
 #include <dm/platdata.h>
 #include <dm/platform_data/serial_stm32.h>
+#include <asm/arch/stm32_periph.h>
+#include <asm/arch/stm32_defs.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -286,6 +288,7 @@ int board_early_init_f(void)
 	res = uart_setup_gpio();
 	if (res)
 		return res;
+	clock_setup(USART1_CLOCK_CFG);
 
 	return 0;
 }
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 91a5dde577..c793ba6e90 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -35,24 +35,6 @@ struct stm32_usart {
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define MAX_SERIAL_PORTS		4
-
-/*
- * RCC USART specific definitions
- */
-#define RCC_ENR_USART1EN		(1 << 4)
-#define RCC_ENR_USART2EN		(1 << 17)
-#define RCC_ENR_USART3EN		(1 << 18)
-#define RCC_ENR_USART6EN		(1 <<  5)
-
-/* Array used to figure out which RCC bit needs to be set */
-static const unsigned long usart_port_rcc_pairs[MAX_SERIAL_PORTS][2] = {
-	{ STM32_USART1_BASE, RCC_ENR_USART1EN },
-	{ STM32_USART2_BASE, RCC_ENR_USART2EN },
-	{ STM32_USART3_BASE, RCC_ENR_USART3EN },
-	{ STM32_USART6_BASE, RCC_ENR_USART6EN }
-};
-
 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
 {
 	struct stm32_serial_platdata *plat = dev->platdata;
@@ -114,28 +96,6 @@ static int stm32_serial_probe(struct udevice *dev)
 {
 	struct stm32_serial_platdata *plat = dev->platdata;
 	struct stm32_usart *const usart = plat->base;
-	int usart_port = -1;
-	int i;
-
-	for (i = 0; i < MAX_SERIAL_PORTS; i++) {
-		if ((u32)usart == usart_port_rcc_pairs[i][0]) {
-			usart_port = i;
-			break;
-		}
-	}
-
-	if (usart_port == -1)
-		return -EINVAL;
-
-	if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)
-		setbits_le32(&STM32_RCC->apb1enr,
-			     usart_port_rcc_pairs[usart_port][1]);
-	else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)
-		setbits_le32(&STM32_RCC->apb2enr,
-			     usart_port_rcc_pairs[usart_port][1]);
-	else
-		return -EINVAL;
-
 	setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
 
 	return 0;