From a722359de4e1f68ad2392b2eb88cfca55f129637 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Thu, 5 Oct 2017 00:27:21 +0100 Subject: [PATCH 1/6] SPL: SPI: select SPL_SPI_FLASH_SUPPORT on SPL_SPI_SUNXI The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI symbol. But despite its generic name, the actual only use case for this is to provide SPI flash support to the SPL, which requires CONFIG_SPL_SPI_FLASH_SUPPORT to be defined. Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This avoids doing this explicitly in the defconfig, and fixes SPI booting on the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with SPI flash). Signed-off-by: Andre Przywara Signed-off-by: Maxime Ripard --- configs/orangepi_pc2_defconfig | 1 - configs/orangepi_zero_defconfig | 1 - drivers/mtd/spi/Kconfig | 1 + 3 files changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 5918e729d1..e5fea42fa6 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 1a16ed1ad6..5792e7a4a3 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -1,6 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881979 diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 5700859ff2..6ba255d676 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -140,6 +140,7 @@ if SPL config SPL_SPI_SUNXI bool "Support for SPI Flash on Allwinner SoCs in SPL" depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I + select SPL_SPI_FLASH_SUPPORT ---help--- Enable support for SPI Flash. This option allows SPL to read from sunxi SPI Flash. It uses the same method as the boot ROM, so does From c96f598be7dd075bd0c6bda73b7819c1a6a2016a Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Tue, 26 Sep 2017 16:02:47 +0200 Subject: [PATCH 2/6] sunxi: clk: fix N formula for CPUX clocks As explained in arch/arm/mach-sunxi/clock_sun8i_a83t.c, clk for CPU clusters is computed as clk = 24*n. However, the current formula is clk = 24*(n-1). This results in a clock set to a frequency that isn't specified as possible for CPUs. Let's use the correct formula. Fixes: f542948b1e8c ("sunxi: clk: add basic clocks for A83T") Signed-off-by: Quentin Schulz Acked-by: Maxime Ripard Reviewed-by: Jagan Teki --- arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h index 5dfcbf3b01..b4ea2f8cfb 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h @@ -158,7 +158,7 @@ struct sunxi_ccm_reg { #define CPU_CLK_SRC_OSC24M 0 #define CPU_CLK_SRC_PLL1 1 -#define CCM_PLL1_CTRL_N(n) ((((n) - 1) & 0xff) << 8) +#define CCM_PLL1_CTRL_N(n) (((n) & 0xff) << 8) #define CCM_PLL1_CTRL_P(n) (((n) & 0x1) << 16) #define CCM_PLL1_CTRL_EN (0x1 << 31) #define CMM_PLL1_CLOCK_TIME_2 (0x2 << 24) From 7dec673ea949fd7278993b76e33a05f561294e43 Mon Sep 17 00:00:00 2001 From: Benjamin Young Date: Fri, 13 Oct 2017 14:29:20 -0700 Subject: [PATCH 3/6] cmd: fastboot: Enable FASTBOOT_FLASH_NAND for SUNXI_NAND devices Encountered an issue where fastboot can't write to NAND on a CHIP_pro, the symbol was neither present in the board's config header, nor the Kconfig, this patch puts it in the Kconfig and defaults on when SUNXI_NAND is selected. Signed-off-by: Ben Young Signed-off-by: Maxime Ripard --- cmd/fastboot/Kconfig | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig index 214bbc23fc..4ce7a775e2 100644 --- a/cmd/fastboot/Kconfig +++ b/cmd/fastboot/Kconfig @@ -81,6 +81,16 @@ config FASTBOOT_FLASH_MMC_DEV regarding the non-volatile storage device. Define this to the eMMC device that fastboot should use to store the image. +config FASTBOOT_FLASH_NAND_DEV + int "Define FASTBOOT NAND FLASH default device" + depends on FASTBOOT_FLASH && NAND + depends on CMD_MTDPARTS + default 0 if ARCH_SUNXI && NAND_SUNXI + help + The fastboot "flash" command requires additional information + regarding the non-volatile storage device. Define this to + the NAND device that fastboot should use to store the image. + config FASTBOOT_GPT_NAME string "Target name for updating GPT" depends on FASTBOOT_FLASH From 7514069aa3abe3c35568588b87d2c9c68a06f982 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 20 Apr 2017 13:16:18 +0200 Subject: [PATCH 4/6] sunxi: Add support for the Banana Pi M2-Magic The Banana Pi M2-Magic is a small board with an Allwinner A33, an eMMC, a wifi chip and some pin headers. Enable support for it. Signed-off-by: Maxime Ripard --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-r16-bananapi-m2m.dts | 321 ++++++++++++++++++++++++ configs/Bananapi_m2m_defconfig | 21 ++ 3 files changed, 343 insertions(+) create mode 100644 arch/arm/dts/sun8i-r16-bananapi-m2m.dts create mode 100644 configs/Bananapi_m2m_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5b90280468..6db64f9101 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -309,6 +309,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-a33-olinuxino.dtb \ sun8i-a33-q8-tablet.dtb \ sun8i-a33-sinlinx-sina33.dtb \ + sun8i-r16-bananapi-m2m.dtb \ sun8i-r16-nintendo-nes-classic-edition.dtb \ sun8i-r16-parrot.dtb dtb-$(CONFIG_MACH_SUN8I_A83T) += \ diff --git a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts new file mode 100644 index 0000000000..eaf0966672 --- /dev/null +++ b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts @@ -0,0 +1,321 @@ +/* + * Copyright (c) 2017 Free Electrons + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" + +#include + +/ { + model = "BananaPi M2 Magic"; + compatible = "sinovoip,bananapi-m2m", "allwinner,sun8i-a33"; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + blue { + label = "bpi-m2m:blue:usr"; + gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; + }; + + green { + label = "bpi-m2m:green:usr"; + gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; + }; + + red { + label = "bpi-m2m:red:power"; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + }; + + reg_vcc5v0: vcc5v0 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */ + }; +}; + +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc3>; +}; + +&cpu0_opp_table { + opp@1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1320000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1320000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; +}; + +&dai { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +/* This is the i2c bus exposed on the DSI connector for the touch panel */ +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "disabled"; +}; + +/* This is the i2c bus exposed on the GPIO header */ +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "disabled"; +}; + +/* This is the i2c bus exposed on the CSI connector to control the sensor */ +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "disabled"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + vmmc-supply = <®_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_aldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_dcdc1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <®_dcdc1>; + x-powers,drive-vbus-en; + }; +}; + +#include "axp223.dtsi" + +&ac_power_supply { + status = "okay"; +}; + +®_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-io"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vdd-dll"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_dc1sw { + regulator-name = "vcc-lcd"; +}; + +®_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +®_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +/* + * Our WiFi chip needs both DLDO1 and DLDO2 to be powered at the same + * time, with the two being in sync. Since this is not really + * supported right now, just use the two as always on, and we will fix + * it later. + */ +®_dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi0"; +}; + +®_dldo2 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi1"; +}; + +®_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + +®_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&sound { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_b>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_a>, <&uart1_pins_cts_rts_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_drivevbus>; + usb1_vbus-supply = <®_vcc5v0>; + status = "okay"; +}; diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig new file mode 100644 index 0000000000..82cd2c440b --- /dev/null +++ b/configs/Bananapi_m2m_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_CONS_INDEX=1 +CONFIG_MACH_SUN8I_A33=y +CONFIG_DRAM_CLK=600 +CONFIG_DRAM_ZQ=15291 +CONFIG_DRAM_ODT_EN=y +CONFIG_MMC0_CD_PIN="PB4" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_ID_DET="PH8" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y From ce2e44d836dc790deb21707729d89d54d1bb6e7d Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 19 Oct 2017 11:49:29 +0200 Subject: [PATCH 5/6] sunxi: Enable THUMB build for the U-Boot binary We start to get to the limit of our main U-Boot binary size (with some boards even crossing it). Enable its build using thumb2 to get some extra room. Suggested-by: Siarhei Siamashka Reviewed-by: Andre Przywara Tested-by: Andre Przywara Signed-off-by: Maxime Ripard --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 64e0ee43f1..83b7aa51dc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -698,6 +698,7 @@ config ARCH_SUNXI select SPL_SYS_MALLOC_SIMPLE if SPL select SYS_NS16550 select SPL_SYS_THUMB_BUILD if !ARM64 + select SYS_THUMB_BUILD if !ARM64 select USB if DISTRO_DEFAULTS select USB_STORAGE if DISTRO_DEFAULTS select USB_KEYBOARD if DISTRO_DEFAULTS From 819f1e081c527d2d02cdaeec0027384688cf5de0 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 19 Oct 2017 11:36:35 +0200 Subject: [PATCH 6/6] sunxi: binman: Add U-Boot binary size check The U-Boot binary may trip over its actual allocated size in the storage. In such a case, the environment will not be readable anymore (because corrupted when the new image was flashed), and any attempt at using saveenv to reconstruct the environment will result in a corrupted U-Boot binary. Reviewed-by: Andre Przywara Signed-off-by: Maxime Ripard --- arch/arm/dts/sunxi-u-boot.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi index 5adfd9bca2..72e95afd78 100644 --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi @@ -1,5 +1,14 @@ #include +/* + * This is the maximum size the U-Boot binary can be, which is basically + * the start of the environment, minus the start of the U-Boot binary in + * the MMC. This makes the assumption that the MMC is using 512-bytes + * blocks, but devices using something other than that remains to be + * seen. + */ +#define UBOOT_MMC_MAX_SIZE (CONFIG_ENV_OFFSET - (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)) + / { binman { filename = "u-boot-sunxi-with-spl.bin"; @@ -8,6 +17,9 @@ filename = "spl/sunxi-spl.bin"; }; u-boot-img { +#ifdef CONFIG_MMC + size = ; +#endif pos = ; }; };