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https://github.com/brain-hackers/u-boot-brain
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Enable Icache
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
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@ -31,7 +31,6 @@
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#define _START _start
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#define _FAULT _fault
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#define SAVE_ALL \
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move.w #0x2700,%sr; /* disable intrs */ \
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subl #60,%sp; /* space for 15 regs */ \
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@ -42,7 +41,6 @@
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addl #60,%sp; /* space for 15 regs */ \
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rte;
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.text
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/*
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* Vector table. This is used for initial platform startup.
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@ -149,7 +147,8 @@ _start:
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move.l %d0, (%a1)
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move.l %d0, (%a2)
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/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
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/* set stackpointer to end of internal ram to get some stackspace for the
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first c-code */
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move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
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clr.l %sp@-
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@ -271,12 +270,12 @@ icache_enable:
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movec %d0, %CACR /* Invalidate cache */
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move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
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movec %d0, %ACR0 /* Enable cache */
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move.l #(CFG_CS0_BASE + 0xc000), %d0 /* Setup cache mask */
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move.l #(CFG_CS0_BASE + 0x0000), %d0 /* Setup cache mask */
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movec %d0, %ACR1 /* Enable cache */
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/*move.l #0x81000100, %d0*/ /* Setup cache mask */
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move.l #0x81000100, %d0 /* Setup cache mask */
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move.l #0x80000200, %d0 /* Setup cache mask */
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movec %d0, %CACR /* Enable cache */
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nop
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move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
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moveq #1, %d0
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@ -304,7 +303,7 @@ icache_status:
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.globl icache_invalid
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icache_invalid:
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move.l #0x00000100, %d0 /* Setup cache mask */
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move.l #0x01000000, %d0 /* Setup cache mask */
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movec %d0, %CACR /* Enable cache */
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rts
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