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arm: socfpga: Enable DWMMC for SOCFPGA

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Enable the DesignWare MMC controller driver support
for SOCFPGA Cyclone5 dev kit

Signed-off-by: Chin Liang See <clsee@altera.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
This commit is contained in:
Chin Liang See 2014-09-19 04:28:23 -05:00 committed by Marek Vasut
parent 13e81d45f8
commit ddcbed04a2
1 changed files with 16 additions and 0 deletions
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16
include/configs/socfpga_cyclone5.h
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@ -251,6 +251,22 @@
/* Clocks source frequency to watchdog timer */
#define CONFIG_DW_WDT_CLOCK_KHZ 25000
/*
* MMC support
*/
#define CONFIG_MMC
#ifdef CONFIG_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_DWMMC
#define CONFIG_SOCFPGA_DWMMC
#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024
#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3
#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0
/* using smaller max blk cnt to avoid flooding the limited stack we have */
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256
#endif /* CONFIG_MMC */
/*
* SPL "Second Program Loader" aka Initial Software