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iomux-v3: Place pad control definitions into common file

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Instead of having the same PAD control definition in each MX6 variant pin file,
place it into a common location.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2013-04-10 09:32:56 +00:00 committed by Stefano Babic
parent cd53034613
commit dc88403e6c
3 changed files with 26 additions and 55 deletions
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27
arch/arm/include/asm/arch-mx6/mx6dl_pins.h
View File

@ -22,33 +22,6 @@
#include <asm/imx-common/iomux-v3.h>
/* Use to set PAD control */
#define PAD_CTL_HYS (1 << 16)
#define PAD_CTL_PUS_100K_DOWN (0 << 14)
#define PAD_CTL_PUS_47K_UP (1 << 14)
#define PAD_CTL_PUS_100K_UP (2 << 14)
#define PAD_CTL_PUS_22K_UP (3 << 14)
#define PAD_CTL_PUE (1 << 13)
#define PAD_CTL_PKE (1 << 12)
#define PAD_CTL_ODE (1 << 11)
#define PAD_CTL_SPEED_LOW (1 << 6)
#define PAD_CTL_SPEED_MED (2 << 6)
#define PAD_CTL_SPEED_HIGH (3 << 6)
#define PAD_CTL_DSE_DISABLE (0 << 3)
#define PAD_CTL_DSE_240ohm (1 << 3)
#define PAD_CTL_DSE_120ohm (2 << 3)
#define PAD_CTL_DSE_80ohm (3 << 3)
#define PAD_CTL_DSE_60ohm (4 << 3)
#define PAD_CTL_DSE_48ohm (5 << 3)
#define PAD_CTL_DSE_40ohm (6 << 3)
#define PAD_CTL_DSE_34ohm (7 << 3)
#define PAD_CTL_SRE_FAST (1 << 0)
#define PAD_CTL_SRE_SLOW (0 << 0)
#define IOMUX_CONFIG_SION 0x10
#define NO_MUX_I 0
#define NO_PAD_I 0
enum {
MX6_PAD_CSI0_DAT10__UART1_TXD = IOMUX_PAD(0x0360, 0x004C, 3, 0x0000, 0, 0),
MX6_PAD_CSI0_DAT11__UART1_RXD = IOMUX_PAD(0x0364, 0x0050, 3, 0x08FC, 1, 0),

27
arch/arm/include/asm/arch-mx6/mx6q_pins.h
View File

@ -24,33 +24,6 @@
#include <asm/imx-common/iomux-v3.h>
/* Use to set PAD control */
#define PAD_CTL_HYS (1 << 16)
#define PAD_CTL_PUS_100K_DOWN (0 << 14)
#define PAD_CTL_PUS_47K_UP (1 << 14)
#define PAD_CTL_PUS_100K_UP (2 << 14)
#define PAD_CTL_PUS_22K_UP (3 << 14)
#define PAD_CTL_PUE (1 << 13)
#define PAD_CTL_PKE (1 << 12)
#define PAD_CTL_ODE (1 << 11)
#define PAD_CTL_SPEED_LOW (1 << 6)
#define PAD_CTL_SPEED_MED (2 << 6)
#define PAD_CTL_SPEED_HIGH (3 << 6)
#define PAD_CTL_DSE_DISABLE (0 << 3)
#define PAD_CTL_DSE_240ohm (1 << 3)
#define PAD_CTL_DSE_120ohm (2 << 3)
#define PAD_CTL_DSE_80ohm (3 << 3)
#define PAD_CTL_DSE_60ohm (4 << 3)
#define PAD_CTL_DSE_48ohm (5 << 3)
#define PAD_CTL_DSE_40ohm (6 << 3)
#define PAD_CTL_DSE_34ohm (7 << 3)
#define PAD_CTL_SRE_FAST (1 << 0)
#define PAD_CTL_SRE_SLOW (0 << 0)
#define NO_MUX_I 0
#define NO_PAD_I 0
enum {
MX6_PAD_SD2_DAT1__USDHC2_DAT1 = IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),
MX6_PAD_SD2_DAT1__ECSPI5_SS0 = IOMUX_PAD(0x0360, 0x004C, 1, 0x0834, 0, 0),

27
arch/arm/include/asm/imx-common/iomux-v3.h
View File

@ -95,7 +95,32 @@ typedef u64 iomux_v3_cfg_t;
#define GPIO_PORTE (4 << GPIO_PORT_SHIFT)
#define GPIO_PORTF (5 << GPIO_PORT_SHIFT)
#define MUX_CONFIG_SION (0x1 << 4)
#define PAD_CTL_HYS (1 << 16)
#define PAD_CTL_PUS_100K_DOWN (0 << 14)
#define PAD_CTL_PUS_47K_UP (1 << 14)
#define PAD_CTL_PUS_100K_UP (2 << 14)
#define PAD_CTL_PUS_22K_UP (3 << 14)
#define PAD_CTL_PUE (1 << 13)
#define PAD_CTL_PKE (1 << 12)
#define PAD_CTL_ODE (1 << 11)
#define PAD_CTL_SPEED_LOW (1 << 6)
#define PAD_CTL_SPEED_MED (2 << 6)
#define PAD_CTL_SPEED_HIGH (3 << 6)
#define PAD_CTL_DSE_DISABLE (0 << 3)
#define PAD_CTL_DSE_240ohm (1 << 3)
#define PAD_CTL_DSE_120ohm (2 << 3)
#define PAD_CTL_DSE_80ohm (3 << 3)
#define PAD_CTL_DSE_60ohm (4 << 3)
#define PAD_CTL_DSE_48ohm (5 << 3)
#define PAD_CTL_DSE_40ohm (6 << 3)
#define PAD_CTL_DSE_34ohm (7 << 3)
#define PAD_CTL_SRE_FAST (1 << 0)
#define PAD_CTL_SRE_SLOW (0 << 0)
#define IOMUX_CONFIG_SION 0x10
#define NO_MUX_I 0
#define NO_PAD_I 0
void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,