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ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup code
This patch extends the vf610 DDR memory controller code to support SW leveling. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
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@ -10,6 +10,7 @@
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-vf610.h>
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#include <asm/arch/iomux-vf610.h>
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#include <asm/arch/ddrmc-vf610.h>
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#include <asm/arch/ddrmc-vf610.h>
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#include "ddrmc-vf610-calibration.h"
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void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
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void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
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{
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{
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@ -235,4 +236,8 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings,
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while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE))
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while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE))
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udelay(10);
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udelay(10);
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writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]);
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writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]);
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#ifdef CONFIG_DDRMC_VF610_CALIBRATION
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ddrmc_calibration(ddrmr);
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#endif
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}
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}
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