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ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup code

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This patch extends the vf610 DDR memory controller code to support SW
leveling.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
This commit is contained in:
Lukasz Majewski 2018-12-05 17:04:03 +01:00 committed by Stefano Babic
parent 548cc1095f
commit dc619924c7
1 changed files with 5 additions and 0 deletions
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5
arch/arm/mach-imx/ddrmc-vf610.c
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@ -10,6 +10,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux-vf610.h>
#include <asm/arch/ddrmc-vf610.h>
#include "ddrmc-vf610-calibration.h"
void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
{
@ -235,4 +236,8 @@ void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings,
while (!(readl(&ddrmr->cr[80]) & DDRMC_CR80_MC_INIT_COMPLETE))
udelay(10);
writel(DDRMC_CR80_MC_INIT_COMPLETE, &ddrmr->cr[81]);
#ifdef CONFIG_DDRMC_VF610_CALIBRATION
ddrmc_calibration(ddrmr);
#endif
}