diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 4a277934a7..5fa951ad4b 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -206,6 +206,10 @@
 		compatible = "denx,u-boot-devres-test";
 	};
 
+	acpi-test {
+		compatible = "denx,u-boot-acpi-test";
+	};
+
 	clocks {
 		clk_fixed: clk-fixed {
 			compatible = "fixed-clock";
diff --git a/arch/sandbox/include/asm/acpi_table.h b/arch/sandbox/include/asm/acpi_table.h
new file mode 100644
index 0000000000..921c7f4201
--- /dev/null
+++ b/arch/sandbox/include/asm/acpi_table.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef __ASM_ACPI_TABLE_H__
+#define __ASM_ACPI_TABLE_H__
+
+#endif /* __ASM_ACPI_TABLE_H__ */
diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c
index 8a39c3128e..e2509e391f 100644
--- a/arch/x86/cpu/apollolake/cpu_spl.c
+++ b/arch/x86/cpu/apollolake/cpu_spl.c
@@ -6,13 +6,13 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <dm.h>
 #include <ec_commands.h>
 #include <log.h>
 #include <spi_flash.h>
 #include <spl.h>
 #include <syscon.h>
+#include <acpi/acpi_s3.h>
 #include <asm/cpu.h>
 #include <asm/cpu_common.h>
 #include <asm/cpu_x86.h>
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 1f22c1ea3c..17cf1682ad 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -5,11 +5,11 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <binman.h>
 #include <dm.h>
 #include <irq.h>
 #include <malloc.h>
+#include <acpi/acpi_s3.h>
 #include <asm/intel_pinctrl.h>
 #include <asm/io.h>
 #include <asm/intel_regs.h>
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index aec0c8394c..4ea7c7447b 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -9,10 +9,10 @@
 #define LOG_CATEGORY UCLASS_ACPI_PMC
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <dt-structs.h>
 #include <dm.h>
 #include <spl.h>
+#include <acpi/acpi_s3.h>
 #include <asm/io.h>
 #include <asm/pci.h>
 #include <power/acpi_pmc.h>
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index f44228e693..5772310979 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -4,15 +4,15 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <cpu.h>
 #include <dm.h>
-#include <dm/uclass-internal.h>
-#include <asm/acpi_table.h>
+#include <acpi/acpi_s3.h>
+#include <acpi/acpi_table.h>
 #include <asm/io.h>
 #include <asm/tables.h>
 #include <asm/arch/global_nvs.h>
 #include <asm/arch/iomap.h>
+#include <dm/uclass-internal.h>
 
 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
 		      void *dsdt)
diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
index e698200d70..e8ccaf2212 100644
--- a/arch/x86/cpu/coreboot/timestamp.c
+++ b/arch/x86/cpu/coreboot/timestamp.c
@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * This file is part of the coreboot project.
- *
  * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
+ *
+ * Modified from the coreboot version
  */
 
 #include <common.h>
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index dae06949cc..cec04b481b 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -19,7 +19,6 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <command.h>
 #include <cpu_func.h>
 #include <dm.h>
@@ -27,8 +26,9 @@
 #include <init.h>
 #include <malloc.h>
 #include <syscon.h>
+#include <acpi/acpi_s3.h>
+#include <acpi/acpi_table.h>
 #include <asm/acpi.h>
-#include <asm/acpi_table.h>
 #include <asm/control_regs.h>
 #include <asm/coreboot_tables.h>
 #include <asm/cpu.h>
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index d5b4846e0a..6f3c441618 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -92,46 +92,35 @@ int p2sb_ofdata_to_platdata(struct udevice *dev)
 
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	int ret;
+	u32 base[2];
 
+	ret = dev_read_u32_array(dev, "early-regs", base, ARRAY_SIZE(base));
+	if (ret)
+		return log_msg_ret("Missing/short early-regs", ret);
+	plat->mmio_base = base[0];
+	/* TPL sets up the initial BAR */
 	if (spl_phase() == PHASE_TPL) {
-		u32 base[2];
-
-		/* TPL sets up the initial BAR */
-		ret = dev_read_u32_array(dev, "early-regs", base,
-					 ARRAY_SIZE(base));
-		if (ret)
-			return log_msg_ret("Missing/short early-regs", ret);
-		plat->mmio_base = base[0];
 		plat->bdf = pci_get_devfn(dev);
 		if (plat->bdf < 0)
 			return log_msg_ret("Cannot get p2sb PCI address",
 					   plat->bdf);
 	}
+	upriv->mmio_base = plat->mmio_base;
 #else
 	plat->mmio_base = plat->dtplat.early_regs[0];
 	plat->bdf = pci_ofplat_get_devfn(plat->dtplat.reg[0]);
-#endif
 	upriv->mmio_base = plat->mmio_base;
-	debug("p2sb: mmio_base=%x\n", (uint)plat->mmio_base);
+#endif
 
 	return 0;
 }
 
 static int p2sb_probe(struct udevice *dev)
 {
-	if (spl_phase() == PHASE_TPL) {
+	if (spl_phase() == PHASE_TPL)
 		return p2sb_early_init(dev);
-	} else {
-		struct p2sb_platdata *plat = dev_get_platdata(dev);
-
-		plat->mmio_base = dev_read_addr_pci(dev);
-		/* Don't set BDF since it should not be used */
-		if (!plat->mmio_base || plat->mmio_base == FDT_ADDR_T_NONE)
-			return -EINVAL;
-
-		if (spl_phase() == PHASE_SPL)
-			return p2sb_spl_init(dev);
-	}
+	else if (spl_phase() == PHASE_SPL)
+		return p2sb_spl_init(dev);
 
 	return 0;
 }
diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
index 7b6fc2f4a5..26cda3b337 100644
--- a/arch/x86/cpu/quark/acpi.c
+++ b/arch/x86/cpu/quark/acpi.c
@@ -4,7 +4,7 @@
  */
 
 #include <common.h>
-#include <asm/acpi_table.h>
+#include <acpi/acpi_table.h>
 #include <asm/tables.h>
 #include <asm/arch/global_nvs.h>
 #include <asm/arch/iomap.h>
diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c
index 8b128138b0..4ec8fdd6f8 100644
--- a/arch/x86/cpu/tangier/acpi.c
+++ b/arch/x86/cpu/tangier/acpi.c
@@ -8,13 +8,13 @@
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
-#include <dm/uclass-internal.h>
-#include <asm/acpi_table.h>
+#include <acpi/acpi_table.h>
 #include <asm/ioapic.h>
 #include <asm/mpspec.h>
 #include <asm/tables.h>
 #include <asm/arch/global_nvs.h>
 #include <asm/arch/iomap.h>
+#include <dm/uclass-internal.h>
 
 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
 		      void *dsdt)
diff --git a/arch/x86/cpu/wakeup.S b/arch/x86/cpu/wakeup.S
index 244ca1276a..093bf3bcc5 100644
--- a/arch/x86/cpu/wakeup.S
+++ b/arch/x86/cpu/wakeup.S
@@ -5,7 +5,7 @@
  * From coreboot src/arch/x86/wakeup.S
  */
 
-#include <acpi_s3.h>
+#include <acpi/acpi_s3.h>
 #include <asm/processor.h>
 #include <asm/processor-flags.h>
 
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index af52e11c89..d48ef3573e 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -292,7 +292,7 @@
 				reg = <0x50>;
 				compatible = "google,cr50";
 				u-boot,i2c-offset-len = <0>;
-				ready-gpio = <&gpio_n 28 GPIO_ACTIVE_LOW>;
+				ready-gpios = <&gpio_n 28 GPIO_ACTIVE_LOW>;
 				interrupts-extended = <&acpi_gpe 0x3c 0>;
 			};
 		};
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 7588913f93..928475cef4 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -9,381 +9,14 @@
 #ifndef __ASM_ACPI_TABLE_H__
 #define __ASM_ACPI_TABLE_H__
 
-#define RSDP_SIG		"RSD PTR "	/* RSDP pointer signature */
-#define OEM_ID			"U-BOOT"	/* U-Boot */
-#define OEM_TABLE_ID		"U-BOOTBL"	/* U-Boot Table */
-#define ASLC_ID			"INTL"		/* Intel ASL Compiler */
-
-#define ACPI_RSDP_REV_ACPI_1_0	0
-#define ACPI_RSDP_REV_ACPI_2_0	2
-
-/*
- * RSDP (Root System Description Pointer)
- * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
- */
-struct acpi_rsdp {
-	char signature[8];	/* RSDP signature */
-	u8 checksum;		/* Checksum of the first 20 bytes */
-	char oem_id[6];		/* OEM ID */
-	u8 revision;		/* 0 for ACPI 1.0, others 2 */
-	u32 rsdt_address;	/* Physical address of RSDT (32 bits) */
-	u32 length;		/* Total RSDP length (incl. extended part) */
-	u64 xsdt_address;	/* Physical address of XSDT (64 bits) */
-	u8 ext_checksum;	/* Checksum of the whole table */
-	u8 reserved[3];
-};
-
-/* Generic ACPI header, provided by (almost) all tables */
-struct __packed acpi_table_header {
-	char signature[4];	/* ACPI signature (4 ASCII characters) */
-	u32 length;		/* Table length in bytes (incl. header) */
-	u8 revision;		/* Table version (not ACPI version!) */
-	volatile u8 checksum;	/* To make sum of entire table == 0 */
-	char oem_id[6];		/* OEM identification */
-	char oem_table_id[8];	/* OEM table identification */
-	u32 oem_revision;	/* OEM revision number */
-	char aslc_id[4];	/* ASL compiler vendor ID */
-	u32 aslc_revision;	/* ASL compiler revision number */
-};
-
-/* A maximum number of 32 ACPI tables ought to be enough for now */
-#define MAX_ACPI_TABLES		32
-
-/* RSDT (Root System Description Table) */
-struct acpi_rsdt {
-	struct acpi_table_header header;
-	u32 entry[MAX_ACPI_TABLES];
-};
-
-/* XSDT (Extended System Description Table) */
-struct acpi_xsdt {
-	struct acpi_table_header header;
-	u64 entry[MAX_ACPI_TABLES];
-};
-
-/* FADT Preferred Power Management Profile */
-enum acpi_pm_profile {
-	ACPI_PM_UNSPECIFIED = 0,
-	ACPI_PM_DESKTOP,
-	ACPI_PM_MOBILE,
-	ACPI_PM_WORKSTATION,
-	ACPI_PM_ENTERPRISE_SERVER,
-	ACPI_PM_SOHO_SERVER,
-	ACPI_PM_APPLIANCE_PC,
-	ACPI_PM_PERFORMANCE_SERVER,
-	ACPI_PM_TABLET
-};
-
-/* FADT flags for p_lvl2_lat and p_lvl3_lat */
-#define ACPI_FADT_C2_NOT_SUPPORTED	101
-#define ACPI_FADT_C3_NOT_SUPPORTED	1001
-
-/* FADT Boot Architecture Flags */
-#define ACPI_FADT_LEGACY_FREE		0x00
-#define ACPI_FADT_LEGACY_DEVICES	(1 << 0)
-#define ACPI_FADT_8042			(1 << 1)
-#define ACPI_FADT_VGA_NOT_PRESENT	(1 << 2)
-#define ACPI_FADT_MSI_NOT_SUPPORTED	(1 << 3)
-#define ACPI_FADT_NO_PCIE_ASPM_CONTROL	(1 << 4)
-
-/* FADT Feature Flags */
-#define ACPI_FADT_WBINVD		(1 << 0)
-#define ACPI_FADT_WBINVD_FLUSH		(1 << 1)
-#define ACPI_FADT_C1_SUPPORTED		(1 << 2)
-#define ACPI_FADT_C2_MP_SUPPORTED	(1 << 3)
-#define ACPI_FADT_POWER_BUTTON		(1 << 4)
-#define ACPI_FADT_SLEEP_BUTTON		(1 << 5)
-#define ACPI_FADT_FIXED_RTC		(1 << 6)
-#define ACPI_FADT_S4_RTC_WAKE		(1 << 7)
-#define ACPI_FADT_32BIT_TIMER		(1 << 8)
-#define ACPI_FADT_DOCKING_SUPPORTED	(1 << 9)
-#define ACPI_FADT_RESET_REGISTER	(1 << 10)
-#define ACPI_FADT_SEALED_CASE		(1 << 11)
-#define ACPI_FADT_HEADLESS		(1 << 12)
-#define ACPI_FADT_SLEEP_TYPE		(1 << 13)
-#define ACPI_FADT_PCI_EXPRESS_WAKE	(1 << 14)
-#define ACPI_FADT_PLATFORM_CLOCK	(1 << 15)
-#define ACPI_FADT_S4_RTC_VALID		(1 << 16)
-#define ACPI_FADT_REMOTE_POWER_ON	(1 << 17)
-#define ACPI_FADT_APIC_CLUSTER		(1 << 18)
-#define ACPI_FADT_APIC_PHYSICAL		(1 << 19)
-#define ACPI_FADT_HW_REDUCED_ACPI	(1 << 20)
-#define ACPI_FADT_LOW_PWR_IDLE_S0	(1 << 21)
-
-enum acpi_address_space_type {
-	ACPI_ADDRESS_SPACE_MEMORY = 0,	/* System memory */
-	ACPI_ADDRESS_SPACE_IO,		/* System I/O */
-	ACPI_ADDRESS_SPACE_PCI,		/* PCI config space */
-	ACPI_ADDRESS_SPACE_EC,		/* Embedded controller */
-	ACPI_ADDRESS_SPACE_SMBUS,	/* SMBus */
-	ACPI_ADDRESS_SPACE_PCC = 0x0a,	/* Platform Comm. Channel */
-	ACPI_ADDRESS_SPACE_FIXED = 0x7f	/* Functional fixed hardware */
-};
-
-enum acpi_address_space_size {
-	ACPI_ACCESS_SIZE_UNDEFINED = 0,
-	ACPI_ACCESS_SIZE_BYTE_ACCESS,
-	ACPI_ACCESS_SIZE_WORD_ACCESS,
-	ACPI_ACCESS_SIZE_DWORD_ACCESS,
-	ACPI_ACCESS_SIZE_QWORD_ACCESS
-};
-
-struct acpi_gen_regaddr {
-	u8 space_id;	/* Address space ID */
-	u8 bit_width;	/* Register size in bits */
-	u8 bit_offset;	/* Register bit offset */
-	u8 access_size;	/* Access size */
-	u32 addrl;	/* Register address, low 32 bits */
-	u32 addrh;	/* Register address, high 32 bits */
-};
-
-/* FADT (Fixed ACPI Description Table) */
-struct __packed acpi_fadt {
-	struct acpi_table_header header;
-	u32 firmware_ctrl;
-	u32 dsdt;
-	u8 res1;
-	u8 preferred_pm_profile;
-	u16 sci_int;
-	u32 smi_cmd;
-	u8 acpi_enable;
-	u8 acpi_disable;
-	u8 s4bios_req;
-	u8 pstate_cnt;
-	u32 pm1a_evt_blk;
-	u32 pm1b_evt_blk;
-	u32 pm1a_cnt_blk;
-	u32 pm1b_cnt_blk;
-	u32 pm2_cnt_blk;
-	u32 pm_tmr_blk;
-	u32 gpe0_blk;
-	u32 gpe1_blk;
-	u8 pm1_evt_len;
-	u8 pm1_cnt_len;
-	u8 pm2_cnt_len;
-	u8 pm_tmr_len;
-	u8 gpe0_blk_len;
-	u8 gpe1_blk_len;
-	u8 gpe1_base;
-	u8 cst_cnt;
-	u16 p_lvl2_lat;
-	u16 p_lvl3_lat;
-	u16 flush_size;
-	u16 flush_stride;
-	u8 duty_offset;
-	u8 duty_width;
-	u8 day_alrm;
-	u8 mon_alrm;
-	u8 century;
-	u16 iapc_boot_arch;
-	u8 res2;
-	u32 flags;
-	struct acpi_gen_regaddr reset_reg;
-	u8 reset_value;
-	u16 arm_boot_arch;
-	u8 minor_revision;
-	u32 x_firmware_ctl_l;
-	u32 x_firmware_ctl_h;
-	u32 x_dsdt_l;
-	u32 x_dsdt_h;
-	struct acpi_gen_regaddr x_pm1a_evt_blk;
-	struct acpi_gen_regaddr x_pm1b_evt_blk;
-	struct acpi_gen_regaddr x_pm1a_cnt_blk;
-	struct acpi_gen_regaddr x_pm1b_cnt_blk;
-	struct acpi_gen_regaddr x_pm2_cnt_blk;
-	struct acpi_gen_regaddr x_pm_tmr_blk;
-	struct acpi_gen_regaddr x_gpe0_blk;
-	struct acpi_gen_regaddr x_gpe1_blk;
-};
-
-/* FACS flags */
-#define ACPI_FACS_S4BIOS_F	(1 << 0)
-#define ACPI_FACS_64BIT_WAKE_F	(1 << 1)
-
-/* FACS (Firmware ACPI Control Structure) */
-struct acpi_facs {
-	char signature[4];		/* "FACS" */
-	u32 length;			/* Length in bytes (>= 64) */
-	u32 hardware_signature;		/* Hardware signature */
-	u32 firmware_waking_vector;	/* Firmware waking vector */
-	u32 global_lock;		/* Global lock */
-	u32 flags;			/* FACS flags */
-	u32 x_firmware_waking_vector_l;	/* X FW waking vector, low */
-	u32 x_firmware_waking_vector_h;	/* X FW waking vector, high */
-	u8 version;			/* Version 2 */
-	u8 res1[3];
-	u32 ospm_flags;			/* OSPM enabled flags */
-	u8 res2[24];
-};
-
-/* MADT flags */
-#define ACPI_MADT_PCAT_COMPAT	(1 << 0)
-
-/* MADT (Multiple APIC Description Table) */
-struct acpi_madt {
-	struct acpi_table_header header;
-	u32 lapic_addr;			/* Local APIC address */
-	u32 flags;			/* Multiple APIC flags */
-};
-
-/* MADT: APIC Structure Type*/
-enum acpi_apic_types {
-	ACPI_APIC_LAPIC	= 0,		/* Processor local APIC */
-	ACPI_APIC_IOAPIC,		/* I/O APIC */
-	ACPI_APIC_IRQ_SRC_OVERRIDE,	/* Interrupt source override */
-	ACPI_APIC_NMI_SRC,		/* NMI source */
-	ACPI_APIC_LAPIC_NMI,		/* Local APIC NMI */
-	ACPI_APIC_LAPIC_ADDR_OVERRIDE,	/* Local APIC address override */
-	ACPI_APIC_IOSAPIC,		/* I/O SAPIC */
-	ACPI_APIC_LSAPIC,		/* Local SAPIC */
-	ACPI_APIC_PLATFORM_IRQ_SRC,	/* Platform interrupt sources */
-	ACPI_APIC_LX2APIC,		/* Processor local x2APIC */
-	ACPI_APIC_LX2APIC_NMI,		/* Local x2APIC NMI */
-};
-
-/* MADT: Processor Local APIC Structure */
-
-#define LOCAL_APIC_FLAG_ENABLED	(1 << 0)
-
-struct acpi_madt_lapic {
-	u8 type;		/* Type (0) */
-	u8 length;		/* Length in bytes (8) */
-	u8 processor_id;	/* ACPI processor ID */
-	u8 apic_id;		/* Local APIC ID */
-	u32 flags;		/* Local APIC flags */
-};
-
-/* MADT: I/O APIC Structure */
-struct acpi_madt_ioapic {
-	u8 type;		/* Type (1) */
-	u8 length;		/* Length in bytes (12) */
-	u8 ioapic_id;		/* I/O APIC ID */
-	u8 reserved;
-	u32 ioapic_addr;	/* I/O APIC address */
-	u32 gsi_base;		/* Global system interrupt base */
-};
-
-/* MADT: Interrupt Source Override Structure */
-struct __packed acpi_madt_irqoverride {
-	u8 type;		/* Type (2) */
-	u8 length;		/* Length in bytes (10) */
-	u8 bus;			/* ISA (0) */
-	u8 source;		/* Bus-relative int. source (IRQ) */
-	u32 gsirq;		/* Global system interrupt */
-	u16 flags;		/* MPS INTI flags */
-};
-
-/* MADT: Local APIC NMI Structure */
-struct __packed acpi_madt_lapic_nmi {
-	u8 type;		/* Type (4) */
-	u8 length;		/* Length in bytes (6) */
-	u8 processor_id;	/* ACPI processor ID */
-	u16 flags;		/* MPS INTI flags */
-	u8 lint;		/* Local APIC LINT# */
-};
-
-/* MCFG (PCI Express MMIO config space BAR description table) */
-struct acpi_mcfg {
-	struct acpi_table_header header;
-	u8 reserved[8];
-};
-
-struct acpi_mcfg_mmconfig {
-	u32 base_address_l;
-	u32 base_address_h;
-	u16 pci_segment_group_number;
-	u8 start_bus_number;
-	u8 end_bus_number;
-	u8 reserved[4];
-};
-
-/* PM1_CNT bit defines */
-#define PM1_CNT_SCI_EN		(1 << 0)
-
-/* ACPI global NVS structure */
+struct acpi_facs;
+struct acpi_fadt;
 struct acpi_global_nvs;
-
-/* CSRT (Core System Resource Table) */
-struct acpi_csrt {
-	struct acpi_table_header header;
-};
-
-struct acpi_csrt_group {
-	u32 length;
-	u32 vendor_id;
-	u32 subvendor_id;
-	u16 device_id;
-	u16 subdevice_id;
-	u16 revision;
-	u16 reserved;
-	u32 shared_info_length;
-};
-
-struct acpi_csrt_shared_info {
-	u16 major_version;
-	u16 minor_version;
-	u32 mmio_base_low;
-	u32 mmio_base_high;
-	u32 gsi_interrupt;
-	u8 interrupt_polarity;
-	u8 interrupt_mode;
-	u8 num_channels;
-	u8 dma_address_width;
-	u16 base_request_line;
-	u16 num_handshake_signals;
-	u32 max_block_size;
-};
-
-/* DBG2 definitions are partially used for SPCR interface_type */
-
-/* Types for port_type field */
-
-#define ACPI_DBG2_SERIAL_PORT		0x8000
-#define ACPI_DBG2_1394_PORT		0x8001
-#define ACPI_DBG2_USB_PORT		0x8002
-#define ACPI_DBG2_NET_PORT		0x8003
-
-/* Subtypes for port_subtype field */
-
-#define ACPI_DBG2_16550_COMPATIBLE	0x0000
-#define ACPI_DBG2_16550_SUBSET		0x0001
-#define ACPI_DBG2_ARM_PL011		0x0003
-#define ACPI_DBG2_ARM_SBSA_32BIT	0x000D
-#define ACPI_DBG2_ARM_SBSA_GENERIC	0x000E
-#define ACPI_DBG2_ARM_DCC		0x000F
-#define ACPI_DBG2_BCM2835		0x0010
-
-#define ACPI_DBG2_1394_STANDARD		0x0000
-
-#define ACPI_DBG2_USB_XHCI		0x0000
-#define ACPI_DBG2_USB_EHCI		0x0001
-
-#define ACPI_DBG2_UNKNOWN		0x00FF
-
-/* SPCR (Serial Port Console Redirection table) */
-struct __packed acpi_spcr {
-	struct acpi_table_header header;
-	u8 interface_type;
-	u8 reserved[3];
-	struct acpi_gen_regaddr serial_port;
-	u8 interrupt_type;
-	u8 pc_interrupt;
-	u32 interrupt;		/* Global system interrupt */
-	u8 baud_rate;
-	u8 parity;
-	u8 stop_bits;
-	u8 flow_control;
-	u8 terminal_type;
-	u8 reserved1;
-	u16 pci_device_id;	/* Must be 0xffff if not PCI device */
-	u16 pci_vendor_id;	/* Must be 0xffff if not PCI device */
-	u8 pci_bus;
-	u8 pci_device;
-	u8 pci_function;
-	u32 pci_flags;
-	u8 pci_segment;
-	u32 reserved2;
-};
+struct acpi_madt_ioapic;
+struct acpi_madt_irqoverride;
+struct acpi_madt_lapic_nmi;
+struct acpi_mcfg_mmconfig;
+struct acpi_table_header;
 
 /* These can be used by the target port */
 
diff --git a/arch/x86/include/asm/arch-apollolake/global_nvs.h b/arch/x86/include/asm/arch-apollolake/global_nvs.h
new file mode 100644
index 0000000000..fe62194b02
--- /dev/null
+++ b/arch/x86/include/asm/arch-apollolake/global_nvs.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2015-2017 Intel Corp.
+ * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.)
+ * Copyright Google LLC 2019
+ *
+ * Modified from coreboot apollolake/include/soc/nvs.h
+ */
+
+#ifndef _GLOBAL_NVS_H_
+#define _GLOBAL_NVS_H_
+
+struct __packed acpi_global_nvs {
+	/* Miscellaneous */
+	u8	pcnt; /* 0x00 - Processor Count */
+	u8	ppcm; /* 0x01 - Max PPC State */
+	u8	lids; /* 0x02 - LID State */
+	u8	pwrs; /* 0x03 - AC Power State */
+	u8	dpte; /* 0x04 - Enable DPTF */
+	u32	cbmc; /* 0x05 - 0x08 - U-Boot Console */
+	u64	pm1i; /* 0x09 - 0x10 - System Wake Source - PM1 Index */
+	u64	gpei; /* 0x11 - 0x18 - GPE Wake Source */
+	u64	nhla; /* 0x19 - 0x20 - NHLT Address */
+	u32	nhll; /* 0x21 - 0x24 - NHLT Length */
+	u32	prt0; /* 0x25 - 0x28 - PERST_0 Address */
+	u8	scdp; /* 0x29 - SD_CD GPIO portid */
+	u8	scdo; /* 0x2a - GPIO pad offset relative to the community */
+	u8	uior; /* 0x2b - UART debug controller init on S3 resume */
+	u8	ecps; /* 0x2c - SGX Enabled status */
+	u64	emna; /* 0x2d - 0x34 EPC base address */
+	u64	elng; /* 0x35 - 0x3c EPC Length */
+	u8	unused1[0x100 - 0x3d];		/* Pad out to 256 bytes */
+	u8	unused2[0x1000 - 0x100];	/* Pad out to 4096 bytes */
+};
+
+#endif /* _GLOBAL_NVS_H_ */
diff --git a/arch/x86/include/asm/arch-coreboot/timestamp.h b/arch/x86/include/asm/arch-coreboot/timestamp.h
index 9320afba56..85d42c02c4 100644
--- a/arch/x86/include/asm/arch-coreboot/timestamp.h
+++ b/arch/x86/include/asm/arch-coreboot/timestamp.h
@@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * This file is part of the coreboot project.
- *
  * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
+ *
+ * Taken from the coreboot version
  */
 
 #ifndef __COREBOOT_TIMESTAMP_H__
diff --git a/arch/x86/include/asm/intel_pinctrl_defs.h b/arch/x86/include/asm/intel_pinctrl_defs.h
index 6da06bb52b..1ea141f082 100644
--- a/arch/x86/include/asm/intel_pinctrl_defs.h
+++ b/arch/x86/include/asm/intel_pinctrl_defs.h
@@ -1,7 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * This file is part of the coreboot project.
- *
  * Copyright (C) 2015-2016 Intel Corp.
  * Copyright 2019 Google LLC
  *
diff --git a/arch/x86/lib/acpi.c b/arch/x86/lib/acpi.c
index cba9c24dd4..7431458dcf 100644
--- a/arch/x86/lib/acpi.c
+++ b/arch/x86/lib/acpi.c
@@ -4,7 +4,7 @@
  */
 
 #include <common.h>
-#include <asm/acpi_table.h>
+#include <acpi/acpi_table.h>
 #include <asm/io.h>
 #include <asm/tables.h>
 
diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c
index 197636c4b5..52410a515d 100644
--- a/arch/x86/lib/acpi_s3.c
+++ b/arch/x86/lib/acpi_s3.c
@@ -4,9 +4,9 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
+#include <acpi/acpi_s3.h>
+#include <acpi/acpi_table.h>
 #include <asm/acpi.h>
-#include <asm/acpi_table.h>
 #include <asm/post.h>
 #include <linux/linkage.h>
 
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 66e32f21bd..9346e165d8 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -12,8 +12,8 @@
 #include <dm/uclass-internal.h>
 #include <serial.h>
 #include <version.h>
+#include <acpi/acpi_table.h>
 #include <asm/acpi/global_nvs.h>
-#include <asm/acpi_table.h>
 #include <asm/ioapic.h>
 #include <asm/lapic.h>
 #include <asm/mpspec.h>
@@ -471,6 +471,15 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
 	spcr->pci_device_id = 0xffff;
 	spcr->pci_vendor_id = 0xffff;
 
+	/*
+	 * SPCR has no clue if the UART base clock speed is different
+	 * to the default one. However, the SPCR 1.04 defines baud rate
+	 * 0 as a preconfigured state of UART and OS is supposed not
+	 * to touch the configuration of the serial device.
+	 */
+	if (serial_info.clock != SERIAL_DEFAULT_CLOCK)
+		spcr->baud_rate = 0;
+
 	/* Fix checksum */
 	header->checksum = table_compute_checksum((void *)spcr, header->length);
 }
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index 2943e11d2a..c996fc588d 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -4,9 +4,9 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <malloc.h>
 #include <vbe.h>
+#include <acpi/acpi_s3.h>
 #include <asm/coreboot_tables.h>
 #include <asm/e820.h>
 
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 5eff0f99aa..267527eb34 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -4,11 +4,11 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
 #include <rtc.h>
+#include <acpi/acpi_s3.h>
 #include <asm/cmos_layout.h>
 #include <asm/early_cmos.h>
 #include <asm/io.h>
diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c
index aee2a05044..0a726807c2 100644
--- a/arch/x86/lib/fsp1/fsp_common.c
+++ b/arch/x86/lib/fsp1/fsp_common.c
@@ -4,11 +4,11 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>
 #include <rtc.h>
+#include <acpi/acpi_s3.h>
 #include <asm/cmos_layout.h>
 #include <asm/early_cmos.h>
 #include <asm/io.h>
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index 90a238a224..c8f2c09b6a 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -5,9 +5,9 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <handoff.h>
 #include <spl.h>
+#include <acpi/acpi_s3.h>
 #include <asm/arch/cpu.h>
 #include <asm/fsp/fsp_support.h>
 #include <asm/fsp2/fsp_api.h>
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 7aea722d0b..574d331d76 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -6,10 +6,10 @@
 #include <common.h>
 #include <malloc.h>
 #include <smbios.h>
+#include <acpi/acpi_table.h>
 #include <asm/sfi.h>
 #include <asm/mpspec.h>
 #include <asm/tables.h>
-#include <asm/acpi_table.h>
 #include <asm/coreboot_tables.h>
 
 /**
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index 9b5e767ccc..ffc09630b7 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -16,7 +16,7 @@
 #include <env.h>
 #include <irq_func.h>
 #include <malloc.h>
-#include <asm/acpi_table.h>
+#include <acpi/acpi_table.h>
 #include <asm/io.h>
 #include <asm/ptrace.h>
 #include <asm/zimage.h>
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index 6ca50dc5fd..2811b2cd37 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -26,3 +26,4 @@ CONFIG_SYSRESET=y
 # CONFIG_VIRTIO_PCI is not set
 # CONFIG_VIRTIO_SANDBOX is not set
 # CONFIG_EFI_LOADER is not set
+# CONFIG_ACPIGEN is not set
diff --git a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
index cf0659b70e..8422ff63ab 100644
--- a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
+++ b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
@@ -47,7 +47,7 @@ Example:
 			reg = <0x50>;
 			compatible = "google,cr50";
 			u-boot,i2c-offset-len = <0>;
-			ready-gpio = <&gpio_n GPIO_28 GPIO_ACTIVE_LOW>;
+			ready-gpios = <&gpio_n GPIO_28 GPIO_ACTIVE_LOW>;
 		};
 	};
 
diff --git a/doc/device-tree-bindings/input/hid-over-i2c.txt b/doc/device-tree-bindings/input/hid-over-i2c.txt
new file mode 100644
index 0000000000..c76bafaf98
--- /dev/null
+++ b/doc/device-tree-bindings/input/hid-over-i2c.txt
@@ -0,0 +1,44 @@
+* HID over I2C Device-Tree bindings
+
+HID over I2C provides support for various Human Interface Devices over the
+I2C bus. These devices can be for example touchpads, keyboards, touch screens
+or sensors.
+
+The specification has been written by Microsoft and is currently available here:
+http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx
+
+If this binding is used, the kernel module i2c-hid will handle the communication
+with the device and the generic hid core layer will handle the protocol.
+
+Required properties:
+- compatible: must be "hid-over-i2c"
+- reg: i2c slave address
+- hid-descr-addr: HID descriptor address
+- interrupts: interrupt line
+
+Additional optional properties:
+
+Some devices may support additional optional properties to help with, e.g.,
+power sequencing. The following properties can be supported by one or more
+device-specific compatible properties, which should be used in addition to the
+"hid-over-i2c" string.
+
+- compatible:
+  * "wacom,w9013" (Wacom W9013 digitizer). Supports:
+    - vdd-supply (3.3V)
+    - vddl-supply (1.8V)
+    - post-power-on-delay-ms
+
+- vdd-supply: phandle of the regulator that provides the supply voltage.
+- post-power-on-delay-ms: time required by the device after enabling its regulators
+  or powering it on, before it is ready for communication.
+
+Example:
+
+	i2c-hid-dev@2c {
+		compatible = "hid-over-i2c";
+		reg = <0x2c>;
+		hid-descr-addr = <0x0020>;
+		interrupt-parent = <&gpx3>;
+		interrupts = <3 2>;
+	};
diff --git a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
index d9252bf29f..2fe02d8a22 100644
--- a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
+++ b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
@@ -25,6 +25,6 @@ Example:
 	tpm@50 {
 		reg = <0x50>;
 		compatible = "google,cr50";
-		ready-gpio = <&gpio_n 0x1c GPIO_ACTIVE_LOW>;
+		ready-gpios = <&gpio_n 0x1c GPIO_ACTIVE_LOW>;
 		interrupts-extended = <&acpi_gpe 0x3c 0>;
 	};
diff --git a/doc/device-tree-bindings/pci/x86-pci.txt b/doc/device-tree-bindings/pci/x86-pci.txt
index 3aa5bd9a46..95e370b3e7 100644
--- a/doc/device-tree-bindings/pci/x86-pci.txt
+++ b/doc/device-tree-bindings/pci/x86-pci.txt
@@ -10,6 +10,17 @@ Optional properties:
 	configuration in TPL/SPL to reduce code size and boot time, since these
 	phases only know about a small subset of PCI devices.
 
+For PCI devices the following optional property is available:
+
+- pci,no-autoconfig : Don't automatically configure this PCI device at all.
+	This is used when the device is statically configured and must maintain
+	this same config throughout the boot process. An example is a serial
+	UART being used to debug PCI configuration, since reconfiguring it stops
+	the UART from working until the driver is re-probed, and this can cause
+	output to be lost. This should not generally be used in production code,
+	although it is often harmless.
+
+
 Example:
 
 pci {
@@ -21,4 +32,16 @@ pci {
 		0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000
 		0x01000000 0x0 0x1000 0x1000 0 0xefff>;
 	u-boot,skip-auto-config-until-reloc;
+
+
+	serial: serial@18,2 {
+		reg = <0x0200c210 0 0 0 0>;
+		u-boot,dm-pre-reloc;
+		compatible = "intel,apl-ns16550";
+		early-regs = <0xde000000 0x20>;
+		reg-shift = <2>;
+		clock-frequency = <1843200>;
+		current-speed = <115200>;
+		pci,no-autoconfig;
+	};
 };
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 3b95b5387b..a3b0399342 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -261,4 +261,13 @@ config DM_DEV_READ_INLINE
 	bool
 	default y if !OF_LIVE
 
+config ACPIGEN
+	bool "Support ACPI table generation in driver model"
+	default y if SANDBOX || GENERATE_ACPI_TABLE
+	help
+	  This option enables generation of ACPI tables using driver-model
+	  devices. It adds a new operation struct to each driver, to support
+	  things like generating device-specific tables and returning the ACPI
+	  name of a device.
+
 endmenu
diff --git a/drivers/core/Makefile b/drivers/core/Makefile
index bce7467da1..c707026a3a 100644
--- a/drivers/core/Makefile
+++ b/drivers/core/Makefile
@@ -3,6 +3,7 @@
 # Copyright (c) 2013 Google, Inc
 
 obj-y	+= device.o fdtaddr.o lists.o root.o uclass.o util.o
+obj-$(CONFIG_$(SPL_TPL_)ACPIGEN) += acpi.o
 obj-$(CONFIG_DEVRES) += devres.o
 obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE)	+= device-remove.o
 obj-$(CONFIG_$(SPL_)SIMPLE_BUS)	+= simple-bus.o
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
new file mode 100644
index 0000000000..ba50d688fe
--- /dev/null
+++ b/drivers/core/acpi.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Core driver model support for ACPI table generation
+ *
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#define LOG_CATEOGRY	LOGC_ACPI
+
+#include <common.h>
+#include <dm.h>
+#include <dm/acpi.h>
+#include <dm/root.h>
+
+int acpi_copy_name(char *out_name, const char *name)
+{
+	strncpy(out_name, name, ACPI_NAME_LEN);
+	out_name[ACPI_NAME_LEN] = '\0';
+
+	return 0;
+}
+
+int acpi_get_name(const struct udevice *dev, char *out_name)
+{
+	struct acpi_ops *aops;
+
+	aops = device_get_acpi_ops(dev);
+	if (aops && aops->get_name)
+		return aops->get_name(dev, out_name);
+
+	return -ENOSYS;
+}
diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c
index ff87e8adca..05b384f6a4 100644
--- a/drivers/cpu/cpu_sandbox.c
+++ b/drivers/cpu/cpu_sandbox.c
@@ -19,6 +19,7 @@ int cpu_sandbox_get_info(struct udevice *dev, struct cpu_info *info)
 {
 	info->cpu_freq = 42 * 42 * 42 * 42 * 42;
 	info->features = 0x42424242;
+	info->address_width = IS_ENABLED(CONFIG_PHYS_64BIT) ? 64 : 32;
 
 	return 0;
 }
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index e2882e3b63..d2e10d6868 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -536,6 +536,8 @@ int pci_auto_config_devices(struct udevice *bus)
 		int ret;
 
 		debug("%s: device %s\n", __func__, dev->name);
+		if (dev_read_bool(dev, "pci,no-autoconfig"))
+			continue;
 		ret = dm_pciauto_config_device(dev);
 		if (ret < 0)
 			return ret;
@@ -1211,7 +1213,14 @@ u32 dm_pci_read_bar32(const struct udevice *dev, int barnum)
 
 	bar = PCI_BASE_ADDRESS_0 + barnum * 4;
 	dm_pci_read_config32(dev, bar, &addr);
-	if (addr & PCI_BASE_ADDRESS_SPACE_IO)
+
+	/*
+	 * If we get an invalid address, return this so that comparisons with
+	 * FDT_ADDR_T_NONE work correctly
+	 */
+	if (addr == 0xffffffff)
+		return addr;
+	else if (addr & PCI_BASE_ADDRESS_SPACE_IO)
 		return addr & PCI_BASE_ADDRESS_IO_MASK;
 	else
 		return addr & PCI_BASE_ADDRESS_MEM_MASK;
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 90f224b045..6b17f18bc0 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -33,12 +33,10 @@
 #include <vbe.h>
 #include <video.h>
 #include <video_fb.h>
+#include <acpi/acpi_s3.h>
 #include <linux/screen_info.h>
 
-#ifdef CONFIG_X86
-#include <acpi_s3.h>
 DECLARE_GLOBAL_DATA_PTR;
-#endif
 
 __weak bool board_should_run_oprom(struct udevice *dev)
 {
diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
index d43de87126..1c79f835c6 100644
--- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c
+++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
@@ -6,9 +6,9 @@
 #define LOG_CATEGORY UCLASS_ACPI_PMC
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <dm.h>
 #include <log.h>
+#include <acpi/acpi_s3.h>
 #ifdef CONFIG_X86
 #include <asm/intel_pinctrl.h>
 #endif
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index a2f1b35629..6415d2e1e5 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -476,6 +476,8 @@ static int ns16550_serial_getinfo(struct udevice *dev,
 	info->reg_width = plat->reg_width;
 	info->reg_shift = plat->reg_shift;
 	info->reg_offset = plat->reg_offset;
+	info->clock = plat->clock;
+
 	return 0;
 }
 
diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c
index 1af5cc12f3..545ff3f747 100644
--- a/drivers/serial/sandbox.c
+++ b/drivers/serial/sandbox.c
@@ -198,6 +198,7 @@ static int sandbox_serial_getinfo(struct udevice *dev,
 		.reg_width = 1,
 		.reg_offset = 0,
 		.reg_shift = 0,
+		.clock = SERIAL_DEFAULT_CLOCK,
 	};
 
 	if (!serial_info)
diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c
index 8e2d1eaa7a..bc91143560 100644
--- a/drivers/sysreset/sysreset_x86.c
+++ b/drivers/sysreset/sysreset_x86.c
@@ -6,11 +6,11 @@
  */
 
 #include <common.h>
-#include <acpi_s3.h>
 #include <dm.h>
 #include <efi_loader.h>
 #include <pch.h>
 #include <sysreset.h>
+#include <acpi/acpi_s3.h>
 #include <asm/io.h>
 #include <asm/processor.h>
 
diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
index b904a7d426..b67051af26 100644
--- a/drivers/tpm/cr50_i2c.c
+++ b/drivers/tpm/cr50_i2c.c
@@ -34,6 +34,15 @@ enum {
 	CR50_MAX_BUF_SIZE = 63,
 };
 
+/**
+ * struct cr50_priv - Private driver data
+ *
+ * @ready_gpio: GPIO to use to check if the TPM is ready
+ * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
+ * @locality: Currenttly claimed locality (-1 if none)
+ * @vendor: vendor: Vendor ID for TPM
+ * @use_irq: true to use @irq, false to use @ready if available
+ */
 struct cr50_priv {
 	struct gpio_desc ready_gpio;
 	struct irq irq;
@@ -206,7 +215,7 @@ static int release_locality(struct udevice *dev, int force)
 		cr50_i2c_write(dev, addr, &buf, 1);
 	}
 
-	priv->locality = 0;
+	priv->locality = -1;
 
 	return 0;
 }
@@ -499,6 +508,7 @@ static int process_reset(struct udevice *dev)
 static int claim_locality(struct udevice *dev, int loc)
 {
 	const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
+	struct cr50_priv *priv = dev_get_priv(dev);
 	u8 access;
 	int ret;
 
@@ -525,6 +535,7 @@ static int claim_locality(struct udevice *dev, int loc)
 		return -EPERM;
 	}
 	log_info("Claimed locality %d\n", loc);
+	priv->locality = loc;
 
 	return 0;
 }
@@ -559,7 +570,11 @@ static int cr50_i2c_open(struct udevice *dev)
 
 static int cr50_i2c_cleanup(struct udevice *dev)
 {
-	release_locality(dev, 1);
+	struct cr50_priv *priv = dev_get_priv(dev);
+
+	printf("%s: cleanup %d\n", __func__, priv->locality);
+	if (priv->locality != -1)
+		release_locality(dev, 1);
 
 	return 0;
 }
@@ -592,7 +607,7 @@ static int cr50_i2c_ofdata_to_platdata(struct udevice *dev)
 		priv->irq = irq;
 		priv->use_irq = true;
 	} else {
-		ret = gpio_request_by_name(dev, "ready-gpio", 0,
+		ret = gpio_request_by_name(dev, "ready-gpios", 0,
 					   &priv->ready_gpio, GPIOD_IS_IN);
 		if (ret) {
 			log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
@@ -631,6 +646,7 @@ static int cr50_i2c_probe(struct udevice *dev)
 		return log_msg_ret("vendor-id", -EXDEV);
 	}
 	priv->vendor = vendor;
+	priv->locality = -1;
 
 	return 0;
 }
@@ -655,5 +671,7 @@ U_BOOT_DRIVER(cr50_i2c) = {
 	.ops    = &cr50_i2c_ops,
 	.ofdata_to_platdata	= cr50_i2c_ofdata_to_platdata,
 	.probe	= cr50_i2c_probe,
+	.remove	= cr50_i2c_cleanup,
 	.priv_auto_alloc_size = sizeof(struct cr50_priv),
+	.flags		= DM_FLAG_OS_PREPARE,
 };
diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c
index 1b11c93194..71d5807006 100644
--- a/drivers/tpm/tpm-uclass.c
+++ b/drivers/tpm/tpm-uclass.c
@@ -72,7 +72,7 @@ int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, size_t send_size,
 	struct tpm_ops *ops = tpm_get_ops(dev);
 	ulong start, stop;
 	uint count, ordinal;
-	int ret, ret2;
+	int ret, ret2 = 0;
 
 	if (ops->xfer)
 		return ops->xfer(dev, sendbuf, send_size, recvbuf, recv_size);
@@ -120,9 +120,16 @@ int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, size_t send_size,
 		}
 	} while (ret);
 
-	ret2 = ops->cleanup ? ops->cleanup(dev) : 0;
+	if (ret) {
+		if (ops->cleanup) {
+			ret2 = ops->cleanup(dev);
+			if (ret2)
+				return log_msg_ret("cleanup", ret2);
+		}
+		return log_msg_ret("xfer", ret);
+	}
 
-	return ret2 ? ret2 : ret;
+	return 0;
 }
 
 UCLASS_DRIVER(tpm) = {
diff --git a/include/acpi_s3.h b/include/acpi/acpi_s3.h
similarity index 100%
rename from include/acpi_s3.h
rename to include/acpi/acpi_s3.h
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
new file mode 100644
index 0000000000..194be9aa58
--- /dev/null
+++ b/include/acpi/acpi_table.h
@@ -0,0 +1,512 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Helpers for ACPI table generation
+ *
+ * Based on acpi.c from coreboot
+ *
+ * Copyright 2019 Google LLC
+ *
+ * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
+ * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef __ACPI_TABLE_H__
+#define __ACPI_TABLE_H__
+
+#define RSDP_SIG		"RSD PTR "	/* RSDP pointer signature */
+#define OEM_ID			"U-BOOT"	/* U-Boot */
+#define OEM_TABLE_ID		"U-BOOTBL"	/* U-Boot Table */
+#define ASLC_ID			"INTL"		/* Intel ASL Compiler */
+
+#define ACPI_RSDP_REV_ACPI_1_0	0
+#define ACPI_RSDP_REV_ACPI_2_0	2
+
+#if !defined(__ACPI__)
+
+/*
+ * RSDP (Root System Description Pointer)
+ * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
+ */
+struct acpi_rsdp {
+	char signature[8];	/* RSDP signature */
+	u8 checksum;		/* Checksum of the first 20 bytes */
+	char oem_id[6];		/* OEM ID */
+	u8 revision;		/* 0 for ACPI 1.0, others 2 */
+	u32 rsdt_address;	/* Physical address of RSDT (32 bits) */
+	u32 length;		/* Total RSDP length (incl. extended part) */
+	u64 xsdt_address;	/* Physical address of XSDT (64 bits) */
+	u8 ext_checksum;	/* Checksum of the whole table */
+	u8 reserved[3];
+};
+
+/* Generic ACPI header, provided by (almost) all tables */
+struct __packed acpi_table_header {
+	char signature[4];	/* ACPI signature (4 ASCII characters) */
+	u32 length;		/* Table length in bytes (incl. header) */
+	u8 revision;		/* Table version (not ACPI version!) */
+	volatile u8 checksum;	/* To make sum of entire table == 0 */
+	char oem_id[6];		/* OEM identification */
+	char oem_table_id[8];	/* OEM table identification */
+	u32 oem_revision;	/* OEM revision number */
+	char aslc_id[4];	/* ASL compiler vendor ID */
+	u32 aslc_revision;	/* ASL compiler revision number */
+};
+
+/* A maximum number of 32 ACPI tables ought to be enough for now */
+#define MAX_ACPI_TABLES		32
+
+/* RSDT (Root System Description Table) */
+struct acpi_rsdt {
+	struct acpi_table_header header;
+	u32 entry[MAX_ACPI_TABLES];
+};
+
+/* XSDT (Extended System Description Table) */
+struct acpi_xsdt {
+	struct acpi_table_header header;
+	u64 entry[MAX_ACPI_TABLES];
+};
+
+/* FADT Preferred Power Management Profile */
+enum acpi_pm_profile {
+	ACPI_PM_UNSPECIFIED = 0,
+	ACPI_PM_DESKTOP,
+	ACPI_PM_MOBILE,
+	ACPI_PM_WORKSTATION,
+	ACPI_PM_ENTERPRISE_SERVER,
+	ACPI_PM_SOHO_SERVER,
+	ACPI_PM_APPLIANCE_PC,
+	ACPI_PM_PERFORMANCE_SERVER,
+	ACPI_PM_TABLET
+};
+
+/* FADT flags for p_lvl2_lat and p_lvl3_lat */
+#define ACPI_FADT_C2_NOT_SUPPORTED	101
+#define ACPI_FADT_C3_NOT_SUPPORTED	1001
+
+/* FADT Boot Architecture Flags */
+#define ACPI_FADT_LEGACY_FREE		0x00
+#define ACPI_FADT_LEGACY_DEVICES	BIT(0)
+#define ACPI_FADT_8042			BIT(1)
+#define ACPI_FADT_VGA_NOT_PRESENT	BIT(2)
+#define ACPI_FADT_MSI_NOT_SUPPORTED	BIT(3)
+#define ACPI_FADT_NO_PCIE_ASPM_CONTROL	BIT(4)
+
+/* FADT Feature Flags */
+#define ACPI_FADT_WBINVD		BIT(0)
+#define ACPI_FADT_WBINVD_FLUSH		BIT(1)
+#define ACPI_FADT_C1_SUPPORTED		BIT(2)
+#define ACPI_FADT_C2_MP_SUPPORTED	BIT(3)
+#define ACPI_FADT_POWER_BUTTON		BIT(4)
+#define ACPI_FADT_SLEEP_BUTTON		BIT(5)
+#define ACPI_FADT_FIXED_RTC		BIT(6)
+#define ACPI_FADT_S4_RTC_WAKE		BIT(7)
+#define ACPI_FADT_32BIT_TIMER		BIT(8)
+#define ACPI_FADT_DOCKING_SUPPORTED	BIT(9)
+#define ACPI_FADT_RESET_REGISTER	BIT(10)
+#define ACPI_FADT_SEALED_CASE		BIT(11)
+#define ACPI_FADT_HEADLESS		BIT(12)
+#define ACPI_FADT_SLEEP_TYPE		BIT(13)
+#define ACPI_FADT_PCI_EXPRESS_WAKE	BIT(14)
+#define ACPI_FADT_PLATFORM_CLOCK	BIT(15)
+#define ACPI_FADT_S4_RTC_VALID		BIT(16)
+#define ACPI_FADT_REMOTE_POWER_ON	BIT(17)
+#define ACPI_FADT_APIC_CLUSTER		BIT(18)
+#define ACPI_FADT_APIC_PHYSICAL		BIT(19)
+#define ACPI_FADT_HW_REDUCED_ACPI	BIT(20)
+#define ACPI_FADT_LOW_PWR_IDLE_S0	BIT(21)
+
+enum acpi_address_space_type {
+	ACPI_ADDRESS_SPACE_MEMORY = 0,	/* System memory */
+	ACPI_ADDRESS_SPACE_IO,		/* System I/O */
+	ACPI_ADDRESS_SPACE_PCI,		/* PCI config space */
+	ACPI_ADDRESS_SPACE_EC,		/* Embedded controller */
+	ACPI_ADDRESS_SPACE_SMBUS,	/* SMBus */
+	ACPI_ADDRESS_SPACE_PCC = 0x0a,	/* Platform Comm. Channel */
+	ACPI_ADDRESS_SPACE_FIXED = 0x7f	/* Functional fixed hardware */
+};
+
+enum acpi_address_space_size {
+	ACPI_ACCESS_SIZE_UNDEFINED = 0,
+	ACPI_ACCESS_SIZE_BYTE_ACCESS,
+	ACPI_ACCESS_SIZE_WORD_ACCESS,
+	ACPI_ACCESS_SIZE_DWORD_ACCESS,
+	ACPI_ACCESS_SIZE_QWORD_ACCESS
+};
+
+struct acpi_gen_regaddr {
+	u8 space_id;	/* Address space ID */
+	u8 bit_width;	/* Register size in bits */
+	u8 bit_offset;	/* Register bit offset */
+	u8 access_size;	/* Access size */
+	u32 addrl;	/* Register address, low 32 bits */
+	u32 addrh;	/* Register address, high 32 bits */
+};
+
+/* FADT (Fixed ACPI Description Table) */
+struct __packed acpi_fadt {
+	struct acpi_table_header header;
+	u32 firmware_ctrl;
+	u32 dsdt;
+	u8 res1;
+	u8 preferred_pm_profile;
+	u16 sci_int;
+	u32 smi_cmd;
+	u8 acpi_enable;
+	u8 acpi_disable;
+	u8 s4bios_req;
+	u8 pstate_cnt;
+	u32 pm1a_evt_blk;
+	u32 pm1b_evt_blk;
+	u32 pm1a_cnt_blk;
+	u32 pm1b_cnt_blk;
+	u32 pm2_cnt_blk;
+	u32 pm_tmr_blk;
+	u32 gpe0_blk;
+	u32 gpe1_blk;
+	u8 pm1_evt_len;
+	u8 pm1_cnt_len;
+	u8 pm2_cnt_len;
+	u8 pm_tmr_len;
+	u8 gpe0_blk_len;
+	u8 gpe1_blk_len;
+	u8 gpe1_base;
+	u8 cst_cnt;
+	u16 p_lvl2_lat;
+	u16 p_lvl3_lat;
+	u16 flush_size;
+	u16 flush_stride;
+	u8 duty_offset;
+	u8 duty_width;
+	u8 day_alrm;
+	u8 mon_alrm;
+	u8 century;
+	u16 iapc_boot_arch;
+	u8 res2;
+	u32 flags;
+	struct acpi_gen_regaddr reset_reg;
+	u8 reset_value;
+	u16 arm_boot_arch;
+	u8 minor_revision;
+	u32 x_firmware_ctl_l;
+	u32 x_firmware_ctl_h;
+	u32 x_dsdt_l;
+	u32 x_dsdt_h;
+	struct acpi_gen_regaddr x_pm1a_evt_blk;
+	struct acpi_gen_regaddr x_pm1b_evt_blk;
+	struct acpi_gen_regaddr x_pm1a_cnt_blk;
+	struct acpi_gen_regaddr x_pm1b_cnt_blk;
+	struct acpi_gen_regaddr x_pm2_cnt_blk;
+	struct acpi_gen_regaddr x_pm_tmr_blk;
+	struct acpi_gen_regaddr x_gpe0_blk;
+	struct acpi_gen_regaddr x_gpe1_blk;
+};
+
+/* FADT TABLE Revision values - note these do not match the ACPI revision */
+#define ACPI_FADT_REV_ACPI_1_0		1
+#define ACPI_FADT_REV_ACPI_2_0		3
+#define ACPI_FADT_REV_ACPI_3_0		4
+#define ACPI_FADT_REV_ACPI_4_0		4
+#define ACPI_FADT_REV_ACPI_5_0		5
+#define ACPI_FADT_REV_ACPI_6_0		6
+
+/* MADT TABLE Revision values - note these do not match the ACPI revision */
+#define ACPI_MADT_REV_ACPI_3_0		2
+#define ACPI_MADT_REV_ACPI_4_0		3
+#define ACPI_MADT_REV_ACPI_5_0		3
+#define ACPI_MADT_REV_ACPI_6_0		5
+
+#define ACPI_MCFG_REV_ACPI_3_0		1
+
+/* IVRS Revision Field */
+#define IVRS_FORMAT_FIXED	0x01	/* Type 10h & 11h only */
+#define IVRS_FORMAT_MIXED	0x02	/* Type 10h, 11h, & 40h */
+
+/* FACS flags */
+#define ACPI_FACS_S4BIOS_F		BIT(0)
+#define ACPI_FACS_64BIT_WAKE_F		BIT(1)
+
+/* FACS (Firmware ACPI Control Structure) */
+struct acpi_facs {
+	char signature[4];		/* "FACS" */
+	u32 length;			/* Length in bytes (>= 64) */
+	u32 hardware_signature;		/* Hardware signature */
+	u32 firmware_waking_vector;	/* Firmware waking vector */
+	u32 global_lock;		/* Global lock */
+	u32 flags;			/* FACS flags */
+	u32 x_firmware_waking_vector_l;	/* X FW waking vector, low */
+	u32 x_firmware_waking_vector_h;	/* X FW waking vector, high */
+	u8 version;			/* Version 2 */
+	u8 res1[3];
+	u32 ospm_flags;			/* OSPM enabled flags */
+	u8 res2[24];
+};
+
+/* MADT flags */
+#define ACPI_MADT_PCAT_COMPAT	BIT(0)
+
+/* MADT (Multiple APIC Description Table) */
+struct acpi_madt {
+	struct acpi_table_header header;
+	u32 lapic_addr;			/* Local APIC address */
+	u32 flags;			/* Multiple APIC flags */
+};
+
+/* MADT: APIC Structure Type*/
+enum acpi_apic_types {
+	ACPI_APIC_LAPIC	= 0,		/* Processor local APIC */
+	ACPI_APIC_IOAPIC,		/* I/O APIC */
+	ACPI_APIC_IRQ_SRC_OVERRIDE,	/* Interrupt source override */
+	ACPI_APIC_NMI_SRC,		/* NMI source */
+	ACPI_APIC_LAPIC_NMI,		/* Local APIC NMI */
+	ACPI_APIC_LAPIC_ADDR_OVERRIDE,	/* Local APIC address override */
+	ACPI_APIC_IOSAPIC,		/* I/O SAPIC */
+	ACPI_APIC_LSAPIC,		/* Local SAPIC */
+	ACPI_APIC_PLATFORM_IRQ_SRC,	/* Platform interrupt sources */
+	ACPI_APIC_LX2APIC,		/* Processor local x2APIC */
+	ACPI_APIC_LX2APIC_NMI,		/* Local x2APIC NMI */
+};
+
+/* MADT: Processor Local APIC Structure */
+
+#define LOCAL_APIC_FLAG_ENABLED		BIT(0)
+
+struct acpi_madt_lapic {
+	u8 type;		/* Type (0) */
+	u8 length;		/* Length in bytes (8) */
+	u8 processor_id;	/* ACPI processor ID */
+	u8 apic_id;		/* Local APIC ID */
+	u32 flags;		/* Local APIC flags */
+};
+
+/* MADT: I/O APIC Structure */
+struct acpi_madt_ioapic {
+	u8 type;		/* Type (1) */
+	u8 length;		/* Length in bytes (12) */
+	u8 ioapic_id;		/* I/O APIC ID */
+	u8 reserved;
+	u32 ioapic_addr;	/* I/O APIC address */
+	u32 gsi_base;		/* Global system interrupt base */
+};
+
+/* MADT: Interrupt Source Override Structure */
+struct __packed acpi_madt_irqoverride {
+	u8 type;		/* Type (2) */
+	u8 length;		/* Length in bytes (10) */
+	u8 bus;			/* ISA (0) */
+	u8 source;		/* Bus-relative int. source (IRQ) */
+	u32 gsirq;		/* Global system interrupt */
+	u16 flags;		/* MPS INTI flags */
+};
+
+/* MADT: Local APIC NMI Structure */
+struct __packed acpi_madt_lapic_nmi {
+	u8 type;		/* Type (4) */
+	u8 length;		/* Length in bytes (6) */
+	u8 processor_id;	/* ACPI processor ID */
+	u16 flags;		/* MPS INTI flags */
+	u8 lint;		/* Local APIC LINT# */
+};
+
+/* MCFG (PCI Express MMIO config space BAR description table) */
+struct acpi_mcfg {
+	struct acpi_table_header header;
+	u8 reserved[8];
+};
+
+struct acpi_mcfg_mmconfig {
+	u32 base_address_l;
+	u32 base_address_h;
+	u16 pci_segment_group_number;
+	u8 start_bus_number;
+	u8 end_bus_number;
+	u8 reserved[4];
+};
+
+/* PM1_CNT bit defines */
+#define PM1_CNT_SCI_EN		BIT(0)
+
+/* ACPI global NVS structure */
+struct acpi_global_nvs;
+
+/* CSRT (Core System Resource Table) */
+struct acpi_csrt {
+	struct acpi_table_header header;
+};
+
+struct acpi_csrt_group {
+	u32 length;
+	u32 vendor_id;
+	u32 subvendor_id;
+	u16 device_id;
+	u16 subdevice_id;
+	u16 revision;
+	u16 reserved;
+	u32 shared_info_length;
+};
+
+struct acpi_csrt_shared_info {
+	u16 major_version;
+	u16 minor_version;
+	u32 mmio_base_low;
+	u32 mmio_base_high;
+	u32 gsi_interrupt;
+	u8 interrupt_polarity;
+	u8 interrupt_mode;
+	u8 num_channels;
+	u8 dma_address_width;
+	u16 base_request_line;
+	u16 num_handshake_signals;
+	u32 max_block_size;
+};
+
+enum dmar_type {
+	DMAR_DRHD = 0,
+	DMAR_RMRR = 1,
+	DMAR_ATSR = 2,
+	DMAR_RHSA = 3,
+	DMAR_ANDD = 4
+};
+
+enum {
+	DRHD_INCLUDE_PCI_ALL = BIT(0)
+};
+
+enum dmar_flags {
+	DMAR_INTR_REMAP			= BIT(0),
+	DMAR_X2APIC_OPT_OUT		= BIT(1),
+	DMAR_CTRL_PLATFORM_OPT_IN_FLAG	= BIT(2),
+};
+
+struct dmar_entry {
+	u16 type;
+	u16 length;
+	u8 flags;
+	u8 reserved;
+	u16 segment;
+	u64 bar;
+};
+
+struct dmar_rmrr_entry {
+	u16 type;
+	u16 length;
+	u16 reserved;
+	u16 segment;
+	u64 bar;
+	u64 limit;
+};
+
+/* DMAR (DMA Remapping Reporting Structure) */
+struct __packed acpi_dmar {
+	struct acpi_table_header header;
+	u8 host_address_width;
+	u8 flags;
+	u8 reserved[10];
+	struct dmar_entry structure[0];
+};
+
+/* DBG2 definitions are partially used for SPCR interface_type */
+
+/* Types for port_type field */
+
+#define ACPI_DBG2_SERIAL_PORT		0x8000
+#define ACPI_DBG2_1394_PORT		0x8001
+#define ACPI_DBG2_USB_PORT		0x8002
+#define ACPI_DBG2_NET_PORT		0x8003
+
+/* Subtypes for port_subtype field */
+
+#define ACPI_DBG2_16550_COMPATIBLE	0x0000
+#define ACPI_DBG2_16550_SUBSET		0x0001
+#define ACPI_DBG2_ARM_PL011		0x0003
+#define ACPI_DBG2_ARM_SBSA_32BIT	0x000D
+#define ACPI_DBG2_ARM_SBSA_GENERIC	0x000E
+#define ACPI_DBG2_ARM_DCC		0x000F
+#define ACPI_DBG2_BCM2835		0x0010
+
+#define ACPI_DBG2_1394_STANDARD		0x0000
+
+#define ACPI_DBG2_USB_XHCI		0x0000
+#define ACPI_DBG2_USB_EHCI		0x0001
+
+#define ACPI_DBG2_UNKNOWN		0x00FF
+
+/* SPCR (Serial Port Console Redirection table) */
+struct __packed acpi_spcr {
+	struct acpi_table_header header;
+	u8 interface_type;
+	u8 reserved[3];
+	struct acpi_gen_regaddr serial_port;
+	u8 interrupt_type;
+	u8 pc_interrupt;
+	u32 interrupt;		/* Global system interrupt */
+	u8 baud_rate;
+	u8 parity;
+	u8 stop_bits;
+	u8 flow_control;
+	u8 terminal_type;
+	u8 reserved1;
+	u16 pci_device_id;	/* Must be 0xffff if not PCI device */
+	u16 pci_vendor_id;	/* Must be 0xffff if not PCI device */
+	u8 pci_bus;
+	u8 pci_device;
+	u8 pci_function;
+	u32 pci_flags;
+	u8 pci_segment;
+	u32 reserved2;
+};
+
+/* Tables defined/reserved by ACPI and generated by U-Boot */
+enum acpi_tables {
+	ACPITAB_BERT,
+	ACPITAB_DBG2,
+	ACPITAB_DMAR,
+	ACPITAB_DSDT,
+	ACPITAB_ECDT,
+	ACPITAB_FACS,
+	ACPITAB_FADT,
+	ACPITAB_HEST,
+	ACPITAB_HPET,
+	ACPITAB_IVRS,
+	ACPITAB_MADT,
+	ACPITAB_MCFG,
+	ACPITAB_NHLT,
+	ACPITAB_RSDP,
+	ACPITAB_RSDT,
+	ACPITAB_SLIT,
+	ACPITAB_SPCR,
+	ACPITAB_SPMI,
+	ACPITAB_SRAT,
+	ACPITAB_SSDT,
+	ACPITAB_TCPA,
+	ACPITAB_TPM2,
+	ACPITAB_VFCT,
+	ACPITAB_XSDT,
+
+	ACPITAB_COUNT,
+};
+
+/**
+ * acpi_get_table_revision() - Get the revision number generated for a table
+ *
+ * This keeps the version-number information in one place
+ *
+ * @table: ACPI table to check
+ * @return version number that U-Boot generates
+ */
+int acpi_get_table_revision(enum acpi_tables table);
+
+/**
+ * acpi_create_dmar() - Create a DMA Remapping Reporting (DMAR) table
+ *
+ * @dmar: Place to put the table
+ * @flags: DMAR flags to use
+ * @return 0 if OK, -ve on error
+ */
+int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
+
+#endif /* !__ACPI__*/
+
+#include <asm/acpi_table.h>
+
+#endif /* __ACPI_TABLE_H__ */
diff --git a/include/cpu.h b/include/cpu.h
index 28dd48feb8..6b1b6b37b3 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -44,10 +44,12 @@ enum {
  *
  * @cpu_freq:	Current CPU frequency in Hz
  * @features:	Flags for supported CPU features
+ * @address_width:	Width of the CPU address space in bits (e.g. 32)
  */
 struct cpu_info {
 	ulong cpu_freq;
 	ulong features;
+	uint address_width;
 };
 
 struct cpu_ops {
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
new file mode 100644
index 0000000000..49257914ff
--- /dev/null
+++ b/include/dm/acpi.h
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Core ACPI (Advanced Configuration and Power Interface) support
+ *
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#ifndef __DM_ACPI_H__
+#define __DM_ACPI_H__
+
+/* Allow operations to be optional for ACPI */
+#if CONFIG_IS_ENABLED(ACPIGEN)
+#define ACPI_OPS_PTR(_ptr)	.acpi_ops	= _ptr,
+#else
+#define ACPI_OPS_PTR(_ptr)
+#endif
+
+/* Length of an ACPI name string, excluding nul terminator */
+#define ACPI_NAME_LEN	4
+
+/* Length of an ACPI name string including nul terminator */
+#define ACPI_NAME_MAX	(ACPI_NAME_LEN + 1)
+
+#if !defined(__ACPI__)
+
+/**
+ * struct acpi_ops - ACPI operations supported by driver model
+ */
+struct acpi_ops {
+	/**
+	 * get_name() - Obtain the ACPI name of a device
+	 *
+	 * @dev: Device to check
+	 * @out_name: Place to put the name, must hold at least ACPI_NAME_MAX
+	 *	bytes
+	 * @return 0 if OK, -ENOENT if no name is available, other -ve value on
+	 *	other error
+	 */
+	int (*get_name)(const struct udevice *dev, char *out_name);
+};
+
+#define device_get_acpi_ops(dev)	((dev)->driver->acpi_ops)
+
+/**
+ * acpi_get_name() - Obtain the ACPI name of a device
+ *
+ * @dev: Device to check
+ * @out_name: Place to put the name, must hold at least ACPI_NAME_MAX
+ *	bytes
+ * @return 0 if OK, -ENOENT if no name is available, other -ve value on
+ *	other error
+ */
+int acpi_get_name(const struct udevice *dev, char *out_name);
+
+/**
+ * acpi_copy_name() - Copy an ACPI name to an output buffer
+ *
+ * This convenience function can be used to return a literal string as a name
+ * in functions that implement the get_name() method.
+ *
+ * For example:
+ *
+ *	static int mydev_get_name(const struct udevice *dev, char *out_name)
+ *	{
+ *		return acpi_copy_name(out_name, "WIBB");
+ *	}
+ *
+ * @out_name: Place to put the name
+ * @name: Name to copy
+ * @return 0 (always)
+ */
+int acpi_copy_name(char *out_name, const char *name);
+
+#endif /* __ACPI__ */
+
+#endif
diff --git a/include/dm/device.h b/include/dm/device.h
index a56164b19b..35e19d8700 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -245,6 +245,8 @@ struct udevice_id {
  * pointers defined by the driver, to implement driver functions required by
  * the uclass.
  * @flags: driver flags - see DM_FLAGS_...
+ * @acpi_ops: Advanced Configuration and Power Interface (ACPI) operations,
+ * allowing the device to add things to the ACPI tables passed to Linux
  */
 struct driver {
 	char *name;
@@ -264,6 +266,9 @@ struct driver {
 	int per_child_platdata_auto_alloc_size;
 	const void *ops;	/* driver-specific operations */
 	uint32_t flags;
+#if CONFIG_IS_ENABLED(ACPIGEN)
+	struct acpi_ops *acpi_ops;
+#endif
 };
 
 /* Declare a new U-Boot driver */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 598f65ea7a..37ada51f9f 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -20,6 +20,7 @@ enum uclass_id {
 	UCLASS_TEST_PROBE,
 	UCLASS_TEST_DUMMY,
 	UCLASS_TEST_DEVRES,
+	UCLASS_TEST_ACPI,
 	UCLASS_SPI_EMUL,	/* sandbox SPI device emulator */
 	UCLASS_I2C_EMUL,	/* sandbox I2C device emulator */
 	UCLASS_I2C_EMUL_PARENT,	/* parent for I2C device emulators */
diff --git a/include/log.h b/include/log.h
index 62fb8afbd0..fbcbd42fb4 100644
--- a/include/log.h
+++ b/include/log.h
@@ -51,6 +51,8 @@ enum log_category_t {
 	LOGC_SANDBOX,	/* Related to the sandbox board */
 	LOGC_BLOBLIST,	/* Bloblist */
 	LOGC_DEVRES,	/* Device resources (devres_... functions) */
+	/* Advanced Configuration and Power Interface (ACPI) */
+	LOGC_ACPI,
 
 	LOGC_COUNT,	/* Number of log categories */
 	LOGC_END,	/* Sentinel value for a list of log categories */
diff --git a/include/serial.h b/include/serial.h
index 104f34ff91..54b21a0470 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -139,6 +139,7 @@ enum adr_space_type {
  * @reg_width:	size (in bytes) of the IO accesses to the registers
  * @reg_offset:	offset to apply to the @addr from the start of the registers
  * @reg_shift:	quantity to shift the register offsets by
+ * @clock:	UART base clock speed in Hz
  * @baudrate:	baud rate
  */
 struct serial_device_info {
@@ -148,10 +149,12 @@ struct serial_device_info {
 	u8 reg_width;
 	u8 reg_offset;
 	u8 reg_shift;
+	unsigned int clock;
 	unsigned int baudrate;
 };
 
 #define SERIAL_DEFAULT_ADDRESS	0xBADACCE5
+#define SERIAL_DEFAULT_CLOCK	(16 * 115200)
 
 /**
  * struct struct dm_serial_ops - Driver model serial operations
diff --git a/include/spi.h b/include/spi.h
index 852f570eaa..2b4929fc79 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -66,6 +66,39 @@ struct dm_spi_slave_platdata {
 
 #endif /* CONFIG_DM_SPI */
 
+/**
+ * enum spi_clock_phase - indicates  the clock phase to use for SPI (CPHA)
+ *
+ * @SPI_CLOCK_PHASE_FIRST: Data sampled on the first phase
+ * @SPI_CLOCK_PHASE_SECOND: Data sampled on the second phase
+ */
+enum spi_clock_phase {
+	SPI_CLOCK_PHASE_FIRST,
+	SPI_CLOCK_PHASE_SECOND,
+};
+
+/**
+ * enum spi_wire_mode - indicates the number of wires used for SPI
+ *
+ * @SPI_4_WIRE_MODE: Normal bidirectional mode with MOSI and MISO
+ * @SPI_3_WIRE_MODE: Unidirectional version with a single data line SISO
+ */
+enum spi_wire_mode {
+	SPI_4_WIRE_MODE,
+	SPI_3_WIRE_MODE,
+};
+
+/**
+ * enum spi_polarity - indicates the polarity of the SPI bus (CPOL)
+ *
+ * @SPI_POLARITY_LOW: Clock is low in idle state
+ * @SPI_POLARITY_HIGH: Clock is high in idle state
+ */
+enum spi_polarity {
+	SPI_POLARITY_LOW,
+	SPI_POLARITY_HIGH,
+};
+
 /**
  * struct spi_slave - Representation of a SPI slave
  *
diff --git a/include/test/ut.h b/include/test/ut.h
index 04df8ba3af..39d15953ed 100644
--- a/include/test/ut.h
+++ b/include/test/ut.h
@@ -8,6 +8,7 @@
 #ifndef __TEST_UT_H
 #define __TEST_UT_H
 
+#include <hexdump.h>
 #include <linux/err.h>
 
 struct unit_test_state;
diff --git a/lib/Makefile b/lib/Makefile
index 32bf3f3693..5f88d92850 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -58,6 +58,7 @@ obj-$(CONFIG_TPM_V1) += tpm-v1.o
 obj-$(CONFIG_TPM_V2) += tpm-v2.o
 endif
 
+obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi/
 obj-$(CONFIG_$(SPL_)RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
diff --git a/lib/acpi/Makefile b/lib/acpi/Makefile
new file mode 100644
index 0000000000..660491ef71
--- /dev/null
+++ b/lib/acpi/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += acpi_table.o
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
new file mode 100644
index 0000000000..4633dcb948
--- /dev/null
+++ b/lib/acpi/acpi_table.c
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Generic code used to generate ACPI tables
+ *
+ * Copyright 2019 Google LLC
+ */
+
+#include <common.h>
+#include <acpi/acpi_table.h>
+#include <dm.h>
+#include <cpu.h>
+
+/* Temporary change to ensure bisectability */
+#ifndef CONFIG_SANDBOX
+int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags)
+{
+	struct acpi_table_header *header = &dmar->header;
+	struct cpu_info info;
+	struct udevice *cpu;
+	int ret;
+
+	ret = uclass_first_device(UCLASS_CPU, &cpu);
+	if (ret)
+		return log_msg_ret("cpu", ret);
+	ret = cpu_get_info(cpu, &info);
+	if (ret)
+		return log_msg_ret("info", ret);
+	memset((void *)dmar, 0, sizeof(struct acpi_dmar));
+
+	/* Fill out header fields. */
+	acpi_fill_header(&dmar->header, "DMAR");
+	header->length = sizeof(struct acpi_dmar);
+	header->revision = acpi_get_table_revision(ACPITAB_DMAR);
+
+	dmar->host_address_width = info.address_width - 1;
+	dmar->flags = flags;
+
+	return 0;
+}
+#endif
+
+int acpi_get_table_revision(enum acpi_tables table)
+{
+	switch (table) {
+	case ACPITAB_FADT:
+		return ACPI_FADT_REV_ACPI_3_0;
+	case ACPITAB_MADT:
+		return ACPI_MADT_REV_ACPI_3_0;
+	case ACPITAB_MCFG:
+		return ACPI_MCFG_REV_ACPI_3_0;
+	case ACPITAB_TCPA:
+		/* This version and the rest are open-coded */
+		return 2;
+	case ACPITAB_TPM2:
+		return 4;
+	case ACPITAB_SSDT: /* ACPI 3.0 upto 6.3: 2 */
+		return 2;
+	case ACPITAB_SRAT: /* ACPI 2.0: 1, ACPI 3.0: 2, ACPI 4.0 to 6.3: 3 */
+		return 1; /* TODO Should probably be upgraded to 2 */
+	case ACPITAB_DMAR:
+		return 1;
+	case ACPITAB_SLIT: /* ACPI 2.0 upto 6.3: 1 */
+		return 1;
+	case ACPITAB_SPMI: /* IMPI 2.0 */
+		return 5;
+	case ACPITAB_HPET: /* Currently 1. Table added in ACPI 2.0 */
+		return 1;
+	case ACPITAB_VFCT: /* ACPI 2.0/3.0/4.0: 1 */
+		return 1;
+	case ACPITAB_IVRS:
+		return IVRS_FORMAT_FIXED;
+	case ACPITAB_DBG2:
+		return 0;
+	case ACPITAB_FACS: /* ACPI 2.0/3.0: 1, ACPI 4.0 to 6.3: 2 */
+		return 1;
+	case ACPITAB_RSDT: /* ACPI 1.0 upto 6.3: 1 */
+		return 1;
+	case ACPITAB_XSDT: /* ACPI 2.0 upto 6.3: 1 */
+		return 1;
+	case ACPITAB_RSDP: /* ACPI 2.0 upto 6.3: 2 */
+		return 2;
+	case ACPITAB_HEST:
+		return 1;
+	case ACPITAB_NHLT:
+		return 5;
+	case ACPITAB_BERT:
+		return 1;
+	case ACPITAB_SPCR:
+		return 2;
+	default:
+		return -EINVAL;
+	}
+}
diff --git a/lib/efi_loader/efi_acpi.c b/lib/efi_loader/efi_acpi.c
index a4e5e53d15..9ae9c25c51 100644
--- a/lib/efi_loader/efi_acpi.c
+++ b/lib/efi_loader/efi_acpi.c
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <efi_loader.h>
-#include <asm/acpi_table.h>
+#include <acpi/acpi_table.h>
 
 static const efi_guid_t acpi_guid = EFI_ACPI_TABLE_GUID;
 
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 8decb0e451..1c8cb7488f 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -437,8 +437,8 @@ ASL_TMP = $(patsubst %.c,%.asl.tmp,$@)
 
 quiet_cmd_acpi_c_asl= ASL     $<
 cmd_acpi_c_asl=         \
-	$(CPP) -x assembler-with-cpp -D__ASSEMBLY__ -P $(UBOOTINCLUDE) \
-		-o $(ASL_TMP) $< && \
+	$(CPP) -x assembler-with-cpp -D__ASSEMBLY__ -D__ACPI__ \
+		-P $(UBOOTINCLUDE) -o $(ASL_TMP) $< && \
 	iasl -p $@ -tc $(ASL_TMP) $(if $(KBUILD_VERBOSE:1=), >/dev/null) && \
 	mv $(patsubst %.c,%.hex,$@) $@
 
diff --git a/test/dm/Makefile b/test/dm/Makefile
index dd1ceff86c..3daf8a544e 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_UT_DM) += test-uclass.o
 # subsystem you must add sandbox tests here.
 obj-$(CONFIG_UT_DM) += core.o
 ifneq ($(CONFIG_SANDBOX),)
+obj-$(CONFIG_ACPIGEN) += acpi.o
 obj-$(CONFIG_SOUND) += audio.o
 obj-$(CONFIG_BLK) += blk.o
 obj-$(CONFIG_BOARD) += board.o
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
new file mode 100644
index 0000000000..e7b8abd556
--- /dev/null
+++ b/test/dm/acpi.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Tests for ACPI table generation
+ *
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <acpi/acpi_table.h>
+#include <dm/acpi.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+#define ACPI_TEST_DEV_NAME	"ABCD"
+
+static int testacpi_get_name(const struct udevice *dev, char *out_name)
+{
+	return acpi_copy_name(out_name, ACPI_TEST_DEV_NAME);
+}
+
+struct acpi_ops testacpi_ops = {
+	.get_name	= testacpi_get_name,
+};
+
+static const struct udevice_id testacpi_ids[] = {
+	{ .compatible = "denx,u-boot-acpi-test" },
+	{ }
+};
+
+U_BOOT_DRIVER(testacpi_drv) = {
+	.name	= "testacpi_drv",
+	.of_match	= testacpi_ids,
+	.id	= UCLASS_TEST_ACPI,
+	ACPI_OPS_PTR(&testacpi_ops)
+};
+
+UCLASS_DRIVER(testacpi) = {
+	.name		= "testacpi",
+	.id		= UCLASS_TEST_ACPI,
+};
+
+/* Test ACPI get_name() */
+static int dm_test_acpi_get_name(struct unit_test_state *uts)
+{
+	char name[ACPI_NAME_MAX];
+	struct udevice *dev;
+
+	ut_assertok(uclass_first_device_err(UCLASS_TEST_ACPI, &dev));
+	ut_assertok(acpi_get_name(dev, name));
+	ut_asserteq_str(ACPI_TEST_DEV_NAME, name);
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_get_name, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test acpi_get_table_revision() */
+static int dm_test_acpi_get_table_revision(struct unit_test_state *uts)
+{
+	ut_asserteq(1, acpi_get_table_revision(ACPITAB_MCFG));
+	ut_asserteq(2, acpi_get_table_revision(ACPITAB_RSDP));
+	ut_asserteq(4, acpi_get_table_revision(ACPITAB_TPM2));
+	ut_asserteq(-EINVAL, acpi_get_table_revision(ACPITAB_COUNT));
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_get_table_revision,
+	DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Temporary change to ensure bisectability */
+#ifndef CONFIG_SANDBOX
+/* Test acpi_create_dmar() */
+static int dm_test_acpi_create_dmar(struct unit_test_state *uts)
+{
+	struct acpi_dmar dmar;
+
+	ut_assertok(acpi_create_dmar(&dmar, DMAR_INTR_REMAP));
+	ut_asserteq(DMAR_INTR_REMAP, dmar.flags);
+	ut_asserteq(32 - 1, dmar.host_address_width);
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_create_dmar, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+#endif
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index f5f1caef71..e6dc576ea3 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -33,6 +33,7 @@ static int dm_test_cpu(struct unit_test_state *uts)
 	ut_assertok(cpu_get_info(dev, &info));
 	ut_asserteq(info.cpu_freq, 42 * 42 * 42 * 42 * 42);
 	ut_asserteq(info.features, 0x42424242);
+	ut_asserteq(info.address_width, 32);
 
 	ut_asserteq(cpu_get_count(dev), 42);
 
diff --git a/test/dm/serial.c b/test/dm/serial.c
index 3d741a8c36..c6be6ab7ab 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -29,6 +29,7 @@ static int dm_test_serial(struct unit_test_state *uts)
 	ut_assertok(serial_getinfo(dev_serial, &info_serial));
 	ut_assert(info_serial.type == SERIAL_CHIP_UNKNOWN);
 	ut_assert(info_serial.addr == SERIAL_DEFAULT_ADDRESS);
+	ut_assert(info_serial.clock == SERIAL_DEFAULT_CLOCK);
 	/*
 	 * test with a parameter which is NULL pointer
 	 */