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tegra: pwm: Allow the clock rate to be left as is
When enabling a PWM, allow the existing clock rate and source to stand unchanged. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -31,7 +31,7 @@ struct pwm_ctlr {
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* Program the PWM with the given parameters.
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* Program the PWM with the given parameters.
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*
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*
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* @param channel PWM channel to update
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* @param channel PWM channel to update
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* @param rate Clock rate to use for PWM
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* @param rate Clock rate to use for PWM, or 0 to leave alone
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* @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high,
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* @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high,
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* n = n/256 pulse high
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* n = n/256 pulse high
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* @param freq_divider frequency divider value (1 to use rate as is)
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* @param freq_divider frequency divider value (1 to use rate as is)
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@ -24,7 +24,10 @@ void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider)
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assert(channel < PWM_NUM_CHANNELS);
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assert(channel < PWM_NUM_CHANNELS);
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/* TODO: Can we use clock_adjust_periph_pll_div() here? */
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/* TODO: Can we use clock_adjust_periph_pll_div() here? */
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clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, rate);
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if (rate) {
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clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ,
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rate);
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}
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reg = PWM_ENABLE_MASK;
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reg = PWM_ENABLE_MASK;
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reg |= pulse_width << PWM_WIDTH_SHIFT;
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reg |= pulse_width << PWM_WIDTH_SHIFT;
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