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tegra: pwm: Allow the clock rate to be left as is

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When enabling a PWM, allow the existing clock rate and source to stand
unchanged.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Simon Glass 2015-04-14 21:03:23 -06:00 committed by Tom Warren
parent 1c82c2f60a
commit db043785bb
2 changed files with 5 additions and 2 deletions
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2
arch/arm/include/asm/arch-tegra/pwm.h
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@ -31,7 +31,7 @@ struct pwm_ctlr {
* Program the PWM with the given parameters.
*
* @param channel PWM channel to update
* @param rate Clock rate to use for PWM
* @param rate Clock rate to use for PWM, or 0 to leave alone
* @param pulse_width high pulse width: 0=always low, 1=1/256 pulse high,
* n = n/256 pulse high
* @param freq_divider frequency divider value (1 to use rate as is)

5
arch/arm/mach-tegra/pwm.c
View File

@ -24,7 +24,10 @@ void pwm_enable(unsigned channel, int rate, int pulse_width, int freq_divider)
assert(channel < PWM_NUM_CHANNELS);
/* TODO: Can we use clock_adjust_periph_pll_div() here? */
clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, rate);
if (rate) {
clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ,
rate);
}
reg = PWM_ENABLE_MASK;
reg |= pulse_width << PWM_WIDTH_SHIFT;