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https://github.com/brain-hackers/u-boot-brain
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imx: nandbcb: add support for i.MX7
Add support for updating FCB/DBBT on i.MX7: - additional new fields in FCB structure - Leverage hardware BCH/randomizer for writing FCB Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
This commit is contained in:
Igor Opaniuk
Stefano Babic
parent
9ab5f221a5
commit
dad30dd72b
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@ -106,6 +106,18 @@ struct fcb_block {
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/* The swap position of main area in spare area */
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u32 spare_offset;
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/* Actual for iMX7 only */
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u32 onfi_sync_enable;
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u32 onfi_sync_speed;
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u32 onfi_sync_nand_data;
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u32 reserved2[6];
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u32 disbbm_search;
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u32 disbbm_search_limit;
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u32 reserved3[15];
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u32 read_retry_enable;
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u32 reserved4[1];
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u32 fill_to_1024[183];
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};
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#endif /* _IMX_NAND_BCB_H_ */
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@ -82,7 +82,7 @@ config CMD_NANDBCB
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bool "i.MX6 NAND Boot Control Block(BCB) command"
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depends on NAND && CMD_MTDPARTS
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select BCH if MX6UL || MX6ULL
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default y if ARCH_MX6 && NAND_MXS
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default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS)
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help
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Unlike normal 'nand write/erase' commands, this command update
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Boot Control Block(BCB) for i.MX6 platform NAND IP's.
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@ -17,6 +17,7 @@
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#include <linux/bch.h>
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#include <linux/mtd/mtd.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/mach-imx/imx-nandbcb.h>
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#include <asm/mach-imx/imximage.cfg>
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#include <mxs_nand.h>
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@ -131,26 +132,36 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
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struct mxs_nand_layout l;
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mxs_nand_get_layout(mtd, &l);
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fcb->fingerprint = FCB_FINGERPRINT;
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fcb->version = FCB_VERSION_1;
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fcb->pagesize = mtd->writesize;
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fcb->oob_pagesize = mtd->writesize + mtd->oobsize;
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fcb->sectors = mtd->erasesize / mtd->writesize;
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/* Divide ECC strength by two and save the value into FCB structure. */
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fcb->ecc_level = nand_info->bch_geometry.ecc_strength >> 1;
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fcb->ecc_type = fcb->ecc_level;
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fcb->meta_size = l.meta_size;
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fcb->nr_blocks = l.nblocks;
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fcb->ecc_nr = l.data0_size;
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fcb->ecc_level = l.ecc0;
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fcb->ecc_size = l.datan_size;
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fcb->ecc_type = l.eccn;
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/* Also hardcoded in kobs-ng */
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fcb->ecc_nr = 0x00000200;
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fcb->ecc_size = 0x00000200;
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fcb->datasetup = 80;
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fcb->datahold = 60;
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fcb->addr_setup = 25;
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fcb->dsample_time = 6;
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fcb->meta_size = 10;
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if (is_mx6()) {
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fcb->datasetup = 80;
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fcb->datahold = 60;
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fcb->addr_setup = 25;
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fcb->dsample_time = 6;
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} else if (is_mx7()) {
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fcb->datasetup = 10;
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fcb->datahold = 7;
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fcb->addr_setup = 15;
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fcb->dsample_time = 6;
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}
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/* DBBT search area starts at second page on first block */
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fcb->dbbt_start = 1;
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@ -162,6 +173,9 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd)
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fcb->nr_blocks = mtd->writesize / fcb->ecc_nr - 1;
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fcb->disbbm = 0;
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fcb->disbbm_search = 0;
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fcb->checksum = calc_chksum((void *)fcb + 4, sizeof(*fcb) - 4);
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}
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@ -197,6 +211,7 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size,
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size_t fwsize, dummy;
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int i, ret;
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fcb_raw_page = 0;
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/* erase */
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memset(&opts, 0, sizeof(opts));
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opts.offset = off;
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@ -287,50 +302,79 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size,
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else if (ret > 0)
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dbbt->dbbtpages = 1;
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/* write fcb/dbbt */
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fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
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if (!fcb_raw_page) {
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debug("failed to allocate fcb_raw_page\n");
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ret = -ENOMEM;
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goto dbbt_data_page_err;
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}
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/*
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* We prepare raw page only for i.MX6, for i.MX7 we
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* leverage BCH hw module instead
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*/
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if (is_mx6()) {
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/* write fcb/dbbt */
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fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize,
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GFP_KERNEL);
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if (!fcb_raw_page) {
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debug("failed to allocate fcb_raw_page\n");
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ret = -ENOMEM;
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goto dbbt_data_page_err;
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}
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#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
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/* 40 bit BCH, for i.MX6UL(L) */
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encode_bch_ecc(fcb_raw_page + 32, fcb, 40);
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/* 40 bit BCH, for i.MX6UL(L) */
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encode_bch_ecc(fcb_raw_page + 32, fcb, 40);
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#else
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memcpy(fcb_raw_page + 12, fcb, sizeof(struct fcb_block));
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encode_hamming_13_8(fcb_raw_page + 12, fcb_raw_page + 12 + 512, 512);
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memcpy(fcb_raw_page + 12, fcb, sizeof(struct fcb_block));
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encode_hamming_13_8(fcb_raw_page + 12,
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fcb_raw_page + 12 + 512, 512);
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#endif
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/*
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* Set the first and second byte of OOB data to 0xFF, not 0x00. These
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* bytes are used as the Manufacturers Bad Block Marker (MBBM). Since
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* the FCB is mostly written to the first page in a block, a scan for
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* factory bad blocks will detect these blocks as bad, e.g. when
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* function nand_scan_bbt() is executed to build a new bad block table.
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*/
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memset(fcb_raw_page + mtd->writesize, 0xFF, 2);
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/*
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* Set the first and second byte of OOB data to 0xFF,
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* not 0x00. These bytes are used as the Manufacturers Bad
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* Block Marker (MBBM). Since the FCB is mostly written to
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* the first page in a block, a scan for
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* factory bad blocks will detect these blocks as bad, e.g.
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* when function nand_scan_bbt() is executed to build a new
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* bad block table.
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*/
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memset(fcb_raw_page + mtd->writesize, 0xFF, 2);
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}
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for (i = 0; i < nr_blks_fcb; i++) {
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if (mtd_block_isbad(mtd, off)) {
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printf("Block %d is bad, skipped\n", i);
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continue;
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}
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/* raw write */
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mtd_oob_ops_t ops = {
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.datbuf = (u8 *)fcb_raw_page,
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.oobbuf = ((u8 *)fcb_raw_page) + mtd->writesize,
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.len = mtd->writesize,
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.ooblen = mtd->oobsize,
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.mode = MTD_OPS_RAW
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};
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/*
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* User BCH ECC hardware module for i.MX7
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*/
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if (is_mx7()) {
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u32 off = i * mtd->erasesize;
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size_t rwsize = sizeof(*fcb);
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ret = mtd_write_oob(mtd, mtd->erasesize * i, &ops);
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if (ret)
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goto fcb_raw_page_err;
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debug("NAND fcb write: 0x%x offset, 0x%x bytes written: %s\n",
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mtd->erasesize * i, ops.len, ret ? "ERROR" : "OK");
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printf("Writing %d bytes to 0x%x: ", rwsize, off);
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/* switch nand BCH to FCB compatible settings */
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mxs_nand_mode_fcb(mtd);
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ret = nand_write(mtd, off, &rwsize,
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(unsigned char *)fcb);
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mxs_nand_mode_normal(mtd);
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printf("%s\n", ret ? "ERROR" : "OK");
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} else if (is_mx6()) {
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/* raw write */
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mtd_oob_ops_t ops = {
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.datbuf = (u8 *)fcb_raw_page,
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.oobbuf = ((u8 *)fcb_raw_page) +
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mtd->writesize,
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.len = mtd->writesize,
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.ooblen = mtd->oobsize,
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.mode = MTD_OPS_RAW
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};
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ret = mtd_write_oob(mtd, mtd->erasesize * i, &ops);
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if (ret)
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goto fcb_raw_page_err;
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debug("NAND fcb write: 0x%x offset 0x%x written: %s\n",
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mtd->erasesize * i, ops.len, ret ?
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"ERROR" : "OK");
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}
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ret = mtd_write(mtd, mtd->erasesize * i + mtd->writesize,
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mtd->writesize, &dummy, dbbt_page);
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@ -352,7 +396,8 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size,
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}
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fcb_raw_page_err:
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kfree(fcb_raw_page);
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if (is_mx6())
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kfree(fcb_raw_page);
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dbbt_data_page_err:
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kfree(dbbt_data_page);
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dbbt_page_err:
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