nand: mxc: Switch NAND SPL to generic SPL

This also fixes support for mx31pdk and tx25, which had been broken by commit
e05e5de7fa.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Benoît Thébaudeau 2013-04-11 09:35:51 +00:00 committed by Albert ARIBAUD
parent 8b7cd098dd
commit da962b7175
20 changed files with 81 additions and 383 deletions

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@ -200,7 +200,6 @@ reset:
/*------------------------------------------------------------------------------*/ /*------------------------------------------------------------------------------*/
#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_NAND_SPL)
/* /*
* void relocate_code (addr_sp, gd, addr_moni) * void relocate_code (addr_sp, gd, addr_moni)
* *
@ -269,6 +268,8 @@ relocate_done:
bx lr bx lr
#ifndef CONFIG_SPL_BUILD
_rel_dyn_start_ofs: _rel_dyn_start_ofs:
.word __rel_dyn_start - _start .word __rel_dyn_start - _start
_rel_dyn_end_ofs: _rel_dyn_end_ofs:

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@ -27,6 +27,9 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o LIB = $(obj)lib$(BOARD).o
ifdef CONFIG_SPL_BUILD
SOBJS := lowlevel_init.o
endif
COBJS := mx31pdk.o COBJS := mx31pdk.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)

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@ -1,5 +0,0 @@
ifdef CONFIG_NAND_SPL
CONFIG_SYS_TEXT_BASE = 0x87ec0000
else
CONFIG_SYS_TEXT_BASE = 0x87f00000
endif

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@ -36,6 +36,14 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong bootflag)
{
relocate_code(0, NULL, CONFIG_SPL_TEXT_BASE);
asm volatile("ldr pc, =nand_boot");
}
#endif
int dram_init(void) int dram_init(void)
{ {
/* dram_init must store complete ramsize in gd->ram_size */ /* dram_init must store complete ramsize in gd->ram_size */

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@ -25,8 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o LIB = $(obj)lib$(BOARD).o
COBJS := tx25.o ifdef CONFIG_SPL_BUILD
SOBJS := lowlevel_init.o SOBJS := lowlevel_init.o
endif
COBJS := tx25.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS)) OBJS := $(addprefix $(obj),$(COBJS))

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@ -1,5 +0,0 @@
ifdef CONFIG_NAND_SPL
CONFIG_SYS_TEXT_BASE = 0x810c0000
else
CONFIG_SYS_TEXT_BASE = 0x81200000
endif

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@ -33,6 +33,14 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong bootflag)
{
relocate_code(0, NULL, CONFIG_SPL_TEXT_BASE);
asm volatile("ldr pc, =nand_boot");
}
#endif
#ifdef CONFIG_FEC_MXC #ifdef CONFIG_FEC_MXC
#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7) #define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7)
#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9) #define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)

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@ -45,7 +45,7 @@ imx31_phycore arm arm1136 - -
imx31_phycore_eet arm arm1136 imx31_phycore - mx31 imx31_phycore:IMX31_PHYCORE_EET imx31_phycore_eet arm arm1136 imx31_phycore - mx31 imx31_phycore:IMX31_PHYCORE_EET
qong arm arm1136 - davedenx mx31 qong arm arm1136 - davedenx mx31
mx31ads arm arm1136 - freescale mx31 mx31ads arm arm1136 - freescale mx31
mx31pdk arm arm1136 - freescale mx31 mx31pdk:NAND_U_BOOT mx31pdk arm arm1136 - freescale mx31
tt01 arm arm1136 - hale mx31 tt01 arm arm1136 - hale mx31
imx31_litekit arm arm1136 - logicpd mx31 imx31_litekit arm arm1136 - logicpd mx31
flea3 arm arm1136 - CarMediaLab mx35 flea3 arm arm1136 - CarMediaLab mx35

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@ -40,15 +40,15 @@ Boards which are not fixed to support relocation will be REMOVED!
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
For boards which boot from nand_spl, it is possible to save one copy For boards which boot from spl, it is possible to save one copy
if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code
is copied again in relocate_code(). is copied again in relocate_code().
example for the tx25 board: example for the tx25 board booting from NAND Flash:
a) cpu starts a) cpu starts
b) it copies the first page in nand to internal ram b) it copies the first page in nand to internal ram
(nand_spl_code) (spl code)
c) end executes this code c) end executes this code
d) this initialize CPU, RAM, ... and copy itself to RAM d) this initialize CPU, RAM, ... and copy itself to RAM
(this bin must fit in one page, so board_init_f() (this bin must fit in one page, so board_init_f()
@ -79,20 +79,20 @@ TODO
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
Relocation with NAND_SPL (example for the tx25): Relocation with SPL (example for the tx25 booting from NAND Flash):
- cpu copies the first page from NAND to 0xbb000000 (IMX_NFC_BASE) - cpu copies the first page from NAND to 0xbb000000 (IMX_NFC_BASE)
and start with code execution on this address. and start with code execution on this address.
- The First page contains u-boot code from u-boot:nand_spl/nand_boot_fsl_nfc.c - The First page contains u-boot code from drivers/mtd/nand/mxc_nand_spl.c
which inits the dram, cpu registers, reloacte itself to CONFIG_SYS_TEXT_BASE and loads which inits the dram, cpu registers, reloacte itself to CONFIG_SPL_TEXT_BASE and loads
the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution
@CONFIG_SYS_NAND_U_BOOT_START @CONFIG_SYS_NAND_U_BOOT_START
- This u-boot does no RAM init, nor CPU register setup. Just look - This u-boot does no RAM init, nor CPU register setup. Just look
where it has to copy and relocate itself to this address. If where it has to copy and relocate itself to this address. If
relocate address = CONFIG_SYS_TEXT_BASE (not the same, as the relocate address = CONFIG_SYS_TEXT_BASE (not the same, as the
CONFIG_SYS_TEXT_BASE from the nand_spl code), then there is no need CONFIG_SPL_TEXT_BASE from the spl code), then there is no need
to copy, just go on with bss clear and jump to board_init_r. to copy, just go on with bss clear and jump to board_init_r.
----------------------------------------------------------------------------- -----------------------------------------------------------------------------

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@ -82,6 +82,7 @@ COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
else # minimal SPL drivers else # minimal SPL drivers
COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
COBJS-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
endif # drivers endif # drivers
endif # nand endif # nand

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@ -26,7 +26,7 @@
defined(CONFIG_MX51) || defined(CONFIG_MX53) defined(CONFIG_MX51) || defined(CONFIG_MX53)
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#endif #endif
#include <fsl_nfc.h> #include "mxc_nand.h"
#define DRIVER_NAME "mxc_nand" #define DRIVER_NAME "mxc_nand"
@ -36,9 +36,9 @@ struct mxc_nand_host {
struct mtd_info mtd; struct mtd_info mtd;
struct nand_chip *nand; struct nand_chip *nand;
struct fsl_nfc_regs __iomem *regs; struct mxc_nand_regs __iomem *regs;
#ifdef MXC_NFC_V3_2 #ifdef MXC_NFC_V3_2
struct fsl_nfc_ip_regs __iomem *ip_regs; struct mxc_nand_ip_regs __iomem *ip_regs;
#endif #endif
int spare_only; int spare_only;
int status_request; int status_request;
@ -1213,10 +1213,10 @@ int board_nand_init(struct nand_chip *this)
this->read_buf = mxc_nand_read_buf; this->read_buf = mxc_nand_read_buf;
this->verify_buf = mxc_nand_verify_buf; this->verify_buf = mxc_nand_verify_buf;
host->regs = (struct fsl_nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE; host->regs = (struct mxc_nand_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
#ifdef MXC_NFC_V3_2 #ifdef MXC_NFC_V3_2
host->ip_regs = host->ip_regs =
(struct fsl_nfc_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE; (struct mxc_nand_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
#endif #endif
host->clk_act = 1; host->clk_act = 1;

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@ -20,8 +20,8 @@
* MA 02111-1307 USA * MA 02111-1307 USA
*/ */
#ifndef __FSL_NFC_H #ifndef __MXC_NAND_H
#define __FSL_NFC_H #define __MXC_NAND_H
/* /*
* Register map and bit definitions for the Freescale NAND Flash Controller * Register map and bit definitions for the Freescale NAND Flash Controller
@ -73,7 +73,7 @@
#define NAND_MXC_REG_OFFSET 0x1e00 #define NAND_MXC_REG_OFFSET 0x1e00
#endif #endif
struct fsl_nfc_regs { struct mxc_nand_regs {
u8 main_area[NAND_MXC_NR_BUFS][0x200]; u8 main_area[NAND_MXC_NR_BUFS][0x200];
u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE]; u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE];
/* /*
@ -131,7 +131,7 @@ struct fsl_nfc_regs {
}; };
#ifdef MXC_NFC_V3_2 #ifdef MXC_NFC_V3_2
struct fsl_nfc_ip_regs { struct mxc_nand_ip_regs {
u32 wrprot; u32 wrprot;
u32 wrprot_unlock_blkaddr[8]; u32 wrprot_unlock_blkaddr[8];
u32 config2; u32 config2;
@ -222,4 +222,4 @@ struct fsl_nfc_ip_regs {
#define writenfc writel #define writenfc writel
#endif #endif
#endif /* __FSL_NFC_H */ #endif /* __MXC_NAND_H */

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@ -28,13 +28,13 @@
#include <nand.h> #include <nand.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include <asm/io.h> #include <asm/io.h>
#include <fsl_nfc.h> #include "mxc_nand.h"
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1) #if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR; static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR;
#elif defined(MXC_NFC_V3_2) #elif defined(MXC_NFC_V3_2)
static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR_AXI; static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
static struct fsl_nfc_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR; static struct mxc_nand_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
#endif #endif
static void nfc_wait_ready(void) static void nfc_wait_ready(void)
@ -68,7 +68,7 @@ static void nfc_nand_init(void)
tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK | tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK |
NFC_V3_CONFIG2_EDC_MASK | NFC_V3_CONFIG2_PS_MASK)) | NFC_V3_CONFIG2_EDC_MASK | NFC_V3_CONFIG2_PS_MASK)) |
NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_SPARE_SIZE / 2) | NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_OOBSIZE / 2) |
NFC_V3_CONFIG2_INT_MSK | NFC_V3_CONFIG2_ECC_EN | NFC_V3_CONFIG2_INT_MSK | NFC_V3_CONFIG2_ECC_EN |
NFC_V3_CONFIG2_ONE_CYCLE; NFC_V3_CONFIG2_ONE_CYCLE;
if (CONFIG_SYS_NAND_PAGE_SIZE == 4096) if (CONFIG_SYS_NAND_PAGE_SIZE == 4096)
@ -81,7 +81,7 @@ static void nfc_nand_init(void)
* if spare size is larger that 16 bytes per 512 byte hunk * if spare size is larger that 16 bytes per 512 byte hunk
* then use 8 symbol correction instead of 4 * then use 8 symbol correction instead of 4
*/ */
if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16) if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
tmp |= NFC_V3_CONFIG2_ECC_MODE_8; tmp |= NFC_V3_CONFIG2_ECC_MODE_8;
else else
tmp &= ~NFC_V3_CONFIG2_ECC_MODE_8; tmp &= ~NFC_V3_CONFIG2_ECC_MODE_8;
@ -102,7 +102,7 @@ static void nfc_nand_init(void)
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512; int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
int config1; int config1;
writenfc(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size); writenfc(CONFIG_SYS_NAND_OOBSIZE / 2, &nfc->spare_area_size);
/* unlocking RAM Buff */ /* unlocking RAM Buff */
writenfc(0x2, &nfc->config); writenfc(0x2, &nfc->config);
@ -115,7 +115,7 @@ static void nfc_nand_init(void)
* if spare size is larger that 16 bytes per 512 byte hunk * if spare size is larger that 16 bytes per 512 byte hunk
* then use 8 symbol correction instead of 4 * then use 8 symbol correction instead of 4
*/ */
if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16) if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4; config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4;
else else
config1 |= NFC_V2_CONFIG1_ECC_MODE_4; config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
@ -204,7 +204,7 @@ static int nfc_nand_check_ecc(void)
#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2) #elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
u32 ecc_status = readl(&nfc->ecc_status_result); u32 ecc_status = readl(&nfc->ecc_status_result);
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512; int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4; int err_limit = CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16 ? 8 : 4;
int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512; int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
do { do {
@ -332,14 +332,6 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
return 0; return 0;
} }
#if defined(CONFIG_ARM)
void board_init_f (ulong bootflag)
{
relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
CONFIG_SYS_TEXT_BASE);
}
#endif
/* /*
* The main entry for NAND booting. It's necessary that SDRAM is already * The main entry for NAND booting. It's necessary that SDRAM is already
* configured and available since this code loads the main U-Boot image * configured and available since this code loads the main U-Boot image

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@ -45,7 +45,16 @@
#define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS #define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_SPL
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x87dc0000
#define CONFIG_SYS_TEXT_BASE 0x87e00000
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_LOWLEVEL_INIT
#endif #endif
@ -116,7 +125,7 @@
"bootcmd=run bootcmd_net\0" \ "bootcmd=run bootcmd_net\0" \
"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \ "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \
"tftpboot 0x81000000 uImage-mx31; bootm\0" \ "tftpboot 0x81000000 uImage-mx31; bootm\0" \
"prg_uboot=tftpboot 0x81000000 u-boot-nand.bin; " \ "prg_uboot=tftpboot 0x81000000 u-boot-with-spl.bin; " \
"nand erase 0x0 0x40000; " \ "nand erase 0x0 0x40000; " \
"nand write 0x81000000 0x0 0x40000\0" "nand write 0x81000000 0x0 0x40000\0"
@ -163,7 +172,7 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE) GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_GBL_DATA_OFFSET) CONFIG_SYS_INIT_RAM_SIZE)
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* FLASH and environment organization * FLASH and environment organization
@ -189,10 +198,10 @@
/* NAND configuration for the NAND_SPL */ /* NAND configuration for the NAND_SPL */
/* Start copying real U-boot from the second page */ /* Start copying real U-boot from the second page */
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x3f800
/* Load U-Boot to this address */ /* Load U-Boot to this address */
#define CONFIG_SYS_NAND_U_BOOT_DST 0x87f00000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800

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@ -21,6 +21,7 @@
#ifndef __CONFIG_H #ifndef __CONFIG_H
#define __CONFIG_H #define __CONFIG_H
#include <asm/arch/imx-regs.h>
/* /*
* KARO TX25 board - SoC Configuration * KARO TX25 board - SoC Configuration
@ -31,8 +32,14 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
/* NAND BOOT is the only boot method */ #define CONFIG_SPL
#define CONFIG_NAND_U_BOOT #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE 2048
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0x810c0000
#define CONFIG_SYS_TEXT_BASE 0x81200000
#ifndef MACH_TYPE_TX25 #ifndef MACH_TYPE_TX25
#define MACH_TYPE_TX25 2177 #define MACH_TYPE_TX25 2177
@ -40,16 +47,16 @@
#define CONFIG_MACH_TYPE MACH_TYPE_TX25 #define CONFIG_MACH_TYPE MACH_TYPE_TX25
#ifdef CONFIG_NAND_SPL #ifdef CONFIG_SPL_BUILD
/* Start copying real U-boot from the second page */ /* Start copying real U-boot from the second page */
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000
#define CONFIG_SYS_NAND_U_BOOT_DST (0x81200000) #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
#define CONFIG_SYS_NAND_PAGE_SIZE 2048 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_SPARE_SIZE 64 #define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
#define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024) #define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
@ -173,7 +180,6 @@
/* additions for new relocation code, must be added to all boards */ /* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ #define CONFIG_SYS_INIT_SP_ADDR (IMX_RAM_BASE + IMX_RAM_SIZE)
GENERATED_GBL_DATA_SIZE)
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -1,63 +0,0 @@
CONFIG_NAND_SPL = y
PAD_TO := 2048
include $(TOPDIR)/config.mk
nandobj := $(OBJTREE)/nand_spl/
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
$(LDFLAGS_FINAL)
AFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
SOBJS = start.o crt0.o lowlevel_init.o
COBJS = nand_boot_fsl_nfc.o
SRCS := $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
SRCS += $(SRCTREE)/arch/arm/cpu/arm1136/start.S
SRCS += $(SRCTREE)/arch/arm/lib/crt0.S
SRCS += $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
__OBJS := $(SOBJS) $(COBJS)
LNDIR := $(nandobj)board/$(BOARDDIR)
ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
all: $(obj).depend $(ALL)
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
-Map $(nandobj)u-boot-spl.map \
-o $@
$(nandobj)u-boot.lds: $(LDSCRIPT)
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
-ansi -D__ASSEMBLY__ -P - <$< >$@
#########################################################################
$(obj)%.o: $(SRCTREE)/arch/arm/cpu/arm1136/%.S
$(CC) $(AFLAGS) -c -o $@ $<
$(obj)%.o: $(SRCTREE)/arch/arm/lib/%.S
$(CC) $(AFLAGS) -c -o $@ $<
$(obj)%.o: $(SRCTREE)/board/freescale/mx31pdk/%.S
$(CC) $(AFLAGS) -c -o $@ $<
$(obj)%.o: $(SRCTREE)/nand_spl/%.c
$(CC) $(CFLAGS) -c -o $@ $<
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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@ -1,87 +0,0 @@
/*
* (C) Copyright 2009
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
start.o (.text)
lowlevel_init.o (.text)
nand_boot_fsl_nfc.o (.text)
*(.text)
. = 2K;
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : {
*(.data)
}
. = ALIGN(4);
. = ALIGN(4);
.u_boot_list : {
*(SORT(.u_boot_list*));
}
. = ALIGN(4);
__image_copy_end = .;
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.dynsym : {
__dynsym_start = .;
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
__bss_end = .;
}
/DISCARD/ : { *(.bss*) }
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynsym*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.hash*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
}

View File

@ -1,84 +0,0 @@
#
# (C) Copyright 2009 DENX Software Engineering
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundatio; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
CONFIG_NAND_SPL = y
include $(TOPDIR)/config.mk
include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
nandobj := $(OBJTREE)/nand_spl/
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
$(LDFLAGS_FINAL)
AFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
SOBJS = start.o crt0.o lowlevel_init.o
COBJS = nand_boot_fsl_nfc.o
SRCS := $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
SRCS += $(SRCTREE)/arch/arm/cpu/arm926ejs/start.S
SRCS += $(SRCTREE)/arch/arm/lib/crt0.S
SRCS += $(SRCTREE)/board/karo/tx25/lowlevel_init.S
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
__OBJS := $(SOBJS) $(COBJS)
LNDIR := $(nandobj)board/$(BOARDDIR)
ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
all: $(obj).depend $(ALL)
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
-Map $(nandobj)u-boot-spl.map \
-o $@
$(nandobj)u-boot.lds: $(LDSCRIPT)
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
-ansi -D__ASSEMBLY__ -P - <$< >$@
#########################################################################
$(obj)%.o: $(SRCTREE)/arch/arm/cpu/arm926ejs/%.S
$(CC) $(AFLAGS) -c -o $@ $<
$(obj)%.o: $(SRCTREE)/arch/arm/lib/%.S
$(CC) $(AFLAGS) -c -o $@ $<
$(obj)%.o: $(SRCTREE)/board/karo/tx25/%.S
$(CC) $(AFLAGS) -c -o $@ $<
$(obj)%.o: $(SRCTREE)/nand_spl/%.c
$(CC) $(CFLAGS) -c -o $@ $<
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@ -1 +0,0 @@
PAD_TO := 2048

View File

@ -1,87 +0,0 @@
/*
* (C) Copyright 2009
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
start.o (.text)
lowlevel_init.o (.text)
nand_boot_fsl_nfc.o (.text)
*(.text)
. = 2K;
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : {
*(.data)
}
. = ALIGN(4);
. = ALIGN(4);
.u_boot_list : {
*(SORT(.u_boot_list*));
}
. = ALIGN(4);
__image_copy_end = .;
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.dynsym : {
__dynsym_start = .;
*(.dynsym)
}
_end = .;
.bss __rel_dyn_start (OVERLAY) : {
__bss_start = .;
*(.bss)
. = ALIGN(4);
__bss_end = .;
}
/DISCARD/ : { *(.bss*) }
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynsym*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.hash*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
}