Merge branch 'master' of git://git.denx.de/u-boot-sh

Minor fixes for the Alt board and PHY use on Gen2.
This commit is contained in:
Tom Rini 2019-04-01 23:30:00 -04:00
commit da06f9a185
11 changed files with 16 additions and 19 deletions

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@ -8,6 +8,11 @@
#include "r8a7794-alt.dts"
#include "r8a7794-u-boot.dtsi"
&i2c7 {
status = "okay";
clock-frequency = <100000>;
};
&scif2 {
u-boot,dm-pre-reloc;
};

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@ -9,13 +9,4 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "alt"
config R8A7794_ETHERNET_B
bool "Use ethernet B function"
depends on TARGET_ALT
default n
help
ALT board can use default ethernet and etnernet B function.
This config set pin function of ethenet B. You also needt to change
DIP switch of board in order to use this function.
endif

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@ -28,7 +28,6 @@
DECLARE_GLOBAL_DATA_PTR;
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
@ -93,7 +92,7 @@ int dram_init_banksize(void)
/* KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
@ -108,7 +107,7 @@ int board_phy_config(struct phy_device *phydev)
void reset_cpu(ulong addr)
{
struct udevice *dev;
const u8 pmic_bus = 1;
const u8 pmic_bus = 7;
const u8 pmic_addr = 0x58;
u8 data;
int ret;

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@ -98,7 +98,7 @@ int dram_init_banksize(void)
/* KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

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@ -100,7 +100,7 @@ int dram_init_banksize(void)
/* Koelsch has KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

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@ -109,7 +109,7 @@ int dram_init_banksize(void)
/* KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

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@ -98,7 +98,7 @@ int dram_init_banksize(void)
/* porter has KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

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@ -93,7 +93,7 @@ int dram_init_banksize(void)
/* porter has KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

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@ -112,7 +112,7 @@ int dram_init_banksize(void)
/* Stout has KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

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@ -57,12 +57,14 @@ CONFIG_CLK_RENESAS=y
CONFIG_DM_GPIO=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_DM_MMC=y
CONFIG_SH_MMCIF=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
@ -80,6 +82,7 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y

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@ -38,7 +38,6 @@
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/* ENV setting */
#define CONFIG_ENV_ADDR 0xC0000