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drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge
In Intel's documentation the term P2SB stands for "Primary to Sideband Bridge". Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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@ -243,10 +243,10 @@ config NUVOTON_NCT6102D
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in the Nuvoton Super IO chips on X86 platforms.
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config P2SB
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bool "Intel Primary-to-Sideband Bus"
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bool "Intel Primary to Sideband Bridge"
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depends on X86 || SANDBOX
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help
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This enables support for the Intel Primary-to-Sideband bus,
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This enables support for the Intel Primary to Sideband Bridge,
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abbreviated to P2SB. The P2SB is used to access various peripherals
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such as eSPI, GPIO, through memory-mapped I/O in a large chunk of PCI
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space. The space is segmented into different channels and peripherals
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@ -256,20 +256,20 @@ config P2SB
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devices - see pcr_readl(), etc.
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config SPL_P2SB
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bool "Intel Primary-to-Sideband Bus in SPL"
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bool "Intel Primary to Sideband Bridge in SPL"
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depends on SPL && (X86 || SANDBOX)
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help
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The Primary-to-Sideband bus is used to access various peripherals
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The Primary to Sideband Bridge is used to access various peripherals
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through memory-mapped I/O in a large chunk of PCI space. The space is
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segmented into different channels and peripherals are accessed by
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device-specific means within those channels. Devices should be added
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in the device tree as subnodes of the p2sb.
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config TPL_P2SB
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bool "Intel Primary-to-Sideband Bus in TPL"
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bool "Intel Primary to Sideband Bridge in TPL"
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depends on TPL && (X86 || SANDBOX)
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help
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The Primary-to-Sideband bus is used to access various peripherals
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The Primary to Sideband Bridge is used to access various peripherals
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through memory-mapped I/O in a large chunk of PCI space. The space is
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segmented into different channels and peripherals are accessed by
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device-specific means within those channels. Devices should be added
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