ARM: dts: imx8mn: Add power domain nodes
Add power domain nodes to DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
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@ -4,6 +4,8 @@
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*/
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#include <dt-bindings/clock/imx8mn-clock.h>
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#include <dt-bindings/power/imx8mn-power.h>
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#include <dt-bindings/reset/imx8mq-reset.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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@ -612,6 +614,54 @@
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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#reset-cells = <1>;
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};
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gpc: gpc@303a0000 {
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compatible = "fsl,imx8mn-gpc";
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reg = <0x303a0000 0x10000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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pgc {
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#address-cells = <1>;
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#size-cells = <0>;
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pgc_hsiomix: power-domain@0 {
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#power-domain-cells = <0>;
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reg = <IMX8MN_POWER_DOMAIN_HSIOMIX>;
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clocks = <&clk IMX8MN_CLK_USB_BUS>;
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};
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pgc_otg1: power-domain@1 {
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#power-domain-cells = <0>;
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reg = <IMX8MN_POWER_DOMAIN_OTG1>;
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power-domains = <&pgc_hsiomix>;
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};
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pgc_gpumix: power-domain@2 {
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#power-domain-cells = <0>;
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reg = <IMX8MN_POWER_DOMAIN_GPUMIX>;
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clocks = <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
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<&clk IMX8MN_CLK_GPU_SHADER_DIV>,
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<&clk IMX8MN_CLK_GPU_BUS_ROOT>,
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<&clk IMX8MN_CLK_GPU_AHB>;
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resets = <&src IMX8MQ_RESET_GPU_RESET>;
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};
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dispmix_pd: power-domain@3 {
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#power-domain-cells = <0>;
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reg = <IMX8MN_POWER_DOMAIN_DISPMIX>;
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clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
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<&clk IMX8MN_CLK_DISP_AXI_ROOT>,
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<&clk IMX8MN_CLK_DISP_APB_ROOT>;
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};
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mipi_pd: power-domain@4 {
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#power-domain-cells = <0>;
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reg = <IMX8MN_POWER_DOMAIN_MIPI>;
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power-domains = <&dispmix_pd>;
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};
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};
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};
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};
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aips2: bus@30400000 {
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@ -964,6 +1014,7 @@
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assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>;
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phys = <&usbphynop1>;
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fsl,usbmisc = <&usbmisc1 0>;
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power-domains = <&pgc_otg1>;
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status = "disabled";
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};
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@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Copyright (C) 2020 Compass Electronics Group, LLC
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*/
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#ifndef __DT_BINDINGS_IMX8MN_POWER_H__
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#define __DT_BINDINGS_IMX8MN_POWER_H__
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#define IMX8MN_POWER_DOMAIN_HSIOMIX 0
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#define IMX8MN_POWER_DOMAIN_OTG1 1
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#define IMX8MN_POWER_DOMAIN_GPUMIX 2
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#define IMX8MN_POWER_DOMAIN_DISPMIX 3
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#define IMX8MN_POWER_DOMAIN_MIPI 4
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#endif
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