sun50i: h5: Add initial Orangepi Zero Plus 2 support
Orangepi Zero Plus 2 is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Zero Plus 2 has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG+power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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Jagan Teki
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@ -320,7 +320,8 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
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sun8i-v3s-licheepi-zero.dtb
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dtb-$(CONFIG_MACH_SUN50I_H5) += \
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sun50i-h5-orangepi-pc2.dtb \
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sun50i-h5-orangepi-prime.dtb
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sun50i-h5-orangepi-prime.dtb \
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sun50i-h5-orangepi-zero-plus2.dtb
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dtb-$(CONFIG_MACH_SUN50I) += \
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sun50i-a64-bananapi-m64.dtb \
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sun50i-a64-pine64-plus.dtb \
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@ -0,0 +1,97 @@
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/*
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* Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "sun50i-h5.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "OrangePi Zero Plus2";
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compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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reg_vcc3v3: vcc3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&mmc0 {
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compatible = "allwinner,sun50i-h5-mmc",
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"allwinner,sun50i-a64-mmc",
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"allwinner,sun5i-a13-mmc";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
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vmmc-supply = <®_vcc3v3>;
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bus-width = <4>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
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cd-inverted;
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status = "okay";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_8bit_pins>;
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vmmc-supply = <®_vcc3v3>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins_a>;
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status = "okay";
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};
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@ -272,6 +272,11 @@ M: Icenowy Zheng <icenowy@aosc.xyz>
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S: Maintained
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F: configs/orangepi_zero_defconfig
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ORANGEPI ZERO PLUS 2 BOARD
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M: Jagan Teki <jagan@amarulasolutions.com>
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S: Maintained
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F: configs/orangepi_zero_plus2_defconfig
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ORANGEPI PC 2 BOARD
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M: Andre Przywara <andre.przywara@arm.com>
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S: Maintained
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@ -0,0 +1,18 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_MACH_SUN50I_H5=y
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CONFIG_DRAM_CLK=672
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CONFIG_DRAM_ZQ=3881977
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CONFIG_MMC0_CD_PIN="PH13"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_ISO_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_SUN8I_EMAC=y
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CONFIG_USB_EHCI_HCD=y
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