tegra: Whistler board support

Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:

E1120 motherboard
E1108 CPU board
E1116 PMU board

The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.

Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Stephen Warren 2012-05-15 06:45:28 +00:00 committed by Albert ARIBAUD
parent b9607e7061
commit d5ebc937c9
6 changed files with 323 additions and 0 deletions

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@ -914,6 +914,7 @@ Stephen Warren <swarren@nvidia.com>
ventana Tegra2 (ARM7 & A9 Dual Core) ventana Tegra2 (ARM7 & A9 Dual Core)
paz00 Tegra2 (ARM7 & A9 Dual Core) paz00 Tegra2 (ARM7 & A9 Dual Core)
whistler Tegra2 (ARM7 & A9 Dual Core)
Thomas Weber <weber@corscience.de> Thomas Weber <weber@corscience.de>

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@ -0,0 +1,67 @@
/dts-v1/;
/include/ ARCH_CPU_DTS
/ {
model = "NVIDIA Tegra2 Whistler evaluation board";
compatible = "nvidia,whistler", "nvidia,tegra20";
aliases {
i2c0 = "/i2c@7000d000";
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
};
memory {
device_type = "memory";
reg = < 0x00000000 0x20000000 >;
};
clocks {
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006000 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
clock-frequency = <100000>;
pmic@3c {
compatible = "maxim,max8907b";
reg = <0x3c>;
clk_32k: clock {
compatible = "fixed-clock";
/*
* leave out for now due to CPP:
* #clock-cells = <0>;
*/
clock-frequency = <32768>;
};
};
};
usb@c5004000 {
status = "disabled";
};
};

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@ -0,0 +1,48 @@
#
# (C) Copyright 2010-2012
# NVIDIA Corporation <www.nvidia.com>
#
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
LIB = $(obj)lib$(BOARD).o
COBJS := $(BOARD).o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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@ -0,0 +1,116 @@
/*
* (C) Copyright 2010-2012
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <i2c.h>
#include <asm/io.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/mmc.h>
#include <asm/gpio.h>
#ifdef CONFIG_TEGRA2_MMC
#include <mmc.h>
#endif
/*
* Routine: gpio_config_uart
* Description: Does nothing on Whistler - no UART-related GPIOs.
*/
void gpio_config_uart(void)
{
}
/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
static void pin_mux_mmc(void)
{
funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT);
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT);
}
/* this is a weak define that we are overriding */
int board_mmc_init(bd_t *bd)
{
uchar val;
int ret;
debug("board_mmc_init called\n");
/* Turn on MAX8907B LDO12 to 2.8V for J40 power */
ret = i2c_set_bus_num(0);
if (ret)
printf("i2c_set_bus_num failed: %d\n", ret);
val = 0x29;
ret = i2c_write(0x3c, 0x46, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x46 failed: %d\n", ret);
val = 0x00;
ret = i2c_write(0x3c, 0x45, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x45 failed: %d\n", ret);
val = 0x1f;
ret = i2c_write(0x3c, 0x44, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
/* Enable muxes, etc. for SDMMC controllers */
pin_mux_mmc();
/* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */
tegra2_mmc_init(0, 8, -1, -1);
/* init dev 1 (SDMMC3), (J40 "SDIO3") with 8-bit bus */
tegra2_mmc_init(1, 8, -1, -1);
return 0;
}
/* this is a weak define that we are overriding */
void pin_mux_usb(void)
{
uchar val;
int ret;
/*
* This is a hack. This should be represented in DT using the
* vbus-gpio property. However, U-Boot's DT support doesn't
* support any GPIO controller other than the Tegra's yet.
*/
/* Turn on TAC6416's GPIO 0+1 for USB1/3's VBUS */
ret = i2c_set_bus_num(0);
if (ret)
printf("i2c_set_bus_num failed: %d\n", ret);
val = 0x03;
ret = i2c_write(0x20, 2, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x20 2 failed: %d\n", ret);
val = 0xfc;
ret = i2c_write(0x20, 6, 1, &val, 1);
if (ret)
printf("i2c_write 0 0x20 6 failed: %d\n", ret);
}

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@ -231,6 +231,7 @@ trats arm armv7 trats samsung
harmony arm armv7 harmony nvidia tegra2 harmony arm armv7 harmony nvidia tegra2
seaboard arm armv7 seaboard nvidia tegra2 seaboard arm armv7 seaboard nvidia tegra2
ventana arm armv7 ventana nvidia tegra2 ventana arm armv7 ventana nvidia tegra2
whistler arm armv7 whistler nvidia tegra2
u8500_href arm armv7 u8500 st-ericsson u8500 u8500_href arm armv7 u8500 st-ericsson u8500
actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB

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@ -0,0 +1,90 @@
/*
* (C) Copyright 2010-2012
* NVIDIA Corporation <www.nvidia.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/sizes.h>
#include "tegra2-common.h"
/* Enable fdt support for Whistler. Flash the image in u-boot-dtb.bin */
#define CONFIG_DEFAULT_DEVICE_TREE tegra2-whistler
#define CONFIG_OF_CONTROL
#define CONFIG_OF_SEPARATE
/* High-level configuration options */
#define TEGRA2_SYSMEM "mem=512M@0M"
#define V_PROMPT "Tegra2 (Whistler) # "
#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Whistler"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
#define CONFIG_TEGRA2_ENABLE_UARTA
#define CONFIG_TEGRA2_UARTA_UAA_UAB
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER
#define CONFIG_SYS_BOARD_ODMDATA 0x2B080105 /* lp?, 512MB, UARTA */
#define CONFIG_BOARD_EARLY_INIT_F
/* I2C */
#define CONFIG_TEGRA_I2C
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS 4
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_TEGRA2_MMC
#define CONFIG_CMD_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
/* Environment not stored */
#define CONFIG_ENV_IS_NOWHERE
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#endif /* __CONFIG_H */