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mtd: spinand: toshiba: Support for new Kioxia Serial NAND
Add support for new Kioxia products. The new Kioxia products support program load x4 command, and have HOLD_D bit which is equivalent to QE bit. Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
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5f8d677839
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@ -23,6 +23,18 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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static SPINAND_OP_VARIANTS(write_cache_x4_variants,
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_x4_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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/**
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* Backward compatibility for 1st generation Serial NAND devices
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* which don't support Quad Program Load operation.
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*/
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static SPINAND_OP_VARIANTS(write_cache_variants,
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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@ -98,7 +110,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
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}
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}
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static const struct spinand_info toshiba_spinand_table[] = {
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static const struct spinand_info toshiba_spinand_table[] = {
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/* 3.3V 1Gb */
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/* 3.3V 1Gb (1st generation) */
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SPINAND_INFO("TC58CVG0S3HRAIG", 0xC2,
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SPINAND_INFO("TC58CVG0S3HRAIG", 0xC2,
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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NAND_ECCREQ(8, 512),
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@ -108,7 +120,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 2Gb */
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/* 3.3V 2Gb (1st generation) */
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SPINAND_INFO("TC58CVG1S3HRAIG", 0xCB,
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SPINAND_INFO("TC58CVG1S3HRAIG", 0xCB,
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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NAND_ECCREQ(8, 512),
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@ -118,7 +130,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 4Gb */
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/* 3.3V 4Gb (1st generation) */
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SPINAND_INFO("TC58CVG2S0HRAIG", 0xCD,
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SPINAND_INFO("TC58CVG2S0HRAIG", 0xCD,
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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NAND_ECCREQ(8, 512),
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@ -128,17 +140,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 4Gb */
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/* 1.8V 1Gb (1st generation) */
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SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED,
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb */
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SPINAND_INFO("TC58CYG0S3HRAIG", 0xB2,
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SPINAND_INFO("TC58CYG0S3HRAIG", 0xB2,
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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NAND_ECCREQ(8, 512),
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@ -148,7 +150,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 2Gb */
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/* 1.8V 2Gb (1st generation) */
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SPINAND_INFO("TC58CYG1S3HRAIG", 0xBB,
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SPINAND_INFO("TC58CYG1S3HRAIG", 0xBB,
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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NAND_ECCREQ(8, 512),
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@ -158,7 +160,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 4Gb */
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/* 1.8V 4Gb (1st generation) */
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SPINAND_INFO("TC58CYG2S0HRAIG", 0xBD,
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SPINAND_INFO("TC58CYG2S0HRAIG", 0xBD,
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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NAND_ECCREQ(8, 512),
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@ -168,6 +170,91 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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tx58cxgxsxraix_ecc_get_status)),
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/*
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* 2nd generation serial nand has HOLD_D which is equivalent to
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* QE_BIT.
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*/
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/* 3.3V 1Gb (2nd generation) */
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SPINAND_INFO("TC58CVG0S3HRAIJ", 0xE2,
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 2Gb (2nd generation) */
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SPINAND_INFO("TC58CVG1S3HRAIJ", 0xEB,
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 4Gb (2nd generation) */
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SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED,
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 8Gb (2nd generation) */
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SPINAND_INFO("TH58CVG3S0HRAIJ", 0xE4,
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NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb (2nd generation) */
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SPINAND_INFO("TC58CYG0S3HRAIJ", 0xD2,
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NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 2Gb (2nd generation) */
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SPINAND_INFO("TC58CYG1S3HRAIJ", 0xDB,
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NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 4Gb (2nd generation) */
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SPINAND_INFO("TC58CYG2S0HRAIJ", 0xDD,
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NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 8Gb (2nd generation) */
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SPINAND_INFO("TH58CYG3S0HRAIJ", 0xD4,
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NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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};
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};
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static int toshiba_spinand_detect(struct spinand_device *spinand)
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static int toshiba_spinand_detect(struct spinand_device *spinand)
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