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ARM: dts: colibri-imx6ull: update device tree

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Fix compatible node to use regular Toradex notation.
Annotate device tree with standard Colibri pin muxing comments.
Use open-drain I2C pin muxings.
Alphabetically re-order iomuxc nodes.
Rename snvs-ad7879-int-grp touch interrupt node as per Linux device tree.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
This commit is contained in:
Marcel Ziswiler 2019-04-18 01:57:32 +02:00 committed by Stefano Babic
parent d487351959
commit d32273b91c
1 changed files with 52 additions and 39 deletions
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91
arch/arm/dts/imx6ull-colibri.dts
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@ -9,7 +9,7 @@
/ { / {
model = "Toradex Colibri iMX6ULL"; model = "Toradex Colibri iMX6ULL";
compatible = "toradex,imx6ull-colibri", "fsl,imx6ull"; compatible = "toradex,colibri-imx6ull", "fsl,imx6ull";
aliases { aliases {
mmc0 = &usdhc1; mmc0 = &usdhc1;
@ -100,6 +100,7 @@
}; };
}; };
/* NAND */
&gpmi { &gpmi {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>; pinctrl-0 = <&pinctrl_gpmi_nand>;
@ -110,21 +111,28 @@
status = "okay"; status = "okay";
}; };
/*
* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
*/
&i2c1 { &i2c1 {
pinctrl-names = "default", "gpio"; pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_gpio>; pinctrl-1 = <&pinctrl_i2c1_gpio>;
sda-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay"; status = "okay";
}; };
/*
* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
* touch screen controller
*/
&i2c2 { &i2c2 {
pinctrl-names = "default", "gpio"; pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>; pinctrl-1 = <&pinctrl_i2c2_gpio>;
sda-gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay"; status = "okay";
ad7879@2c { ad7879@2c {
@ -150,24 +158,28 @@
&pinctrl_lcdif_ctrl>; &pinctrl_lcdif_ctrl>;
}; };
/* PWM <A> */
&pwm4 { &pwm4 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>; pinctrl-0 = <&pinctrl_pwm4>;
#pwm-cells = <3>; #pwm-cells = <3>;
}; };
/* PWM <B> */
&pwm5 { &pwm5 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm5>; pinctrl-0 = <&pinctrl_pwm5>;
#pwm-cells = <3>; #pwm-cells = <3>;
}; };
/* PWM <C> */
&pwm6 { &pwm6 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm6>; pinctrl-0 = <&pinctrl_pwm6>;
#pwm-cells = <3>; #pwm-cells = <3>;
}; };
/* PWM <D> */
&pwm7 { &pwm7 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm7>; pinctrl-0 = <&pinctrl_pwm7>;
@ -237,6 +249,13 @@
}; };
&iomuxc { &iomuxc {
pinctrl_can_int: canint-grp {
fsl,pins = <
/* SODIMM 73 */
MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0X14
>;
};
pinctrl_enet2: enet2-grp { pinctrl_enet2: enet2-grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
@ -252,6 +271,33 @@
>; >;
}; };
pinctrl_ecspi1_cs: ecspi1-cs-grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x000a0
>;
};
pinctrl_ecspi1: ecspi1-grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x000a0
MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x000a0
MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100a0
>;
};
pinctrl_flexcan2: flexcan2-grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020
MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020
>;
};
pinctrl_gpio_bl_on: gpio-bl-on-grp {
fsl,pins = <
MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x000a0
>;
};
pinctrl_gpio1: gpio1-grp { pinctrl_gpio1: gpio1-grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x74 /* SODIMM 55 */ MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x74 /* SODIMM 55 */
@ -308,39 +354,6 @@
>; >;
}; };
pinctrl_can_int: canint-grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0X14 /* SODIMM 73 */
>;
};
pinctrl_ecspi1_cs: ecspi1-cs-grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x000a0
>;
};
pinctrl_ecspi1: ecspi1-grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x000a0
MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x000a0
MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100a0
>;
};
pinctrl_flexcan2: flexcan2-grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020
MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020
>;
};
pinctrl_gpio_bl_on: gpio-bl-on-grp {
fsl,pins = <
MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x000a0
>;
};
pinctrl_gpmi_nand: gpmi-nand-grp { pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9
@ -553,7 +566,7 @@
>; >;
}; };
pinctrl_snvs_ad7879_int: snvs-ad7879-int { /* TOUCH Interrupt */ pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */
fsl,pins = < fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0b0 MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0b0
>; >;