pci: layerscape: Move streamId allocation to common device tree fixup

Move streamId allocation to layerscape common device tree fixup.
Calculate streamId based on SoC variant.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Wasim Khan 2020-01-06 12:05:59 +00:00 committed by Priyanka Jain
parent 1185b229cc
commit d20eb7a6db
4 changed files with 31 additions and 26 deletions

View File

@ -31,17 +31,6 @@ static int ls_pcie_next_lut_index(struct ls_pcie *pcie)
return -ENOSPC; /* LUT is full */
}
/* returns the next available streamid for pcie, -errno if failed */
static int ls_pcie_next_streamid(void)
{
static int next_stream_id = FSL_PEX_STREAM_ID_START;
if (next_stream_id > FSL_PEX_STREAM_ID_END)
return -EINVAL;
return next_stream_id++;
}
static void lut_writel(struct ls_pcie *pcie, unsigned int value,
unsigned int offset)
{
@ -192,10 +181,12 @@ static void fdt_fixup_pcie_ls(void *blob)
bus = bus->parent;
pcie = dev_get_priv(bus);
streamid = ls_pcie_next_streamid();
streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
if (streamid < 0) {
debug("ERROR: no stream ids free\n");
continue;
} else {
pcie->stream_id_cur++;
}
index = ls_pcie_next_lut_index(pcie);

View File

@ -25,3 +25,27 @@ void ft_pci_setup(void *blob, bd_t *bd)
#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
ft_pci_setup_ls(blob, bd);
}
#if defined(CONFIG_FSL_LAYERSCAPE)
#ifdef CONFIG_ARCH_LX2160A
/* returns the next available streamid for pcie, -errno if failed */
int pcie_next_streamid(int currentid, int idx)
{
if (currentid > FSL_PEX_STREAM_ID_END)
return -EINVAL;
return currentid | ((idx + 1) << 11);
}
#else
/* returns the next available streamid for pcie, -errno if failed */
int pcie_next_streamid(int currentid, int idx)
{
static int next_stream_id = FSL_PEX_STREAM_ID_START;
if (next_stream_id > FSL_PEX_STREAM_ID_END)
return -EINVAL;
return next_stream_id++;
}
#endif
#endif /* CONFIG_FSL_LAYERSCAPE */

View File

@ -16,5 +16,6 @@ void ft_pci_setup_ls(void *blob, bd_t *bd);
#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4
void ft_pci_setup_ls_gen4(void *blob, bd_t *bd);
#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
int pcie_next_streamid(int currentid, int id);
#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_

View File

@ -33,19 +33,6 @@ static int ls_pcie_g4_next_lut_index(struct ls_pcie_g4 *pcie)
return -ENOSPC; /* LUT is full */
}
/* returns the next available streamid for pcie, -errno if failed */
static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie)
{
int stream_id = pcie->stream_id_cur;
if (stream_id > FSL_PEX_STREAM_ID_END)
return -EINVAL;
pcie->stream_id_cur++;
return stream_id | ((pcie->idx + 1) << 11);
}
/*
* Program a single LUT entry
*/
@ -162,10 +149,12 @@ static void fdt_fixup_pcie_ls_gen4(void *blob)
bus = bus->parent;
pcie = dev_get_priv(bus);
streamid = ls_pcie_g4_next_streamid(pcie);
streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
if (streamid < 0) {
debug("ERROR: no stream ids free\n");
continue;
} else {
pcie->stream_id_cur++;
}
index = ls_pcie_g4_next_lut_index(pcie);