From ed0f868d501ee2bc31391210c214e9d07ae0874b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 5 Oct 2020 05:27:00 -0600 Subject: [PATCH 01/50] cros_ec: Fix up driver names to avoid dtoc warnings Fix the dtoc warning in these file by using a driver name that matches the compatible string. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/misc/cros_ec_i2c.c | 4 ++-- drivers/misc/cros_ec_lpc.c | 4 ++-- drivers/misc/cros_ec_spi.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c index c00f5f764a..664bd2b938 100644 --- a/drivers/misc/cros_ec_i2c.c +++ b/drivers/misc/cros_ec_i2c.c @@ -231,8 +231,8 @@ static const struct udevice_id cros_ec_ids[] = { { } }; -U_BOOT_DRIVER(cros_ec_i2c) = { - .name = "cros_ec_i2c", +U_BOOT_DRIVER(google_cros_ec_i2c) = { + .name = "google_cros_ec_i2c", .id = UCLASS_CROS_EC, .of_match = cros_ec_ids, .probe = cros_ec_probe, diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c index 4ad6c8ca66..63702f90fb 100644 --- a/drivers/misc/cros_ec_lpc.c +++ b/drivers/misc/cros_ec_lpc.c @@ -243,8 +243,8 @@ static const struct udevice_id cros_ec_ids[] = { { } }; -U_BOOT_DRIVER(cros_ec_lpc) = { - .name = "cros_ec_lpc", +U_BOOT_DRIVER(google_cros_ec_lpc) = { + .name = "google_cros_ec_lpc", .id = UCLASS_CROS_EC, .of_match = cros_ec_ids, .probe = cros_ec_probe, diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c index 153f971bde..bbc96301ae 100644 --- a/drivers/misc/cros_ec_spi.c +++ b/drivers/misc/cros_ec_spi.c @@ -184,8 +184,8 @@ static const struct udevice_id cros_ec_ids[] = { { } }; -U_BOOT_DRIVER(cros_ec_spi) = { - .name = "cros_ec_spi", +U_BOOT_DRIVER(google_cros_ec_spi) = { + .name = "google_cros_ec_spi", .id = UCLASS_CROS_EC, .of_match = cros_ec_ids, .probe = cros_ec_probe, From 9d20db0483d54b507472fc33ee0c8a71d6c71c85 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 5 Oct 2020 05:27:01 -0600 Subject: [PATCH 02/50] x86: Fix up driver names to avoid dtoc warnings At present there are a lot of dtoc warnings reported when building chromebook_coral, of the form: WARNING: the driver intel_apl_lpc was not found in the driver list Correct these by using driver names that matches their compatible string. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/apollolake/cpu.c | 4 ++-- arch/x86/cpu/apollolake/hostbridge.c | 2 +- arch/x86/cpu/apollolake/lpc.c | 2 +- arch/x86/cpu/apollolake/pch.c | 4 ++-- arch/x86/cpu/apollolake/pmc.c | 2 +- arch/x86/cpu/apollolake/punit.c | 4 ++-- arch/x86/cpu/apollolake/uart.c | 2 +- arch/x86/cpu/intel_common/itss.c | 2 +- arch/x86/cpu/intel_common/p2sb.c | 2 +- drivers/gpio/intel_gpio.c | 4 ++-- drivers/pinctrl/intel/pinctrl_apl.c | 2 +- drivers/rtc/mc146818.c | 4 ++-- drivers/sysreset/sysreset_x86.c | 4 ++-- drivers/timer/tsc_timer.c | 4 ++-- 14 files changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c index 8da2e64e22..a4c9c96cfd 100644 --- a/arch/x86/cpu/apollolake/cpu.c +++ b/arch/x86/cpu/apollolake/cpu.c @@ -102,8 +102,8 @@ static const struct udevice_id cpu_x86_apl_ids[] = { { } }; -U_BOOT_DRIVER(cpu_x86_apl_drv) = { - .name = "cpu_x86_apl", +U_BOOT_DRIVER(intel_apl_cpu) = { + .name = "intel_apl_cpu", .id = UCLASS_CPU, .of_match = cpu_x86_apl_ids, .bind = cpu_x86_bind, diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index 7fd67dcfb6..cafd9d65b2 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -396,7 +396,7 @@ static const struct udevice_id apl_hostbridge_ids[] = { { } }; -U_BOOT_DRIVER(apl_hostbridge_drv) = { +U_BOOT_DRIVER(intel_apl_hostbridge) = { .name = "intel_apl_hostbridge", .id = UCLASS_NORTHBRIDGE, .of_match = apl_hostbridge_ids, diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c index a29832c879..d8e05f6a8f 100644 --- a/arch/x86/cpu/apollolake/lpc.c +++ b/arch/x86/cpu/apollolake/lpc.c @@ -133,7 +133,7 @@ static const struct udevice_id apl_lpc_ids[] = { }; /* All pads are LPC already configured by the hostbridge, so no probing here */ -U_BOOT_DRIVER(apl_lpc_drv) = { +U_BOOT_DRIVER(intel_apl_lpc) = { .name = "intel_apl_lpc", .id = UCLASS_LPC, .of_match = apl_lpc_ids, diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c index 1a5a985221..d9832ff249 100644 --- a/arch/x86/cpu/apollolake/pch.c +++ b/arch/x86/cpu/apollolake/pch.c @@ -28,8 +28,8 @@ static const struct udevice_id apl_pch_ids[] = { { } }; -U_BOOT_DRIVER(apl_pch) = { - .name = "apl_pch", +U_BOOT_DRIVER(intel_apl_pch) = { + .name = "intel_apl_pch", .id = UCLASS_PCH, .of_match = apl_pch_ids, .ops = &apl_pch_ops, diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index 576d018757..cacaa007e0 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -217,7 +217,7 @@ static const struct udevice_id apl_pmc_ids[] = { { } }; -U_BOOT_DRIVER(apl_pmc) = { +U_BOOT_DRIVER(intel_apl_pmc) = { .name = "intel_apl_pmc", .id = UCLASS_ACPI_PMC, .of_match = apl_pmc_ids, diff --git a/arch/x86/cpu/apollolake/punit.c b/arch/x86/cpu/apollolake/punit.c index e76f2805d7..e67c011e22 100644 --- a/arch/x86/cpu/apollolake/punit.c +++ b/arch/x86/cpu/apollolake/punit.c @@ -88,8 +88,8 @@ static const struct udevice_id apl_syscon_ids[] = { { } }; -U_BOOT_DRIVER(syscon_intel_punit) = { - .name = "intel_punit_syscon", +U_BOOT_DRIVER(intel_apl_punit) = { + .name = "intel_apl_punit", .id = UCLASS_SYSCON, .of_match = apl_syscon_ids, .probe = apl_punit_probe, diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c index f368f7d2db..c522aa9780 100644 --- a/arch/x86/cpu/apollolake/uart.c +++ b/arch/x86/cpu/apollolake/uart.c @@ -122,7 +122,7 @@ static const struct udevice_id apl_ns16550_serial_ids[] = { { }, }; -U_BOOT_DRIVER(apl_ns16550) = { +U_BOOT_DRIVER(intel_apl_ns16550) = { .name = "intel_apl_ns16550", .id = UCLASS_SERIAL, .of_match = apl_ns16550_serial_ids, diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index fe84ebe29f..53dd09d8f5 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -235,7 +235,7 @@ static const struct udevice_id itss_ids[] = { { } }; -U_BOOT_DRIVER(itss_drv) = { +U_BOOT_DRIVER(intel_itss) = { .name = "intel_itss", .id = UCLASS_IRQ, .of_match = itss_ids, diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index 361d4c90cb..a0a4001e03 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -189,7 +189,7 @@ static const struct udevice_id p2sb_ids[] = { { } }; -U_BOOT_DRIVER(p2sb_drv) = { +U_BOOT_DRIVER(intel_p2sb) = { .name = "intel_p2sb", .id = UCLASS_P2SB, .of_match = p2sb_ids, diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index 6a3a8c4cfa..c3b67f24d8 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -193,8 +193,8 @@ static const struct udevice_id intel_intel_gpio_ids[] = { { } }; -U_BOOT_DRIVER(gpio_intel) = { - .name = "gpio_intel", +U_BOOT_DRIVER(intel_gpio) = { + .name = "intel_gpio", .id = UCLASS_GPIO, .of_match = intel_intel_gpio_ids, .ops = &gpio_intel_ops, diff --git a/drivers/pinctrl/intel/pinctrl_apl.c b/drivers/pinctrl/intel/pinctrl_apl.c index 7624a9974f..727bacfd04 100644 --- a/drivers/pinctrl/intel/pinctrl_apl.c +++ b/drivers/pinctrl/intel/pinctrl_apl.c @@ -174,7 +174,7 @@ static const struct udevice_id apl_gpio_ids[] = { { } }; -U_BOOT_DRIVER(apl_pinctrl_drv) = { +U_BOOT_DRIVER(intel_apl_pinctrl) = { .name = "intel_apl_pinctrl", .id = UCLASS_PINCTRL, .of_match = apl_gpio_ids, diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c index b98c39d821..71f96e282e 100644 --- a/drivers/rtc/mc146818.c +++ b/drivers/rtc/mc146818.c @@ -246,8 +246,8 @@ static const struct udevice_id rtc_mc146818_ids[] = { { } }; -U_BOOT_DRIVER(rtc_mc146818) = { - .name = "rtc_mc146818", +U_BOOT_DRIVER(motorola_mc146818) = { + .name = "motorola_mc146818", .id = UCLASS_RTC, .of_match = rtc_mc146818_ids, .probe = rtc_mc146818_probe, diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c index bc91143560..7682ffbd29 100644 --- a/drivers/sysreset/sysreset_x86.c +++ b/drivers/sysreset/sysreset_x86.c @@ -148,8 +148,8 @@ static struct sysreset_ops x86_sysreset_ops = { .get_last = x86_sysreset_get_last, }; -U_BOOT_DRIVER(x86_sysreset) = { - .name = "x86-sysreset", +U_BOOT_DRIVER(x86_reset) = { + .name = "x86_reset", .id = UCLASS_SYSRESET, .of_match = x86_sysreset_ids, .ops = &x86_sysreset_ops, diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index abc0a1da05..e3677704b3 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -482,8 +482,8 @@ static const struct udevice_id tsc_timer_ids[] = { { } }; -U_BOOT_DRIVER(tsc_timer) = { - .name = "tsc_timer", +U_BOOT_DRIVER(x86_tsc_timer) = { + .name = "x86_tsc_timer", .id = UCLASS_TIMER, .of_match = tsc_timer_ids, .probe = tsc_timer_probe, From 415eab0655a8bdfa07464e2b3f9724a198afc81f Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Tue, 3 Nov 2020 15:34:51 +0100 Subject: [PATCH 03/50] smbios: add parsing API Add a very simple API to be able to access SMBIOS strings like vendor, model and bios version. Signed-off-by: Christian Gmeiner Reviewed-by: Bin Meng --- include/smbios.h | 27 +++++++++++++ lib/Kconfig | 5 +++ lib/Makefile | 1 + lib/smbios-parser.c | 96 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 129 insertions(+) create mode 100644 lib/smbios-parser.c diff --git a/include/smbios.h b/include/smbios.h index 97b9ddce23..44f49e9556 100644 --- a/include/smbios.h +++ b/include/smbios.h @@ -237,4 +237,31 @@ typedef int (*smbios_write_type)(ulong *addr, int handle); */ ulong write_smbios_table(ulong addr); +/** + * smbios_entry() - Get a valid struct smbios_entry pointer + * + * @address: address where smbios tables is located + * @size: size of smbios table + * @return: NULL or a valid pointer to a struct smbios_entry + */ +const struct smbios_entry *smbios_entry(u64 address, u32 size); + +/** + * smbios_header() - Search for SMBIOS header type + * + * @entry: pointer to a struct smbios_entry + * @type: SMBIOS type + * @return: NULL or a valid pointer to a struct smbios_header + */ +const struct smbios_header *smbios_header(const struct smbios_entry *entry, int type); + +/** + * smbios_string() - Return string from SMBIOS + * + * @header: pointer to struct smbios_header + * @index: string index + * @return: NULL or a valid const char pointer + */ +const char *smbios_string(const struct smbios_header *header, int index); + #endif /* _SMBIOS_H_ */ diff --git a/lib/Kconfig b/lib/Kconfig index 79651eaad1..5f1b95d7d7 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -680,6 +680,11 @@ config OID_REGISTRY help Enable fast lookup object identifier registry. +config SMBIOS_PARSER + bool "SMBIOS parser" + help + A simple parser for SMBIOS data. + source lib/efi/Kconfig source lib/efi_loader/Kconfig source lib/optee/Kconfig diff --git a/lib/Makefile b/lib/Makefile index 7c7fb9aae7..851a80ef3b 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_FIT) += fdtdec_common.o obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o +obj-$(CONFIG_SMBIOS_PARSER) += smbios-parser.o obj-$(CONFIG_IMAGE_SPARSE) += image-sparse.o obj-y += ldiv.o obj-$(CONFIG_XXHASH) += xxhash.o diff --git a/lib/smbios-parser.c b/lib/smbios-parser.c new file mode 100644 index 0000000000..b89f988ef9 --- /dev/null +++ b/lib/smbios-parser.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020, Bachmann electronic GmbH + */ + +#include +#include + +static inline int verify_checksum(const struct smbios_entry *e) +{ + /* + * Checksums for SMBIOS tables are calculated to have a value, so that + * the sum over all bytes yields zero (using unsigned 8 bit arithmetic). + */ + u8 *byte = (u8 *)e; + u8 sum = 0; + + for (int i = 0; i < e->length; i++) + sum += byte[i]; + + return sum; +} + +const struct smbios_entry *smbios_entry(u64 address, u32 size) +{ + const struct smbios_entry *entry = (struct smbios_entry *)(uintptr_t)address; + + if (!address | !size) + return NULL; + + if (memcmp(entry->anchor, "_SM_", 4)) + return NULL; + + if (verify_checksum(entry)) + return NULL; + + return entry; +} + +static const struct smbios_header *next_header(const struct smbios_header *curr) +{ + u8 *pos = ((u8 *)curr) + curr->length; + + /* search for _double_ NULL bytes */ + while (!((*pos == 0) && (*(pos + 1) == 0))) + pos++; + + /* step behind the double NULL bytes */ + pos += 2; + + return (struct smbios_header *)pos; +} + +const struct smbios_header *smbios_header(const struct smbios_entry *entry, int type) +{ + const unsigned int num_header = entry->struct_count; + const struct smbios_header *header = (struct smbios_header *)entry->struct_table_address; + + for (unsigned int i = 0; i < num_header; i++) { + if (header->type == type) + return header; + + header = next_header(header); + } + + return NULL; +} + +static const char *string_from_smbios_table(const struct smbios_header *header, + int idx) +{ + unsigned int i = 1; + u8 *pos; + + if (!header) + return NULL; + + pos = ((u8 *)header) + header->length; + + while (i < idx) { + if (*pos == 0x0) + i++; + + pos++; + } + + return (const char *)pos; +} + +const char *smbios_string(const struct smbios_header *header, int index) +{ + if (!header) + return NULL; + + return string_from_smbios_table(header, index); +} From 43a218b65366e225297a20442b49d07129765f73 Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Tue, 3 Nov 2020 15:34:52 +0100 Subject: [PATCH 04/50] coreboot: make use of smbios parser If u-boot gets used as coreboot payload it might be nice to get vendor, model and bios version from smbios. I am not sure about the output of all the read information. With qemu target for coreboot this could look this: CBFS: Found @ offset 14f40 size 3b188 Checking segment from ROM address 0xffc15178 Checking segment from ROM address 0xffc15194 Loading segment from ROM address 0xffc15178 code (compression=1) New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150 Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150 using LZMA Loading segment from ROM address 0xffc15194 Entry Point 0x01110000 BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms Jumping to boot code at 0x01110000(0x07fa7000) U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200) CPU: x86_64, vendor AMD, device 663h DRAM: 127.1 MiB MMC: Video: No video mode configured in coreboot! Video: No video mode configured in coreboot! Vendor: QEMU Model: Standard PC (i440FX + PIIX, 1996) Bios Version: 4.12-3152-g326a499f6f-dirty Net: e1000: 52:54:00:12:34:56 eth0: e1000#0 No working controllers found Finalizing coreboot Hit any key to stop autoboot: 0 Signed-off-by: Christian Gmeiner Reviewed-by: Bin Meng --- board/coreboot/coreboot/coreboot.c | 45 ++++++++++++++++++++++++++++++ configs/coreboot_defconfig | 1 + 2 files changed, 46 insertions(+) diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c index b791b82ef4..55aeced542 100644 --- a/board/coreboot/coreboot/coreboot.c +++ b/board/coreboot/coreboot/coreboot.c @@ -4,7 +4,9 @@ */ #include +#include #include +#include int board_early_init_r(void) { @@ -16,3 +18,46 @@ int board_early_init_r(void) return 0; } + +#ifdef CONFIG_SMBIOS_PARSER +int show_board_info(void) +{ + const struct smbios_entry *smbios = smbios_entry(lib_sysinfo.smbios_start, lib_sysinfo.smbios_size); + + if (!smbios) + goto fallback; + + const struct smbios_header *bios = smbios_header(smbios, SMBIOS_BIOS_INFORMATION); + const struct smbios_header *system = smbios_header(smbios, SMBIOS_SYSTEM_INFORMATION); + const struct smbios_type0 *t0 = (struct smbios_type0 *)bios; + const struct smbios_type1 *t1 = (struct smbios_type1 *)system; + + if (!t0 || !t1) + goto fallback; + + const char *bios_ver = smbios_string(bios, t0->bios_ver); + const char *model = smbios_string(system, t1->product_name); + const char *manufacturer = smbios_string(system, t1->manufacturer); + + if (!model || !manufacturer || !bios_ver) + goto fallback; + + printf("Vendor: %s\n", manufacturer); + printf("Model: %s\n", model); + printf("BIOS Version: %s\n", bios_ver); + + return 0; + +fallback: +#ifdef CONFIG_OF_CONTROL + DECLARE_GLOBAL_DATA_PTR; + + model = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + + if (model) + printf("Model: %s\n", model); +#endif + + return checkboard(); +} +#endif diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 3249b2fb2f..501a20e790 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -43,3 +43,4 @@ CONFIG_SOUND=y CONFIG_SOUND_I8254=y CONFIG_CONSOLE_SCROLL_LINES=5 # CONFIG_GZIP is not set +CONFIG_SMBIOS_PARSER=y From 1779b8a96a32706dc8e2e71187889b38d9822443 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:14 -0700 Subject: [PATCH 05/50] Add an assembly guard around linux/bitops.h This file can be included by any header but it includes C code. Guard it to avoid errors when compiling ASL, etc. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/linux/bitops.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 6b509dce58..16f28993f5 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -1,7 +1,7 @@ #ifndef _LINUX_BITOPS_H #define _LINUX_BITOPS_H -#ifndef USE_HOSTCC +#if !defined(USE_HOSTCC) && !defined(__ASSEMBLY__) #include #include @@ -218,6 +218,6 @@ static inline void generic_clear_bit(int nr, volatile unsigned long *addr) *p &= ~mask; } -#endif /* !USE_HOSTCC */ +#endif /* !USE_HOSTCC && !__ASSEMBLY__ */ #endif From 6571d873159789ee7caa571eafa5fa641005971c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:15 -0700 Subject: [PATCH 06/50] x86: apl: Add core init for the SoC Set up MSRs required for Apollo Lake. This enables Linux to use the timers correctly. Also write the fixed MSRs for this platform. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/apollolake/cpu.c | 84 ++++++++++++++++++++++ arch/x86/cpu/apollolake/cpu_common.c | 25 +++++++ arch/x86/cpu/apollolake/cpu_spl.c | 20 ------ arch/x86/cpu/intel_common/cpu.c | 19 +++++ arch/x86/include/asm/arch-apollolake/cpu.h | 14 ++++ arch/x86/include/asm/cpu_common.h | 9 +++ arch/x86/include/asm/msr-index.h | 20 +++++- 7 files changed, 170 insertions(+), 21 deletions(-) diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c index a4c9c96cfd..d37f91d1ce 100644 --- a/arch/x86/cpu/apollolake/cpu.c +++ b/arch/x86/cpu/apollolake/cpu.c @@ -13,6 +13,9 @@ #include #include #include +#include +#include +#include #include #define CSTATE_RES(address_space, width, offset, address) \ @@ -86,6 +89,86 @@ static int acpi_cpu_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx) return 0; } +static void update_fixed_mtrrs(void) +{ + native_write_msr(MTRR_FIX_64K_00000_MSR, + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK), + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK)); + native_write_msr(MTRR_FIX_16K_80000_MSR, + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK), + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK)); + native_write_msr(MTRR_FIX_4K_E0000_MSR, + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK), + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK)); + native_write_msr(MTRR_FIX_4K_E8000_MSR, + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK), + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK)); + native_write_msr(MTRR_FIX_4K_F0000_MSR, + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK), + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK)); + native_write_msr(MTRR_FIX_4K_F8000_MSR, + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK), + MTRR_FIX_TYPE(MTRR_TYPE_WRBACK)); +} + +static void setup_core_msrs(void) +{ + wrmsrl(MSR_PMG_CST_CONFIG_CONTROL, + PKG_C_STATE_LIMIT_C2_MASK | CORE_C_STATE_LIMIT_C10_MASK | + IO_MWAIT_REDIRECT_MASK | CST_CFG_LOCK_MASK); + /* Power Management I/O base address for I/O trapping to C-states */ + wrmsrl(MSR_PMG_IO_CAPTURE_ADR, ACPI_PMIO_CST_REG | + (PMG_IO_BASE_CST_RNG_BLK_SIZE << 16)); + /* Disable C1E */ + msr_clrsetbits_64(MSR_POWER_CTL, 0x2, 0); + /* Disable support for MONITOR and MWAIT instructions */ + msr_clrsetbits_64(MSR_IA32_MISC_ENABLE, MISC_ENABLE_MWAIT, 0); + /* + * Enable and Lock the Advanced Encryption Standard (AES-NI) + * feature register + */ + msr_clrsetbits_64(MSR_FEATURE_CONFIG, FEATURE_CONFIG_RESERVED_MASK, + FEATURE_CONFIG_LOCK); + + update_fixed_mtrrs(); +} + +static int soc_core_init(void) +{ + struct udevice *pmc; + int ret; + + /* Clear out pending MCEs */ + cpu_mca_configure(); + + /* Set core MSRs */ + setup_core_msrs(); + /* + * Enable ACPI PM timer emulation, which also lets microcode know + * location of ACPI_BASE_ADDRESS. This also enables other features + * implemented in microcode. + */ + ret = uclass_first_device_err(UCLASS_ACPI_PMC, &pmc); + if (ret) + return log_msg_ret("PMC", ret); + enable_pm_timer_emulation(pmc); + + return 0; +} + +static int cpu_apl_probe(struct udevice *dev) +{ + if (gd->flags & GD_FLG_RELOC) { + int ret; + + ret = soc_core_init(); + if (ret) + return log_ret(ret); + } + + return 0; +} + struct acpi_ops apl_cpu_acpi_ops = { .fill_ssdt = acpi_cpu_fill_ssdt, }; @@ -107,6 +190,7 @@ U_BOOT_DRIVER(intel_apl_cpu) = { .id = UCLASS_CPU, .of_match = cpu_x86_apl_ids, .bind = cpu_x86_bind, + .probe = cpu_apl_probe, .ops = &cpu_x86_apl_ops, ACPI_OPS_PTR(&apl_cpu_acpi_ops) .flags = DM_FLAG_PRE_RELOC, diff --git a/arch/x86/cpu/apollolake/cpu_common.c b/arch/x86/cpu/apollolake/cpu_common.c index ba6bda37bc..63f6999b02 100644 --- a/arch/x86/cpu/apollolake/cpu_common.c +++ b/arch/x86/cpu/apollolake/cpu_common.c @@ -4,8 +4,13 @@ */ #include +#include +#include #include #include +#include +#include +#include void cpu_flush_l1d_to_l2(void) { @@ -15,3 +20,23 @@ void cpu_flush_l1d_to_l2(void) msr.lo |= FLUSH_DL1_L2; msr_write(MSR_POWER_MISC, msr); } + +void enable_pm_timer_emulation(const struct udevice *pmc) +{ + struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(pmc); + msr_t msr; + + /* + * The derived frequency is calculated as follows: + * (CTC_FREQ * msr[63:32]) >> 32 = target frequency. + * + * Back-solve the multiplier so the 3.579545MHz ACPI timer frequency is + * used. + */ + msr.hi = (3579545ULL << 32) / CTC_FREQ; + + /* Set PM1 timer IO port and enable */ + msr.lo = EMULATE_PM_TMR_EN | (upriv->acpi_base + R_ACPI_PM1_TMR); + debug("PM timer %x %x\n", msr.hi, msr.lo); + msr_write(MSR_EMULATE_PM_TIMER, msr); +} diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c index 9f32f2e27e..fafe4dbc0a 100644 --- a/arch/x86/cpu/apollolake/cpu_spl.c +++ b/arch/x86/cpu/apollolake/cpu_spl.c @@ -114,26 +114,6 @@ static int fast_spi_cache_bios_region(void) return 0; } -static void enable_pm_timer_emulation(struct udevice *pmc) -{ - struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(pmc); - msr_t msr; - - /* - * The derived frequency is calculated as follows: - * (CTC_FREQ * msr[63:32]) >> 32 = target frequency. - * - * Back-solve the multiplier so the 3.579545MHz ACPI timer frequency is - * used. - */ - msr.hi = (3579545ULL << 32) / CTC_FREQ; - - /* Set PM1 timer IO port and enable */ - msr.lo = EMULATE_PM_TMR_EN | (upriv->acpi_base + R_ACPI_PM1_TMR); - debug("PM timer %x %x\n", msr.hi, msr.lo); - msr_write(MSR_EMULATE_PM_TIMER, msr); -} - static void google_chromeec_ioport_range(uint *out_basep, uint *out_sizep) { uint base; diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 39aa0f63c6..a51bf86f7a 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -306,3 +306,22 @@ int cpu_get_cores_per_package(void) return cores; } + +void cpu_mca_configure(void) +{ + msr_t msr; + int i; + int num_banks; + + msr = msr_read(MSR_IA32_MCG_CAP); + num_banks = msr.lo & 0xff; + msr.lo = 0; + msr.hi = 0; + for (i = 0; i < num_banks; i++) { + /* Clear the machine check status */ + msr_write(MSR_IA32_MC0_STATUS + (i * 4), msr); + /* Initialise machine checks */ + msr_write(MSR_IA32_MC0_CTL + i * 4, + (msr_t) {.lo = 0xffffffff, .hi = 0xffffffff}); + } +} diff --git a/arch/x86/include/asm/arch-apollolake/cpu.h b/arch/x86/include/asm/arch-apollolake/cpu.h index 5e906c5e7d..67d48c6109 100644 --- a/arch/x86/include/asm/arch-apollolake/cpu.h +++ b/arch/x86/include/asm/arch-apollolake/cpu.h @@ -15,6 +15,20 @@ #ifndef __ASSEMBLY__ /* Flush L1D to L2 */ void cpu_flush_l1d_to_l2(void); + +/** + * Enable emulation of the PM timer + * + * Some legacy OSes cannot tolerate the ACPI timer stoping during idle states, + * and this results in higher power consumption. ACPI timer emulation allows + * disabling of the ACPI Timer (PM1_TMR) to have no impact on the system, with + * the exception that TMR_STS will not be set on an overflow condition. All + * aligned 32-bit reads from the ACPI Timer port are valid and will behave as if + * the ACPI timer remains enabled. + * + * @pmc: PMC device + */ +void enable_pm_timer_emulation(const struct udevice *pmc); #endif #endif /* _ASM_ARCH_CPU_H */ diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index 48f56c2aad..2a5779a8e1 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -184,4 +184,13 @@ int cpu_get_max_turbo_ratio(void); */ int cpu_get_cores_per_package(void); +/** + * cpu_mca_configure() - Set up machine-check exceptions ready for use + * + * These allow the SoC to report errors while running. See here for details: + * + * https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/machine-check-exceptions-debug-paper.pdf + */ +void cpu_mca_configure(void); + #endif diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 94e6b18e21..c49b4225ac 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -68,7 +68,18 @@ #define MSR_BSEL_CR_OVERCLOCK_CONTROL 0x000000cd #define MSR_PLATFORM_INFO 0x000000ce #define MSR_PMG_CST_CONFIG_CONTROL 0x000000e2 -#define SINGLE_PCTL (1 << 11) +/* Set MSR_PMG_CST_CONFIG_CONTROL[3:0] for Package C-State limit */ +#define PKG_C_STATE_LIMIT_C2_MASK BIT(1) +/* Set MSR_PMG_CST_CONFIG_CONTROL[7:4] for Core C-State limit*/ +#define CORE_C_STATE_LIMIT_C10_MASK 0x70 +/* Set MSR_PMG_CST_CONFIG_CONTROL[10] to IO redirect to MWAIT */ +#define IO_MWAIT_REDIRECT_MASK BIT(10) +/* Set MSR_PMG_CST_CONFIG_CONTROL[15] to lock CST_CFG [0-15] bits */ +#define CST_CFG_LOCK_MASK BIT(15) +#define SINGLE_PCTL BIT(11) + +/* ACPI PMIO Offset to C-state register */ +#define ACPI_PMIO_CST_REG (ACPI_BASE_ADDRESS + 0x14) #define MSR_MTRRcap 0x000000fe #define MSR_IA32_BBL_CR_CTL 0x00000119 @@ -83,6 +94,10 @@ #define EMULATE_PM_TMR_EN (1 << 16) #define EMULATE_DELAY_VALUE 0x13 +#define MSR_FEATURE_CONFIG 0x13c +#define FEATURE_CONFIG_RESERVED_MASK 0x3ULL +#define FEATURE_CONFIG_LOCK (1 << 0) + #define MSR_IA32_SYSENTER_CS 0x00000174 #define MSR_IA32_SYSENTER_ESP 0x00000175 #define MSR_IA32_SYSENTER_EIP 0x00000176 @@ -453,6 +468,9 @@ #define MSR_AMD_PERF_CTL 0xc0010062 #define MSR_PMG_CST_CONFIG_CTL 0x000000e2 +/* CST Range (R/W) IO port block size */ +#define PMG_IO_BASE_CST_RNG_BLK_SIZE 0x5 + #define MSR_PMG_IO_CAPTURE_ADR 0x000000e4 #define MSR_IA32_MPERF 0x000000e7 #define MSR_IA32_APERF 0x000000e8 From dac7778d74d052380f904622e738dc749b695afc Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:16 -0700 Subject: [PATCH 07/50] x86: Add a layout for Chrome OS verified boot Add definitions for part of the vboot context used with verified boot. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/include/asm/acpi/vbnv_layout.h | 38 +++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 arch/x86/include/asm/acpi/vbnv_layout.h diff --git a/arch/x86/include/asm/acpi/vbnv_layout.h b/arch/x86/include/asm/acpi/vbnv_layout.h new file mode 100644 index 0000000000..89065524d3 --- /dev/null +++ b/arch/x86/include/asm/acpi/vbnv_layout.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef __ASM_ACPI_VBNV_LAYOUT_H__ +#define __ASM_ACPI_VBNV_LAYOUT_H__ + +#define VBOOT_VBNV_BLOCK_SIZE 16 /* Size of NV storage block in bytes */ + +/* Constants for NV storage, for use with ACPI */ +#define HEADER_OFFSET 0 +#define HEADER_MASK 0xc0 +#define HEADER_SIGNATURE 0x40 +#define HEADER_FIRMWARE_SETTINGS_RESET 0x20 +#define HEADER_KERNEL_SETTINGS_RESET 0x10 + +#define BOOT_OFFSET 1 +#define BOOT_DEBUG_RESET_MODE 0x80 +#define BOOT_DISABLE_DEV_REQUEST 0x40 +#define BOOT_DISPLAY_REQUEST 0x20 +#define BOOT_TRY_B_COUNT_MASK 0x0f + +#define RECOVERY_OFFSET 2 +#define LOCALIZATION_OFFSET 3 + +#define DEV_FLAGS_OFFSET 4 +#define DEV_BOOT_USB_MASK 0x01 +#define DEV_BOOT_SIGNED_ONLY_MASK 0x02 +#define DEV_ENABLE_UDC 0x40 + +#define MISC_FLAGS_OFFSET 8 +#define MISC_FLAGS_BATTERY_CUTOFF_MASK 0x08 + +#define KERNEL_FIELD_OFFSET 11 +#define CRC_OFFSET 15 + +#endif /* __ASM_ACPI_VBNV_LAYOUT_H__ */ From 653554b40aa5c1d32e9a6281dc97f1b75eff724b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:17 -0700 Subject: [PATCH 08/50] x86: Add support for private files Some boards need to include binary data into the image for use during the boot process. Add a node for these. An example is the audio-codec configuration used by some audio drivers on Intel platforms. If no private files are provided, they will be omitted. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/dts/u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 90badcc15c..bf92f45f2d 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -138,6 +138,10 @@ filename = CONFIG_FSP_FILE_S; }; #endif + private_files: private-files { + type = "files"; + pattern = "*.dat"; + }; #ifdef CONFIG_HAVE_CMC intel-cmc { filename = CONFIG_CMC_FILE; From 38e498c3a2b5b52e7935516cba0927e0d90c365c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:18 -0700 Subject: [PATCH 09/50] x86: Allow writing tables to fail At present write_tables() can fail but does not report this problem to its caller. Fix this by changing the return type. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/cpu.c | 9 ++++++++- arch/x86/include/asm/tables.h | 4 +++- arch/x86/lib/tables.c | 5 ++++- 3 files changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index f869275396..71351262f6 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -18,6 +18,8 @@ * src/arch/x86/lib/cpu.c */ +#define LOG_CATEGORY UCLASS_CPU + #include #include #include @@ -200,6 +202,7 @@ __weak void board_final_cleanup(void) int last_stage_init(void) { struct acpi_fadt __maybe_unused *fadt; + int ret; board_final_init(); @@ -210,7 +213,11 @@ int last_stage_init(void) acpi_resume(fadt); } - write_tables(); + ret = write_tables(); + if (ret) { + log_err("Failed to write tables\n"); + return log_msg_ret("table", ret); + } if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) { fadt = acpi_find_fadt(); diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h index f7c72ed3db..bf66e79018 100644 --- a/arch/x86/include/asm/tables.h +++ b/arch/x86/include/asm/tables.h @@ -49,8 +49,10 @@ void table_fill_string(char *dest, const char *src, size_t n, char pad); * This writes x86 configuration tables, including PIRQ routing table, * Multi-Processor table and ACPI table. Whether a specific type of * configuration table is written is controlled by a Kconfig option. + * + * @return 0 if OK, -ENOSPC if table too large */ -void write_tables(void); +int write_tables(void); /** * write_pirq_routing_table() - Write PIRQ routing table diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 7bad5dd303..7099866a78 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -64,7 +64,7 @@ void table_fill_string(char *dest, const char *src, size_t n, char pad) dest[i] = pad; } -void write_tables(void) +int write_tables(void) { u32 rom_table_start = ROM_TABLE_ADDR; u32 rom_table_end; @@ -91,6 +91,7 @@ void write_tables(void) cfg_tables[i].size = table_size; } else { printf("%d: no memory for configuration tables\n", i); + return -ENOSPC; } #endif @@ -105,4 +106,6 @@ void write_tables(void) write_coreboot_table(CB_TABLE_ADDR, cfg_tables); #endif debug("- done writing tables\n"); + + return 0; } From 5019e201ccaee4bd54ba707dfc4eece885857629 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:19 -0700 Subject: [PATCH 10/50] x86: acpi: Store the ACPI context in global_data At present we create the ACPI context but then drop it after generation of tables is complete. This is annoying because we have to then search for tables later. To fix this, allocate the context and store it in global_data. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_table.c | 7 ++++++- include/asm-generic/global_data.h | 13 +++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 6d405b09fd..f0f342d893 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -494,7 +494,7 @@ void acpi_create_ssdt(struct acpi_ctx *ctx, struct acpi_table_header *ssdt, */ ulong write_acpi_tables(ulong start_addr) { - struct acpi_ctx sctx, *ctx = &sctx; + struct acpi_ctx *ctx; struct acpi_facs *facs; struct acpi_table_header *dsdt; struct acpi_fadt *fadt; @@ -509,6 +509,11 @@ ulong write_acpi_tables(ulong start_addr) int ret; int i; + ctx = calloc(1, sizeof(*ctx)); + if (!ctx) + return log_msg_ret("mem", -ENOMEM); + gd->acpi_ctx = ctx; + start = map_sysmem(start_addr, 0); debug("ACPI: Writing ACPI tables at %lx\n", start_addr); diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index f392043796..87d827d0f4 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -24,6 +24,7 @@ #include #include +struct acpi_ctx; struct driver_rt; typedef struct global_data gd_t; @@ -420,6 +421,12 @@ struct global_data { */ struct udevice *watchdog_dev; #endif +#ifdef CONFIG_GENERATE_ACPI_TABLE + /** + * @acpi_ctx: ACPI context pointer + */ + struct acpi_ctx *acpi_ctx; +#endif }; /** @@ -452,6 +459,12 @@ struct global_data { #define gd_dm_driver_rt() NULL #endif +#ifdef CONFIG_GENERATE_ACPI_TABLE +#define gd_acpi_ctx() gd->acpi_ctx +#else +#define gd_acpi_ctx() NULL +#endif + /** * enum gd_flags - global data flags * From dc0791d4154614cf4f32e295f88ec1e7d5a227a1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:20 -0700 Subject: [PATCH 11/50] x86: Don't bother clearing global NVS The bloblist guarantees that blobs are zeroed so there is no need to do an additional memset(). Drop it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/intel_common/acpi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/cpu/intel_common/acpi.c b/arch/x86/cpu/intel_common/acpi.c index 4496bbfd99..6a3456f476 100644 --- a/arch/x86/cpu/intel_common/acpi.c +++ b/arch/x86/cpu/intel_common/acpi.c @@ -202,7 +202,6 @@ int southbridge_inject_dsdt(const struct udevice *dev, struct acpi_ctx *ctx) (void **)&gnvs); if (ret) return log_msg_ret("bloblist", ret); - memset(gnvs, '\0', sizeof(*gnvs)); ret = acpi_create_gnvs(gnvs); if (ret) From 726310166b3585ee8a0936f88e7e1c12c3180013 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:21 -0700 Subject: [PATCH 12/50] x86: coral: Drop the duplicate PCIe settings These settings are included twice. The second lot are correct, so drop the others. Signed-off-by: Simon Glass Reported-by: Wolfgang Wallner Reviewed-by: Bin Meng --- arch/x86/dts/chromebook_coral.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 893a59b162..8801b58bb5 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -718,8 +718,6 @@ fsps,ish-enable = <0>; fsps,enable-sata = <0>; - fsps,pcie-root-port-en = [00 00 00 00 00 01]; - fsps,pcie-rp-hot-plug = [00 00 00 00 00 01]; fsps,i2c6-enable = ; fsps,i2c7-enable = ; fsps,hsuart3-enable = ; From cac9c6a38f7828ae049c9c38af4a6d1d6d8e12d7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:22 -0700 Subject: [PATCH 13/50] x86: Add SMBIOS info for Coral This is required by Chrome OS so that the audio and other unibuild features work correctly. Add it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/dts/chromebook_coral.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 8801b58bb5..92f70b13dd 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -54,6 +54,14 @@ recovery-gpios = <&gpio_nw (-1) GPIO_ACTIVE_LOW>; write-protect-gpios = <&gpio_nw GPIO_75 GPIO_ACTIVE_HIGH>; phase-enforce-gpios = <&gpio_n GPIO_10 GPIO_ACTIVE_HIGH>; + smbios { + manufacturer = "Google"; + product = "Coral"; + version = "rev2"; + serial = "123456789"; + sku = "sku3"; + family = "Google_Coral"; + }; }; config { From f36e4c7d8059a3bb03bb172bf87ebefd7a95bd56 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:24 -0700 Subject: [PATCH 14/50] x86: Use if instead of #ifdef in write_tables() Use if() to remove the extra build path in this code. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/tables.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 7099866a78..f7b71c5cd1 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -68,10 +68,8 @@ int write_tables(void) { u32 rom_table_start = ROM_TABLE_ADDR; u32 rom_table_end; -#ifdef CONFIG_SEABIOS u32 high_table, table_size; struct memory_area cfg_tables[ARRAY_SIZE(table_list) + 1]; -#endif int i; debug("Writing tables to %x:\n", rom_table_start); @@ -81,30 +79,32 @@ int write_tables(void) rom_table_end = table->write(rom_table_start); rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN); -#ifdef CONFIG_SEABIOS - table_size = rom_table_end - rom_table_start; - high_table = (u32)high_table_malloc(table_size); - if (high_table) { - table->write(high_table); + if (IS_ENABLED(CONFIG_SEABIOS)) { + table_size = rom_table_end - rom_table_start; + high_table = (u32)(ulong)high_table_malloc(table_size); + if (high_table) { + table->write(high_table); - cfg_tables[i].start = high_table; - cfg_tables[i].size = table_size; - } else { - printf("%d: no memory for configuration tables\n", i); - return -ENOSPC; + cfg_tables[i].start = high_table; + cfg_tables[i].size = table_size; + } else { + printf("%d: no memory for configuration tables\n", + i); + return -ENOSPC; + } } -#endif debug("- wrote '%s' to %x, end %x\n", table->name, rom_table_start, rom_table_end); rom_table_start = rom_table_end; } -#ifdef CONFIG_SEABIOS - /* make sure the last item is zero */ - cfg_tables[i].size = 0; - write_coreboot_table(CB_TABLE_ADDR, cfg_tables); -#endif + if (IS_ENABLED(CONFIG_SEABIOS)) { + /* make sure the last item is zero */ + cfg_tables[i].size = 0; + write_coreboot_table(CB_TABLE_ADDR, cfg_tables); + } + debug("- done writing tables\n"); return 0; From d2cb7a22da0fec2b67b356e9fb58247cdff8c95e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:25 -0700 Subject: [PATCH 15/50] x86: Allow putting some tables in the bloblist At present all tables are placed starting at address f0000 in memory, and can be up to 64KB in size. If the tables are very large, this may not provide enough space. Also if the tables point to other tables (such as console log or a ramoops area) then we must allocate other memory anyway. The bloblist is a nice place to put these tables since it is contiguous, which makes it easy to reserve this memory for linux using the 820 tables. Add an option to put some of the tables in the bloblist. For SMBIOS and ACPI, create suitable pointers from the f0000 region to the new location of the tables. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/ 20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/] Signed-off-by: Bin Meng --- arch/x86/lib/tables.c | 49 ++++++++++++++++++++++++++++++++++++--- include/acpi/acpi_table.h | 10 ++++++++ include/bloblist.h | 2 ++ lib/Kconfig | 9 +++++++ lib/acpi/acpi_table.c | 4 ++-- 5 files changed, 69 insertions(+), 5 deletions(-) diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index f7b71c5cd1..c4007fa486 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -13,6 +14,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /** * Function prototype to write a specific configuration table * @@ -26,10 +29,16 @@ typedef ulong (*table_write)(ulong addr); * * @name: Name of table (for debugging) * @write: Function to call to write this table + * @tag: Bloblist tag if using CONFIG_BLOBLIST_TABLES + * @size: Maximum table size + * @align: Table alignment in bytes */ struct table_info { const char *name; table_write write; + enum bloblist_tag_t tag; + int size; + int align; }; static struct table_info table_list[] = { @@ -43,10 +52,10 @@ static struct table_info table_list[] = { { "mp", write_mp_table, }, #endif #ifdef CONFIG_GENERATE_ACPI_TABLE - { "acpi", write_acpi_tables, }, + { "acpi", write_acpi_tables, BLOBLISTT_ACPI_TABLES, 0x10000, 0x1000}, #endif #ifdef CONFIG_GENERATE_SMBIOS_TABLE - { "smbios", write_smbios_table, }, + { "smbios", write_smbios_table, BLOBLISTT_SMBIOS_TABLES, 0x1000, 0x100}, #endif }; @@ -66,16 +75,25 @@ void table_fill_string(char *dest, const char *src, size_t n, char pad) int write_tables(void) { - u32 rom_table_start = ROM_TABLE_ADDR; + u32 rom_table_start; u32 rom_table_end; u32 high_table, table_size; struct memory_area cfg_tables[ARRAY_SIZE(table_list) + 1]; int i; + rom_table_start = ROM_TABLE_ADDR; + debug("Writing tables to %x:\n", rom_table_start); for (i = 0; i < ARRAY_SIZE(table_list); i++) { const struct table_info *table = &table_list[i]; + int size = table->size ? : CONFIG_ROM_TABLE_SIZE; + if (IS_ENABLED(CONFIG_BLOBLIST_TABLES) && table->tag) { + rom_table_start = (ulong)bloblist_add(table->tag, size, + table->align); + if (!rom_table_start) + return log_msg_ret("bloblist", -ENOBUFS); + } rom_table_end = table->write(rom_table_start); rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN); @@ -96,6 +114,11 @@ int write_tables(void) debug("- wrote '%s' to %x, end %x\n", table->name, rom_table_start, rom_table_end); + if (rom_table_end - rom_table_start > size) { + log_err("Out of space for configuration tables: need %x, have %x\n", + rom_table_end - rom_table_start, size); + return log_msg_ret("bloblist", -ENOSPC); + } rom_table_start = rom_table_end; } @@ -105,6 +128,26 @@ int write_tables(void) write_coreboot_table(CB_TABLE_ADDR, cfg_tables); } + if (IS_ENABLED(CONFIG_BLOBLIST_TABLES)) { + void *ptr = (void *)CONFIG_ROM_TABLE_ADDR; + + /* Write an RSDP pointing to the tables */ + if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) { + struct acpi_ctx *ctx = gd_acpi_ctx(); + + acpi_write_rsdp(ptr, ctx->rsdt, ctx->xsdt); + ptr += ALIGN(sizeof(struct acpi_rsdp), 16); + } + if (IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE)) { + void *smbios; + + smbios = bloblist_find(BLOBLISTT_SMBIOS_TABLES, 0); + if (!smbios) + return log_msg_ret("smbios", -ENOENT); + memcpy(ptr, smbios, sizeof(struct smbios_entry)); + } + } + debug("- done writing tables\n"); return 0; diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index abbca6530d..a28eb71f4d 100644 --- a/include/acpi/acpi_table.h +++ b/include/acpi/acpi_table.h @@ -688,6 +688,16 @@ int acpi_add_table(struct acpi_ctx *ctx, void *table); */ void acpi_setup_base_tables(struct acpi_ctx *ctx, void *start); +/** + * acpi_write_rsdp() - Write out an RSDP indicating where the ACPI tables are + * + * @rsdp: Address to write RSDP + * @rsdt: Address of RSDT + * @xsdt: Address of XSDT + */ +void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt, + struct acpi_xsdt *xsdt); + #endif /* !__ACPI__*/ #include diff --git a/include/bloblist.h b/include/bloblist.h index 2b4b669689..8cdce61187 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -36,6 +36,8 @@ enum bloblist_tag_t { BLOBLISTT_INTEL_VBT, /* Intel Video-BIOS table */ BLOBLISTT_TPM2_TCG_LOG, /* TPM v2 log space */ BLOBLISTT_TCPA_LOG, /* TPM log space */ + BLOBLISTT_ACPI_TABLES, /* ACPI tables for x86 */ + BLOBLISTT_SMBIOS_TABLES, /* SMBIOS tables for x86 */ BLOBLISTT_COUNT }; diff --git a/lib/Kconfig b/lib/Kconfig index 5f1b95d7d7..8f487533e8 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -637,6 +637,15 @@ config FDT_FIXUP_PARTITIONS menu "System tables" depends on (!EFI && !SYS_COREBOOT) || (ARM && EFI_LOADER) +config BLOBLIST_TABLES + bool "Put tables in a bloblist" + depends on X86 + help + Normally tables are placed at address 0xf0000 and can be up to 64KB + long. With this option, tables are instead placed in the bloblist + with a pointer from 0xf0000. The size can then be larger and the + tables can be placed high in memory. + config GENERATE_SMBIOS_TABLE bool "Generate an SMBIOS (System Management BIOS) table" default y diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c index 908d890389..a0f0961be5 100644 --- a/lib/acpi/acpi_table.c +++ b/lib/acpi/acpi_table.c @@ -183,8 +183,8 @@ int acpi_add_table(struct acpi_ctx *ctx, void *table) return 0; } -static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt, - struct acpi_xsdt *xsdt) +void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt, + struct acpi_xsdt *xsdt) { memset(rsdp, 0, sizeof(struct acpi_rsdp)); From a87fff80eeaaac3653e3d3c63ca73298fd38c02c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:26 -0700 Subject: [PATCH 16/50] x86: nhlt: Correct output of bytes and 16-bit data At present these functions are incorrect. Fix them and add some logging and checking to avoid future problems. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_nhlt.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/x86/lib/acpi_nhlt.c b/arch/x86/lib/acpi_nhlt.c index c64dd9c008..1c1ea27c8f 100644 --- a/arch/x86/lib/acpi_nhlt.c +++ b/arch/x86/lib/acpi_nhlt.c @@ -285,25 +285,26 @@ static void nhlt_free_resources(struct nhlt *nhlt) } struct cursor { + u8 *start; u8 *buf; }; static void ser8(struct cursor *cur, uint val) { *cur->buf = val; - cur->buf += sizeof(val); + cur->buf += sizeof(u8); } static void ser16(struct cursor *cur, uint val) { put_unaligned_le16(val, cur->buf); - cur->buf += sizeof(val); + cur->buf += sizeof(u16); } static void ser32(struct cursor *cur, uint val) { put_unaligned_le32(val, cur->buf); - cur->buf += sizeof(val); + cur->buf += sizeof(u32); } static void serblob(struct cursor *cur, void *from, size_t sz) @@ -315,12 +316,14 @@ static void serblob(struct cursor *cur, void *from, size_t sz) static void serialise_specific_config(struct nhlt_specific_config *cfg, struct cursor *cur) { + log_debug("%zx\n", cur->buf - cur->start); ser32(cur, cfg->size); serblob(cur, cfg->capabilities, cfg->size); } static void serialise_waveform(struct nhlt_waveform *wave, struct cursor *cur) { + log_debug("%zx\n", cur->buf - cur->start); ser16(cur, wave->tag); ser16(cur, wave->num_channels); ser32(cur, wave->samples_per_second); @@ -338,6 +341,7 @@ static void serialise_waveform(struct nhlt_waveform *wave, struct cursor *cur) static void serialise_format(struct nhlt_format *fmt, struct cursor *cur) { + log_debug("%zx\n", cur->buf - cur->start); serialise_waveform(&fmt->waveform, cur); serialise_specific_config(&fmt->config, cur); } @@ -346,6 +350,7 @@ static void serialise_endpoint(struct nhlt_endpoint *endp, struct cursor *cur) { int i; + log_debug("%zx\n", cur->buf - cur->start); ser32(cur, endp->length); ser8(cur, endp->link_type); ser8(cur, endp->instance_id); @@ -405,10 +410,12 @@ int nhlt_serialise_oem_overrides(struct acpi_ctx *ctx, struct nhlt *nhlt, header->oem_revision = oem_revision; cur.buf = (void *)(header + 1); + cur.start = (void *)header; nhlt_serialise_endpoints(nhlt, &cur); header->checksum = table_compute_checksum(header, sz); nhlt_free_resources(nhlt); + assert(cur.buf - cur.start == sz); ret = acpi_add_table(ctx, ctx->current); if (ret) From 8bcfb7917a61ef8230d85b6efc5a272fd20637ff Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:27 -0700 Subject: [PATCH 17/50] x86: nhlt: Fix a few bugs in the table generation At present these tables do not have the correct header, and there is an occasional incorrect value due to uninited data. Fix these bugs. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_nhlt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/acpi_nhlt.c b/arch/x86/lib/acpi_nhlt.c index 1c1ea27c8f..0e8e669c7d 100644 --- a/arch/x86/lib/acpi_nhlt.c +++ b/arch/x86/lib/acpi_nhlt.c @@ -68,6 +68,7 @@ struct nhlt_endpoint *nhlt_add_endpoint(struct nhlt *nhlt, int link_type, endp->device_type = device_type; endp->direction = dir; endp->virtual_bus_id = DEFAULT_VIRTUAL_BUS_ID; + endp->num_formats = 0; nhlt->num_endpoints++; @@ -395,7 +396,7 @@ int nhlt_serialise_oem_overrides(struct acpi_ctx *ctx, struct nhlt *nhlt, /* Create header */ header = (void *)ctx->current; memset(header, '\0', sizeof(struct acpi_table_header)); - acpi_fill_header(header, "NHLT"); + memcpy(header->signature, "NHLT", 4); header->length = sz; header->revision = acpi_get_table_revision(ACPITAB_NHLT); @@ -408,6 +409,7 @@ int nhlt_serialise_oem_overrides(struct acpi_ctx *ctx, struct nhlt *nhlt, memcpy(header->oem_table_id, oem_table_id, oem_table_id_len); } header->oem_revision = oem_revision; + memcpy(header->aslc_id, ASLC_ID, 4); cur.buf = (void *)(header + 1); cur.start = (void *)header; From a0ed800376b0db57428f9bf6401db36789ff1aa6 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:28 -0700 Subject: [PATCH 18/50] x86: Show the interrupt pointer with 'irqinfo' It is useful for this command to show the address of the interrupt table. Add support for this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/i386/interrupt.c | 14 +++++++------- arch/x86/include/asm/interrupt.h | 17 +++++++++++++++++ arch/x86/lib/interrupts.c | 3 +++ 3 files changed, 27 insertions(+), 7 deletions(-) diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c index c0c4bc95fd..d85f84b29a 100644 --- a/arch/x86/cpu/i386/interrupt.c +++ b/arch/x86/cpu/i386/interrupt.c @@ -180,16 +180,11 @@ struct idt_entry { u16 base_high; } __packed; -struct desc_ptr { - unsigned short size; - unsigned long address; -} __packed; - struct idt_entry idt[256] __aligned(16); -struct desc_ptr idt_ptr; +struct idt_ptr idt_ptr; -static inline void load_idt(const struct desc_ptr *dtr) +static inline void load_idt(const struct idt_ptr *dtr) { asm volatile("cs lidt %0" : : "m" (*dtr)); } @@ -232,6 +227,11 @@ int cpu_init_interrupts(void) return 0; } +void interrupt_read_idt(struct idt_ptr *ptr) +{ + asm volatile("sidt %0" : : "m" (*ptr)); +} + void *x86_get_idt(void) { return &idt_ptr; diff --git a/arch/x86/include/asm/interrupt.h b/arch/x86/include/asm/interrupt.h index fdeb857113..e23fb2c8e7 100644 --- a/arch/x86/include/asm/interrupt.h +++ b/arch/x86/include/asm/interrupt.h @@ -38,6 +38,16 @@ enum x86_exception { EXC_VE }; +/** + * struct idt_ptr - Holds the IDT (Interrupt Descriptor Table) + * + * @size: Size of IDT in bytes + */ +struct idt_ptr { + unsigned short size; + unsigned long address; +} __packed; + /* arch/x86/cpu/interrupts.c */ void set_vector(u8 intnum, void *routine); @@ -61,4 +71,11 @@ void configure_irq_trigger(int int_num, bool is_level_triggered); void *x86_get_idt(void); +/** + * interrupt_read_idt() - Read the IDT + * + * @ptr: Place to put IDT contents + */ +void interrupt_read_idt(struct idt_ptr *ptr); + #endif diff --git a/arch/x86/lib/interrupts.c b/arch/x86/lib/interrupts.c index a81e429110..ff52959ed2 100644 --- a/arch/x86/lib/interrupts.c +++ b/arch/x86/lib/interrupts.c @@ -131,8 +131,11 @@ void do_irq(int hw_irq) int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { #if !CONFIG_IS_ENABLED(X86_64) + struct idt_ptr ptr; int irq; + interrupt_read_idt(&ptr); + printf("IDT at %lx, size %x\n", ptr.address, ptr.size); printf("Spurious IRQ: %u, last unknown IRQ: %d\n", spurious_irq_cnt, spurious_irq); From dd30c5bb574aba55e99284dbdfe0d6033bf44d7f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:29 -0700 Subject: [PATCH 19/50] x86: sound: Correct error handling A few functions have changed to return pin numbers or I2C addresses. The error checking for some of the callers is therefore wrong. Fix them. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/sound/da7219.c | 4 ++-- drivers/sound/max98357a.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/sound/da7219.c b/drivers/sound/da7219.c index 6bc1ad0036..8d674bcb4f 100644 --- a/drivers/sound/da7219.c +++ b/drivers/sound/da7219.c @@ -54,13 +54,13 @@ static int da7219_acpi_fill_ssdt(const struct udevice *dev, acpigen_write_name(ctx, "_CRS"); acpigen_write_resourcetemplate_header(ctx); ret = acpi_device_write_i2c_dev(ctx, dev); - if (ret) + if (ret < 0) return log_msg_ret("i2c", ret); /* Use either Interrupt() or GpioInt() */ ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev, "req-gpios"); - if (ret) + if (ret < 0) return log_msg_ret("irq_gpio", ret); acpigen_write_resourcetemplate_footer(ctx); diff --git a/drivers/sound/max98357a.c b/drivers/sound/max98357a.c index 827262d235..b3d27a3616 100644 --- a/drivers/sound/max98357a.c +++ b/drivers/sound/max98357a.c @@ -69,7 +69,7 @@ static int max98357a_acpi_fill_ssdt(const struct udevice *dev, acpigen_write_name(ctx, "_CRS"); acpigen_write_resourcetemplate_header(ctx); ret = acpi_device_write_gpio_desc(ctx, &priv->sdmode_gpio); - if (ret) + if (ret < 0) return log_msg_ret("gpio", ret); acpigen_write_resourcetemplate_footer(ctx); From be1cee11b26880c385d9ce1d84792403a59f8855 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:30 -0700 Subject: [PATCH 20/50] acpi: Correct reset handling in acpi_device_add_power_res() If there is no reset line, this still emits ACPI code for the reset GPIO. Fix it by updating the check. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- lib/acpi/acpi_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/acpi/acpi_device.c b/lib/acpi/acpi_device.c index 95dfac583f..c3439a5988 100644 --- a/lib/acpi/acpi_device.c +++ b/lib/acpi/acpi_device.c @@ -422,7 +422,7 @@ int acpi_device_add_power_res(struct acpi_ctx *ctx, u32 tx_state_val, /* Method (_ON, 0, Serialized) */ acpigen_write_method_serialized(ctx, "_ON", 0); - if (reset_gpio) { + if (has_reset) { ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read, dw0_write, &reset, true); if (ret) From 2de4744dae572b6ba9c1c3e3a40b377e53994630 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:31 -0700 Subject: [PATCH 21/50] x86: acpi: Allow the SSDT to be empty If there is nothing in the SSDT we should not include it in the tables. Update the implementation to check this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_table.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index f0f342d893..c5c5c6e679 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -470,8 +470,9 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) header->checksum = table_compute_checksum((void *)spcr, header->length); } -void acpi_create_ssdt(struct acpi_ctx *ctx, struct acpi_table_header *ssdt, - const char *oem_table_id) +static int acpi_create_ssdt(struct acpi_ctx *ctx, + struct acpi_table_header *ssdt, + const char *oem_table_id) { memset((void *)ssdt, '\0', sizeof(struct acpi_table_header)); @@ -484,9 +485,19 @@ void acpi_create_ssdt(struct acpi_ctx *ctx, struct acpi_table_header *ssdt, acpi_fill_ssdt(ctx); - /* (Re)calculate length and checksum. */ + /* (Re)calculate length and checksum */ ssdt->length = ctx->current - (void *)ssdt; ssdt->checksum = table_compute_checksum((void *)ssdt, ssdt->length); + log_debug("SSDT at %p, length %x\n", ssdt, ssdt->length); + + /* Drop the table if it is empty */ + if (ssdt->length == sizeof(struct acpi_table_header)) { + ctx->current = ssdt; + return -ENOENT; + } + acpi_align(ctx); + + return 0; } /* @@ -596,11 +607,8 @@ ulong write_acpi_tables(ulong start_addr) debug("ACPI: * SSDT\n"); ssdt = (struct acpi_table_header *)ctx->current; - acpi_create_ssdt(ctx, ssdt, OEM_TABLE_ID); - if (ssdt->length > sizeof(struct acpi_table_header)) { - acpi_inc_align(ctx, ssdt->length); + if (!acpi_create_ssdt(ctx, ssdt, OEM_TABLE_ID)) acpi_add_table(ctx, ssdt); - } debug("ACPI: * MCFG\n"); mcfg = ctx->current; From 01e3c9d2ecbb532ab98da46ceebe8507b6bceec8 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:32 -0700 Subject: [PATCH 22/50] x86: acpi: Put the generated code first in DSDT The current implementation for DSDT tables is not correct for the case where there is generated code, as the length ends up being incorrect. Also, we want the generated code to go first in the table. Rewrite this piece to correct these problems. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_table.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index c5c5c6e679..423df5cbf9 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -505,6 +505,7 @@ static int acpi_create_ssdt(struct acpi_ctx *ctx, */ ulong write_acpi_tables(ulong start_addr) { + const int thl = sizeof(struct acpi_table_header); struct acpi_ctx *ctx; struct acpi_facs *facs; struct acpi_table_header *dsdt; @@ -516,6 +517,7 @@ ulong write_acpi_tables(ulong start_addr) struct acpi_csrt *csrt; struct acpi_spcr *spcr; void *start; + int aml_len; ulong addr; int ret; int i; @@ -541,21 +543,28 @@ ulong write_acpi_tables(ulong start_addr) dsdt = ctx->current; /* Put the table header first */ - memcpy(dsdt, &AmlCode, sizeof(struct acpi_table_header)); - acpi_inc(ctx, sizeof(struct acpi_table_header)); + memcpy(dsdt, &AmlCode, thl); + acpi_inc(ctx, thl); + log_debug("DSDT starts at %p, hdr ends at %p\n", dsdt, ctx->current); /* If the table is not empty, allow devices to inject things */ - if (dsdt->length >= sizeof(struct acpi_table_header)) + aml_len = dsdt->length - thl; + if (aml_len) { + void *base = ctx->current; + acpi_inject_dsdt(ctx); + log_debug("Added %x bytes from inject_dsdt, now at %p\n", + ctx->current - base, ctx->current); + log_debug("Copy AML code size %x to %p\n", aml_len, + ctx->current); + memcpy(ctx->current, AmlCode + thl, aml_len); + acpi_inc(ctx, aml_len); + } - /* Copy in the AML code itself if any (after the header) */ - memcpy(ctx->current, - (char *)&AmlCode + sizeof(struct acpi_table_header), - dsdt->length - sizeof(struct acpi_table_header)); - - acpi_inc(ctx, dsdt->length - sizeof(struct acpi_table_header)); dsdt->length = ctx->current - (void *)dsdt; acpi_align(ctx); + log_debug("Updated DSDT length to %x, total %x\n", dsdt->length, + ctx->current - (void *)dsdt); if (!IS_ENABLED(CONFIG_ACPI_GNVS_EXTERNAL)) { /* Pack GNVS into the ACPI table area */ From 18434aec1b69d8490cb23ef35b2f39cf1784d1d0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:33 -0700 Subject: [PATCH 23/50] acpi: Don't reset the tables with every new generation At present if SSDT and DSDT code is created, only the latter is retained for examination by the 'acpi items' command. Fix this by only resetting the list when explicitly requested. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_table.c | 1 + drivers/core/acpi.c | 10 ++++++---- include/dm/acpi.h | 9 +++++++++ test/dm/acpi.c | 4 ++++ 4 files changed, 20 insertions(+), 4 deletions(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 423df5cbf9..66cff822dc 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -531,6 +531,7 @@ ulong write_acpi_tables(ulong start_addr) debug("ACPI: Writing ACPI tables at %lx\n", start_addr); + acpi_reset_items(); acpi_setup_base_tables(ctx, start); debug("ACPI: * FACS\n"); diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c index 7fe93992b5..63a791f335 100644 --- a/drivers/core/acpi.c +++ b/drivers/core/acpi.c @@ -268,8 +268,7 @@ int acpi_recurse_method(struct acpi_ctx *ctx, struct udevice *parent, if (func) { void *start = ctx->current; - log_debug("\n"); - log_debug("- %s %p\n", parent->name, func); + log_debug("- method %d, %s %p\n", method, parent->name, func); ret = device_ofdata_to_platdata(parent); if (ret) return log_msg_ret("ofdata", ret); @@ -299,7 +298,6 @@ int acpi_fill_ssdt(struct acpi_ctx *ctx) int ret; log_debug("Writing SSDT tables\n"); - item_count = 0; ret = acpi_recurse_method(ctx, dm_root(), METHOD_FILL_SSDT, TYPE_SSDT); log_debug("Writing SSDT finished, err=%d\n", ret); ret = sort_acpi_item_type(ctx, start, TYPE_SSDT); @@ -315,7 +313,6 @@ int acpi_inject_dsdt(struct acpi_ctx *ctx) int ret; log_debug("Writing DSDT tables\n"); - item_count = 0; ret = acpi_recurse_method(ctx, dm_root(), METHOD_INJECT_DSDT, TYPE_DSDT); log_debug("Writing DSDT finished, err=%d\n", ret); @@ -326,6 +323,11 @@ int acpi_inject_dsdt(struct acpi_ctx *ctx) return ret; } +void acpi_reset_items(void) +{ + item_count = 0; +} + int acpi_write_dev_tables(struct acpi_ctx *ctx) { int ret; diff --git a/include/dm/acpi.h b/include/dm/acpi.h index e8b0336f6d..e6951b6a25 100644 --- a/include/dm/acpi.h +++ b/include/dm/acpi.h @@ -226,6 +226,15 @@ void acpi_dump_items(enum acpi_dump_option option); */ int acpi_get_path(const struct udevice *dev, char *out_path, int maxlen); +/** + * acpi_reset_items() - Reset the list of ACPI items to empty + * + * This list keeps track of DSDT and SSDT items that are generated + * programmatically. The 'acpi items' command shows the list. Use this function + * to empty the list, before writing new items. + */ +void acpi_reset_items(void); + #endif /* __ACPI__ */ #endif diff --git a/test/dm/acpi.c b/test/dm/acpi.c index 1f252a8d45..f5eddac10d 100644 --- a/test/dm/acpi.c +++ b/test/dm/acpi.c @@ -477,6 +477,7 @@ static int dm_test_acpi_fill_ssdt(struct unit_test_state *uts) buf = malloc(BUF_SIZE); ut_assertnonnull(buf); + acpi_reset_items(); ctx.current = buf; buf[4] = 'z'; /* sentinel */ ut_assertok(acpi_fill_ssdt(&ctx)); @@ -507,6 +508,7 @@ static int dm_test_acpi_inject_dsdt(struct unit_test_state *uts) buf = malloc(BUF_SIZE); ut_assertnonnull(buf); + acpi_reset_items(); ctx.current = buf; buf[4] = 'z'; /* sentinel */ ut_assertok(acpi_inject_dsdt(&ctx)); @@ -537,6 +539,7 @@ static int dm_test_acpi_cmd_items(struct unit_test_state *uts) buf = malloc(BUF_SIZE); ut_assertnonnull(buf); + acpi_reset_items(); ctx.current = buf; ut_assertok(acpi_fill_ssdt(&ctx)); console_record_reset(); @@ -545,6 +548,7 @@ static int dm_test_acpi_cmd_items(struct unit_test_state *uts) ut_assert_nextline("dev 'acpi-test2', type 1, size 2"); ut_assert_console_end(); + acpi_reset_items(); ctx.current = buf; ut_assertok(acpi_inject_dsdt(&ctx)); console_record_reset(); From 08059c9c02b1e87add0f2409d15ab5cdc745b6fd Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:34 -0700 Subject: [PATCH 24/50] x86: Define the Chrome OS GNVS region It is not possible to boot Chrome OS properly without passing some basic information from U-Boot. This applies even if verified boot is not being used. Add a structure definition for this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/include/asm/intel_gnvs.h | 51 ++++++++++++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/intel_gnvs.h b/arch/x86/include/asm/intel_gnvs.h index c1e9d65779..632307427c 100644 --- a/arch/x86/include/asm/intel_gnvs.h +++ b/arch/x86/include/asm/intel_gnvs.h @@ -9,6 +9,55 @@ #ifndef _INTEL_GNVS_H_ #define _INTEL_GNVS_H_ +/* + * The chromeos_acpi portion of ACPI GNVS is assumed to live from offset + * 0x100 - 0x1000. When defining acpi_global_nvs, use check_member + * to ensure that it is properly aligned: + * + * check_member(acpi_global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); + */ +#define GNVS_CHROMEOS_ACPI_OFFSET 0x100 + +enum { + CHSW_RECOVERY_X86 = BIT(1), + CHSW_RECOVERY_EC = BIT(2), + CHSW_DEVELOPER_SWITCH = BIT(5), + CHSW_FIRMWARE_WP = BIT(9), +}; + +enum { + FIRMWARE_TYPE_AUTO_DETECT = -1, + FIRMWARE_TYPE_RECOVERY = 0, + FIRMWARE_TYPE_NORMAL = 1, + FIRMWARE_TYPE_DEVELOPER = 2, + FIRMWARE_TYPE_NETBOOT = 3, + FIRMWARE_TYPE_LEGACY = 4, +}; + +struct __packed chromeos_acpi_gnvs { + /* ChromeOS-specific */ + u32 boot_reason; /* 00 boot reason */ + u32 active_main_fw; /* 04 (0=recovery, 1=A, 2=B) */ + u32 activeec_fw; /* 08 (0=RO, 1=RW) */ + u16 switches; /* 0c CHSW */ + u8 vbt4[256]; /* 0e HWID */ + u8 vbt5[64]; /* 10e FWID */ + u8 vbt6[64]; /* 14e FRID - 275 */ + u32 main_fw_type; /* 18e (2 = developer mode) */ + u32 vbt8; /* 192 recovery reason */ + u32 vbt9; /* 196 fmap base address */ + u8 vdat[3072]; /* 19a VDAT space filled by verified boot */ + u32 vbt10; /* d9a smbios bios version */ + u32 mehh[8]; /* d9e management engine hash */ + u32 ramoops_base; /* dbe ramoops base address */ + u32 ramoops_len; /* dc2 ramoops length */ + u32 vpd_ro_base; /* dc6 pointer to RO_VPD */ + u32 vpd_ro_size; /* dca size of RO_VPD */ + u32 vpd_rw_base; /* dce pointer to RW_VPD */ + u32 vpd_rw_size; /* dd2 size of RW_VPD */ + u8 pad[298]; /* dd6-eff */ +}; + struct __packed acpi_global_nvs { /* Miscellaneous */ u8 pcnt; /* 0x00 - Processor Count */ @@ -31,7 +80,7 @@ struct __packed acpi_global_nvs { u8 unused1[0x100 - 0x3d]; /* Pad out to 256 bytes */ #ifdef CONFIG_CHROMEOS /* ChromeOS-specific (0x100 - 0xfff) */ - struct chromeos_acpi chromeos; + struct chromeos_acpi_gnvs chromeos; #else u8 unused2[0x1000 - 0x100]; /* Pad out to 4096 bytes */ #endif From 96d0aa91430b885eed2a01f0b9edc0107687ab06 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:35 -0700 Subject: [PATCH 25/50] x86: Use CONFIG_CHROMEOS_VBOOT for verified boot At present CONFIG_CHROMEOS is used to determine whether verified boot is in use. The code to implement that is not in U-Boot mainline. However, it is useful to be able to boot a Chromebook in developer mode in U-Boot mainline without needing the verified boot code. To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot should be used, and CONFIG_CHROMEOS to indicate that the board supports Chrome OS. That allows us to define CONFIG_CHROMEOS on coral. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/apollolake/acpi.c | 3 ++- arch/x86/dts/chromebook_coral.dts | 2 +- arch/x86/dts/chromebook_samus.dts | 2 +- arch/x86/include/asm/intel_gnvs.h | 3 --- arch/x86/lib/tpl.c | 2 +- common/Kconfig.boot | 17 +++++++++++++++++ configs/chromebook_coral_defconfig | 1 + 7 files changed, 23 insertions(+), 7 deletions(-) diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c index 69b544f0d9..5af8a181b1 100644 --- a/arch/x86/cpu/apollolake/acpi.c +++ b/arch/x86/cpu/apollolake/acpi.c @@ -75,7 +75,8 @@ int acpi_create_gnvs(struct acpi_global_nvs *gnvs) /* TODO(sjg@chromium.org): Add the console log to gnvs->cbmc */ -#ifdef CONFIG_CHROMEOS +/* Disable this code until a later patch */ +#if 0 /* Initialise Verified Boot data */ chromeos_init_acpi(&gnvs->chromeos); gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 92f70b13dd..43f4b33da1 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -9,7 +9,7 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -#ifdef CONFIG_CHROMEOS +#ifdef CONFIG_CHROMEOS_VBOOT #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" #include "flashmap-16mb-rw.dtsi" diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index 772ea5c91b..d8e04a6698 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -9,7 +9,7 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -#ifdef CONFIG_CHROMEOS +#ifdef CONFIG_CHROMEOS_VBOOT #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" #include "flashmap-8mb-rw.dtsi" diff --git a/arch/x86/include/asm/intel_gnvs.h b/arch/x86/include/asm/intel_gnvs.h index 632307427c..7f9f101371 100644 --- a/arch/x86/include/asm/intel_gnvs.h +++ b/arch/x86/include/asm/intel_gnvs.h @@ -85,9 +85,6 @@ struct __packed acpi_global_nvs { u8 unused2[0x1000 - 0x100]; /* Pad out to 4096 bytes */ #endif }; - -#ifdef CONFIG_CHROMEOS check_member(acpi_global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); -#endif #endif /* _INTEL_GNVS_H_ */ diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 6f7eb43a17..15b0212d19 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -75,7 +75,7 @@ void board_init_f_r(void) u32 spl_boot_device(void) { - return IS_ENABLED(CONFIG_CHROMEOS) ? BOOT_DEVICE_CROS_VBOOT : + return IS_ENABLED(CONFIG_CHROMEOS_VBOOT) ? BOOT_DEVICE_CROS_VBOOT : BOOT_DEVICE_SPI_MMAP; } diff --git a/common/Kconfig.boot b/common/Kconfig.boot index 522f5f3d6a..3f6d9c1a25 100644 --- a/common/Kconfig.boot +++ b/common/Kconfig.boot @@ -343,6 +343,23 @@ config ARCH_FIXUP_FDT_MEMORY used for booting OS with different memory setup where the part of the memory location should be used for different purpose. +config CHROMEOS + bool "Support booting Chrome OS" + help + Chrome OS requires U-Boot to set up a table indicating the boot mode + (e.g. Developer mode) and a few other things. Enable this if you are + booting on a Chromebook to avoid getting an error about an invalid + firmware ID. + +config CHROMEOS_VBOOT + bool "Support Chrome OS verified boot" + help + This is intended to enable the full Chrome OS verified boot support + in U-Boot. It is not actually implemented in the U-Boot source code + at present, so this option is always set to 'n'. It allows + distinguishing between booting Chrome OS in a basic way (developer + mode) and a full boot. + endmenu # Boot images menu "Boot timing" diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 0ec95af75e..827974f7fc 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -21,6 +21,7 @@ CONFIG_INTEL_CAR_CQOS=y CONFIG_X86_OFFSET_U_BOOT=0xffd00000 CONFIG_X86_OFFSET_SPL=0xffe80000 CONFIG_INTEL_GENERIC_WIFI=y +CONFIG_CHROMEOS=y CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y CONFIG_TPL_BOOTSTAGE=y From 9910fc183a165db9d836877cd6d9c07e8ce71338 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:36 -0700 Subject: [PATCH 26/50] x86: Set up Chrome OS to boot into developer mode Set up a few fields necessarily to make Chrome OS boot without showing a firmware error. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/apollolake/acpi.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c index 5af8a181b1..fd21c0b496 100644 --- a/arch/x86/cpu/apollolake/acpi.c +++ b/arch/x86/cpu/apollolake/acpi.c @@ -65,6 +65,21 @@ int arch_write_sci_irq_select(uint scis) return 0; } +/** + * chromeos_init_acpi() - Initialise basic data to boot Chrome OS + * + * This tells Chrome OS to boot in developer mode + * + * @cros: Structure to initialise + */ +static void chromeos_init_acpi(struct chromeos_acpi_gnvs *cros) +{ + cros->active_main_fw = 1; + cros->active_main_fw = 1; /* A */ + cros->switches = CHSW_DEVELOPER_SWITCH; + cros->main_fw_type = 2; /* Developer */ +} + int acpi_create_gnvs(struct acpi_global_nvs *gnvs) { struct udevice *cpu; @@ -75,12 +90,9 @@ int acpi_create_gnvs(struct acpi_global_nvs *gnvs) /* TODO(sjg@chromium.org): Add the console log to gnvs->cbmc */ -/* Disable this code until a later patch */ -#if 0 - /* Initialise Verified Boot data */ - chromeos_init_acpi(&gnvs->chromeos); - gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; -#endif + if (IS_ENABLED(CONFIG_CHROMEOS)) + chromeos_init_acpi(&gnvs->chromeos); + /* Set unknown wake source */ gnvs->pm1i = ~0ULL; @@ -93,6 +105,8 @@ int acpi_create_gnvs(struct acpi_global_nvs *gnvs) gnvs->pcnt = ret; } + gnvs->dpte = 1; + return 0; } From e0028ab75a8da96b85b210adda323ca2bf3da94f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:37 -0700 Subject: [PATCH 27/50] x86: Boot coral into Chrome OS by default Add a script to boot Chrome OS from the internal MMC. This involved adding a few commands and options. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- configs/chromebook_coral_defconfig | 10 +++++++--- include/configs/chromebook_coral.h | 9 ++++++++- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 827974f7fc..e5ad79dcf7 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -29,8 +29,10 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10 CONFIG_BOOTSTAGE_STASH=y CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS2,115200n8 cros_legacy loglevel=9 init=/sbin/init oops=panic panic=-1 root=PARTUUID=35c775e7-3735-d745-93e5-d9e0238f7ed0/PARTNROFF=1 rootwait rw noinitrd vt.global_cursor_default=0 add_efi_memmap boot=local noresume noswap i915.modeset=1 nmi_watchdog=panic,lapic disablevmx=off" +CONFIG_BOOTARGS="" +CONFIG_BOOTARGS_SUBST=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_LOGF_FUNC=y CONFIG_SPL_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y @@ -55,11 +57,11 @@ CONFIG_CMD_READ=y CONFIG_CMD_SATA=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_SOUND=y CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_TPM=y +CONFIG_CMD_CBFS=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -72,7 +74,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ENV_OVERWRITE=y -# CONFIG_NET is not set CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y @@ -106,10 +107,13 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO_COPY=y +CONFIG_FS_CBFS=y CONFIG_SPL_FS_CBFS=y +CONFIG_FAT_WRITE=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_TPL_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y # CONFIG_GZIP is not set +CONFIG_BLOBLIST_TABLES=y # CONFIG_EFI_LOADER is not set diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h index a63c3c9eea..d4d32758e9 100644 --- a/include/configs/chromebook_coral.h +++ b/include/configs/chromebook_coral.h @@ -11,7 +11,14 @@ #define __CONFIG_H #define CONFIG_BOOTCOMMAND \ - "fatload mmc 1:c 1000000 syslinux/vmlinuz.A; zboot 1000000" + "tpm init; tpm startup TPM2_SU_CLEAR; " \ + "read mmc 2:2 100000 0 80; setexpr loader *001004f0; " \ + "setexpr size *00100518; setexpr blocks $size / 200; " \ + "read mmc 2:2 100000 80 $blocks; setexpr setup $loader - 1000; " \ + "setexpr cmdline $loader - 2000; " \ + "part uuid mmc 2:2 uuid; setenv bootargs_U $uuid; " \ + "zboot start 100000 0 0 0 $setup $cmdline; " \ + "zboot load; zboot setup; zboot dump; zboot go" #include #include From d0147fe8a27aaf21eb07d15088cd417853e76965 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:38 -0700 Subject: [PATCH 28/50] x86: fsp: Convert fsp_dram to use log_debug() Use log_debug() instead of debug() in this file, to enable the extra features. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/fsp2/fsp_dram.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c index c9f6402e6a..a95fdc46c1 100644 --- a/arch/x86/lib/fsp2/fsp_dram.c +++ b/arch/x86/lib/fsp2/fsp_dram.c @@ -4,6 +4,8 @@ * Written by Simon Glass */ +#define LOG_CATEGORY LOGC_ARCH + #include #include #include @@ -35,7 +37,7 @@ int dram_init(void) ret = fsp_memory_init(s3wake, IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH)); if (ret) { - debug("Memory init failed (err=%x)\n", ret); + log_debug("Memory init failed (err=%x)\n", ret); return ret; } @@ -60,7 +62,7 @@ int dram_init(void) struct spl_handoff *ho = gd->spl_handoff; if (!ho) { - debug("No SPL handoff found\n"); + log_debug("No SPL handoff found\n"); return -ESTRPIPE; } gd->ram_size = ho->ram_size; @@ -82,6 +84,8 @@ ulong board_get_usable_ram_top(ulong total_size) #if CONFIG_IS_ENABLED(HANDOFF) struct spl_handoff *ho = gd->spl_handoff; + log_debug("usable_ram_top = %lx\n", ho->arch.usable_ram_top); + return ho->arch.usable_ram_top; #endif From 1da448bb9fd281e5a0574aab838d9ef1f6b18575 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:39 -0700 Subject: [PATCH 29/50] x86: Silence some logging statements Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/apollolake/fsp_s.c | 8 ++++---- arch/x86/cpu/intel_common/intel_opregion.c | 2 +- arch/x86/cpu/intel_common/itss.c | 8 ++++---- arch/x86/lib/acpi_nhlt.c | 2 +- arch/x86/lib/fsp/fsp_graphics.c | 2 +- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c index 715ceab6ac..288188027a 100644 --- a/arch/x86/cpu/apollolake/fsp_s.c +++ b/arch/x86/cpu/apollolake/fsp_s.c @@ -116,10 +116,10 @@ static int set_power_limits(struct udevice *dev) /* Program package power limits in RAPL MSR */ msr_write(MSR_PKG_POWER_LIMIT, limit); - log_info("RAPL PL1 %d.%dW\n", tdp / power_unit, - 100 * (tdp % power_unit) / power_unit); - log_info("RAPL PL2 %d.%dW\n", pl2_val / power_unit, - 100 * (pl2_val % power_unit) / power_unit); + log_debug("RAPL PL1 %d.%dW\n", tdp / power_unit, + 100 * (tdp % power_unit) / power_unit); + log_debug("RAPL PL2 %d.%dW\n", pl2_val / power_unit, + 100 * (pl2_val % power_unit) / power_unit); /* * Sett RAPL MMIO register for Power limits. RAPL driver is using MSR diff --git a/arch/x86/cpu/intel_common/intel_opregion.c b/arch/x86/cpu/intel_common/intel_opregion.c index c95ae04992..1eed21d8cd 100644 --- a/arch/x86/cpu/intel_common/intel_opregion.c +++ b/arch/x86/cpu/intel_common/intel_opregion.c @@ -42,7 +42,7 @@ static int locate_vbt(char **vbtp, int *sizep) return -EINVAL; } - log_info("Found a VBT of %u bytes\n", size); + log_debug("Found a VBT of %u bytes\n", size); *sizep = size; *vbtp = vbt_data; diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index 53dd09d8f5..de17b93ed4 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -67,7 +67,7 @@ static int snapshot_polarities(struct udevice *dev) reg_start = start / IRQS_PER_IPC; reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC); - log_info("ITSS IRQ Polarities snapshot %p\n", priv->irq_snapshot); + log_debug("ITSS IRQ Polarities snapshot %p\n", priv->irq_snapshot); for (i = reg_start; i < reg_end; i++) { uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i; @@ -89,11 +89,11 @@ static void show_polarities(struct udevice *dev, const char *msg) { int i; - log_info("ITSS IRQ Polarities %s:\n", msg); + log_debug("ITSS IRQ Polarities %s:\n", msg); for (i = 0; i < NUM_IPC_REGS; i++) { uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i; - log_info("IPC%d: 0x%08x\n", i, pcr_read32(dev, reg)); + log_debug("IPC%d: 0x%08x\n", i, pcr_read32(dev, reg)); } } @@ -115,7 +115,7 @@ static int restore_polarities(struct udevice *dev) sizeof(priv->irq_snapshot)); show_polarities(dev, "Before"); - log_info("priv->irq_snapshot %p\n", priv->irq_snapshot); + log_debug("priv->irq_snapshot %p\n", priv->irq_snapshot); reg_start = start / IRQS_PER_IPC; reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC); diff --git a/arch/x86/lib/acpi_nhlt.c b/arch/x86/lib/acpi_nhlt.c index 0e8e669c7d..6c8cd83e12 100644 --- a/arch/x86/lib/acpi_nhlt.c +++ b/arch/x86/lib/acpi_nhlt.c @@ -390,7 +390,7 @@ int nhlt_serialise_oem_overrides(struct acpi_ctx *ctx, struct nhlt *nhlt, size_t oem_table_id_len; int ret; - log_info("ACPI: * NHLT\n"); + log_debug("ACPI: * NHLT\n"); sz = nhlt_current_size(nhlt); /* Create header */ diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index 858d7942fe..6534b6690b 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -139,7 +139,7 @@ static int fsp_video_acpi_write_tables(const struct udevice *dev, struct igd_opregion *opregion; int ret; - printf("ACPI: * IGD OpRegion\n"); + log_debug("ACPI: * IGD OpRegion\n"); opregion = (struct igd_opregion *)ctx->current; ret = intel_gma_init_igd_opregion((struct udevice *)dev, opregion); From 7f061e0d255d5cdfbd216960134ea66e474ae819 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:40 -0700 Subject: [PATCH 30/50] x86: acpi: Include the TPMv1 table only if needed This table is not needed if a v2 TPM is in use. Add a condition to avoid adding it when not needed. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_table.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 66cff822dc..9f0871c9f4 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -646,14 +646,17 @@ ulong write_acpi_tables(ulong start_addr) acpi_inc_align(ctx, madt->header.length); acpi_add_table(ctx, madt); - debug("ACPI: * TCPA\n"); - tcpa = (struct acpi_tcpa *)ctx->current; - ret = acpi_create_tcpa(tcpa); - if (ret) { - log_warning("Failed to create TCPA table (err=%d)\n", ret); - } else { - acpi_inc_align(ctx, tcpa->header.length); - acpi_add_table(ctx, tcpa); + if (IS_ENABLED(CONFIG_TPM_V1)) { + debug("ACPI: * TCPA\n"); + tcpa = (struct acpi_tcpa *)ctx->current; + ret = acpi_create_tcpa(tcpa); + if (ret) { + log_warning("Failed to create TCPA table (err=%d)\n", + ret); + } else { + acpi_inc_align(ctx, tcpa->header.length); + acpi_add_table(ctx, tcpa); + } } debug("ACPI: * CSRT\n"); From 98bf740e7f690951acf672486d57587e21237da8 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:41 -0700 Subject: [PATCH 31/50] x86: acpi: Don't show the UART address by default This is useful when using Linux's earlycon since the MMIO address must be provided on some platforms, e.g.: earlycon=uart8250,mmio32,0xddffc000,115200n8 However this is only for debugging, so don't show it by default. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/acpi_table.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 9f0871c9f4..4fd8dc8ad9 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -767,7 +767,7 @@ int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev, * 32-bits each. This is only for debugging so it is not a big deal. */ addr = dm_pci_read_bar32(dev, 0); - printf("UART addr %lx\n", (ulong)addr); + log_debug("UART addr %lx\n", (ulong)addr); memset(&address, '\0', sizeof(address)); address.space_id = ACPI_ADDRESS_SPACE_MEMORY; From dd27cd6dab40765797962df500bda8eab6e665f5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:42 -0700 Subject: [PATCH 32/50] x86: pinctrl: Silence the warning when a pin is not found This does not necessarily indicate a problem, since some pins are optional. Let the caller show an error if necessary. Reviewed-by: Bin Meng Signed-off-by: Simon Glass --- drivers/pinctrl/intel/pinctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/intel/pinctrl.c b/drivers/pinctrl/intel/pinctrl.c index ba21c9dcc2..e3d2464634 100644 --- a/drivers/pinctrl/intel/pinctrl.c +++ b/drivers/pinctrl/intel/pinctrl.c @@ -154,7 +154,7 @@ static int pinctrl_get_device(uint pad, struct udevice **devp) return 0; } } - printf("pad %d not found\n", pad); + log_debug("pad %d not found\n", pad); return -ENOTBLK; } From d46c0932a9d4b2fcd8064f4567436f5143526147 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:57:43 -0700 Subject: [PATCH 33/50] x86: fsp: Adjust calculations for MTRR range and DRAM top At present the top of available DRAM is the same as the top of the range of the low-memory MTRR. In fact, U-Boot is allowed to use memory up until the start of the FSP reserved memory. Use that value for low_end, since it makes more memory available. Keep the same calculation as before for mtrr_top, i.e. the top of reserved memory. A side-effect of this change is that the E820 tables have a single entry that extends from the bottom of the memory used by U-Boot to the bottom of the FSP reserved memory. This includes the bloblist, if ACPI tables are placed there. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/fsp/fsp_dram.c | 35 ++++++++++++++++++++++------------- 1 file changed, 22 insertions(+), 13 deletions(-) diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index a76497d4e0..3ffd40ce74 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -41,8 +41,10 @@ int fsp_scan_for_ram_size(void) int dram_init_banksize(void) { + efi_guid_t fsp = FSP_HOB_RESOURCE_OWNER_FSP_GUID; const struct hob_header *hdr; struct hob_res_desc *res_desc; + phys_addr_t mtrr_top; phys_addr_t low_end; uint bank; @@ -54,35 +56,42 @@ int dram_init_banksize(void) return 0; } - low_end = 0; + low_end = 0; /* top of low memory usable by U-Boot */ + mtrr_top = 0; /* top of low memory (even if reserved) */ for (bank = 1, hdr = gd->arch.hob_list; bank < CONFIG_NR_DRAM_BANKS && !end_of_hob(hdr); hdr = get_next_hob(hdr)) { if (hdr->type != HOB_TYPE_RES_DESC) continue; res_desc = (struct hob_res_desc *)hdr; + if (!guidcmp(&res_desc->owner, &fsp)) + low_end = res_desc->phys_start; if (res_desc->type != RES_SYS_MEM && res_desc->type != RES_MEM_RESERVED) continue; if (res_desc->phys_start < (1ULL << 32)) { - low_end = max(low_end, - res_desc->phys_start + res_desc->len); - continue; + mtrr_top = max(mtrr_top, + res_desc->phys_start + res_desc->len); + } else { + gd->bd->bi_dram[bank].start = res_desc->phys_start; + gd->bd->bi_dram[bank].size = res_desc->len; + mtrr_add_request(MTRR_TYPE_WRBACK, res_desc->phys_start, + res_desc->len); + log_debug("ram %llx %llx\n", + gd->bd->bi_dram[bank].start, + gd->bd->bi_dram[bank].size); } - - gd->bd->bi_dram[bank].start = res_desc->phys_start; - gd->bd->bi_dram[bank].size = res_desc->len; - mtrr_add_request(MTRR_TYPE_WRBACK, res_desc->phys_start, - res_desc->len); - log_debug("ram %llx %llx\n", gd->bd->bi_dram[bank].start, - gd->bd->bi_dram[bank].size); } /* Add the memory below 4GB */ gd->bd->bi_dram[0].start = 0; gd->bd->bi_dram[0].size = low_end; - mtrr_add_request(MTRR_TYPE_WRBACK, 0, low_end); + /* + * Set up an MTRR to the top of low, reserved memory. This is necessary + * for graphics to run at full speed in U-Boot. + */ + mtrr_add_request(MTRR_TYPE_WRBACK, 0, mtrr_top); return 0; } @@ -156,7 +165,7 @@ unsigned int install_e820_map(unsigned int max_entries, #if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB) int handoff_arch_save(struct spl_handoff *ho) { - ho->arch.usable_ram_top = fsp_get_usable_lowmem_top(gd->arch.hob_list); + ho->arch.usable_ram_top = gd->bd->bi_dram[0].size; ho->arch.hob_list = gd->arch.hob_list; return 0; From b73d61a5565c3ab9e207a288186049806ce13e1b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:59:13 -0700 Subject: [PATCH 34/50] x86: zimage: Add a little more logging Add logging for each part of the boot process, using a new Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Igor Opaniuk --- arch/x86/lib/zimage.c | 6 ++++++ common/log.c | 1 + include/log.h | 1 + 3 files changed, 8 insertions(+) diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index a00964cc8d..7418c9a5fe 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -12,10 +12,13 @@ * linux/Documentation/i386/boot.txt */ +#define LOG_CATEGORY LOGC_BOOT + #include #include #include #include +#include #include #include #include @@ -292,6 +295,7 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, struct setup_header *hdr = &setup_base->hdr; int bootproto = get_boot_protocol(hdr, false); + log_debug("Setup E820 entries\n"); setup_base->e820_entries = install_e820_map( ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map); @@ -317,6 +321,7 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, } if (cmd_line) { + log_debug("Setup cmdline\n"); if (bootproto >= 0x0202) { hdr->cmd_line_ptr = (uintptr_t)cmd_line; } else if (bootproto >= 0x0200) { @@ -340,6 +345,7 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) setup_base->acpi_rsdp_addr = acpi_get_rsdp_addr(); + log_debug("Setup devicetree\n"); setup_device_tree(hdr, (const void *)env_get_hex("fdtaddr", 0)); setup_video(&setup_base->screen_info); diff --git a/common/log.c b/common/log.c index 4b6f3fcd04..ce39918e04 100644 --- a/common/log.c +++ b/common/log.c @@ -26,6 +26,7 @@ static const char *const log_cat_name[] = { "bloblist", "devres", "acpi", + "boot", }; _Static_assert(ARRAY_SIZE(log_cat_name) == LOGC_COUNT - LOGC_NONE, diff --git a/include/log.h b/include/log.h index 4d0692f155..29f18a82dc 100644 --- a/include/log.h +++ b/include/log.h @@ -96,6 +96,7 @@ enum log_category_t { LOGC_DEVRES, /** @LOGC_ACPI: Advanced Configuration and Power Interface (ACPI) */ LOGC_ACPI, + LOGC_BOOT, /* Related to boot process / boot image processing */ /** @LOGC_COUNT: Number of log categories */ LOGC_COUNT, From 7c79eddbec32d8258df701d95d8b432f9835110b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:59:14 -0700 Subject: [PATCH 35/50] x86: zimage: Sanity-check the kernel version before printing it With Chrome OS the kernel setup block is stored in a separate place from the kernel, so it is not possible to access the kernel version string. At present, garbage is printed. Add a sanity check to avoid this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/lib/zimage.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 7418c9a5fe..d425ded596 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -31,6 +31,7 @@ #include #endif #include +#include #include /* @@ -175,11 +176,19 @@ static const char *get_kernel_version(struct boot_params *params, { struct setup_header *hdr = ¶ms->hdr; int bootproto; + const char *s, *end; bootproto = get_boot_protocol(hdr, false); if (bootproto < 0x0200 || hdr->setup_sects < 15) return NULL; + /* sanity-check the kernel version in case it is missing */ + for (s = kernel_base + hdr->kernel_version + 0x200, end = s + 0x100; *s; + s++) { + if (!isprint(*s)) + return NULL; + } + return kernel_base + hdr->kernel_version + 0x200; } From a40f890bdb01c54745274a939cd23942d92648ab Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 4 Nov 2020 09:59:15 -0700 Subject: [PATCH 36/50] x86: zimage: Quieten down the zimage boot process Much of the output is not very useful. The bootm command is quite a bit quieter. Convert some output to use log_debug(). Signed-off-by: Simon Glass Reviewed-by: Bin Meng Reviewed-by: Igor Opaniuk --- arch/x86/lib/zimage.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index d425ded596..50fb16d2da 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -212,13 +212,13 @@ struct boot_params *load_zimage(char *image, unsigned long kernel_size, /* determine size of setup */ if (0 == hdr->setup_sects) { - printf("Setup Sectors = 0 (defaulting to 4)\n"); + log_warning("Setup Sectors = 0 (defaulting to 4)\n"); setup_size = 5 * 512; } else { setup_size = (hdr->setup_sects + 1) * 512; } - printf("Setup Size = 0x%8.8lx\n", (ulong)setup_size); + log_debug("Setup Size = 0x%8.8lx\n", (ulong)setup_size); if (setup_size > SETUP_MAX_SIZE) printf("Error: Setup is too large (%d bytes)\n", setup_size); @@ -226,8 +226,8 @@ struct boot_params *load_zimage(char *image, unsigned long kernel_size, /* determine boot protocol version */ bootproto = get_boot_protocol(hdr, true); - printf("Using boot protocol version %x.%02x\n", - (bootproto & 0xff00) >> 8, bootproto & 0xff); + log_debug("Using boot protocol version %x.%02x\n", + (bootproto & 0xff00) >> 8, bootproto & 0xff); version = get_kernel_version(params, image); if (version) @@ -420,7 +420,8 @@ static int do_zboot_load(struct cmd_tbl *cmdtp, int flag, int argc, struct boot_params *from = (struct boot_params *)state.base_ptr; base_ptr = (struct boot_params *)DEFAULT_SETUP_BASE; - printf("Building boot_params at 0x%8.8lx\n", (ulong)base_ptr); + log_debug("Building boot_params at 0x%8.8lx\n", + (ulong)base_ptr); memset(base_ptr, '\0', sizeof(*base_ptr)); base_ptr->hdr = from->hdr; } else { From 3a8ee3df836614b68881f5b84d3197305ee1b08e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:05 -0700 Subject: [PATCH 37/50] board: Rename uclass to sysinfo This uclass is intended to provide a way to obtain information about a U-Boot board. But the concept of a U-Boot 'board' is the whole system, not just one circuit board, meaning that 'board' is something of a misnomer for this uclass. In addition, the name 'board' is a bit overused in U-Boot and we want to use the same uclass to provide SMBIOS information. The obvious name is 'system' but that is so vague as to be meaningless. Use 'sysinfo' instead, since this uclass is aimed at providing information on the system. Rename everything accordingly. Note: Due to the patch delta caused by the symbol renames, this patch shows some renamed files as being deleted in one place and created in another. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi | 2 +- arch/sandbox/dts/test.dts | 8 +- board/gdsys/common/cmd_ioloop.c | 12 +-- board/gdsys/mpc8308/gazerbeam.c | 47 ++++++----- board/google/chromebook_coral/coral.c | 2 +- common/spl/spl_fit.c | 15 ++-- configs/chromebook_coral_defconfig | 2 +- configs/gazerbeam_defconfig | 4 +- configs/sandbox64_defconfig | 4 +- configs/sandbox_defconfig | 4 +- configs/sandbox_flattree_defconfig | 4 +- configs/sandbox_spl_defconfig | 4 +- .../gdsys,sysinfo_gazerbeam.txt} | 8 +- drivers/Kconfig | 4 +- drivers/Makefile | 2 +- drivers/board/board-uclass.c | 71 ---------------- drivers/{board => sysinfo}/Kconfig | 16 ++-- drivers/{board => sysinfo}/Makefile | 6 +- drivers/{board => sysinfo}/gazerbeam.c | 74 ++++++++--------- drivers/{board => sysinfo}/gazerbeam.h | 0 drivers/{board => sysinfo}/sandbox.c | 50 ++++++------ drivers/{board => sysinfo}/sandbox.h | 0 drivers/sysinfo/sysinfo-uclass.c | 71 ++++++++++++++++ drivers/timer/mpc83xx_timer.c | 10 +-- include/dm/uclass-id.h | 2 +- include/{board.h => sysinfo.h} | 80 +++++++++---------- test/dm/Makefile | 2 +- test/dm/board.c | 59 -------------- test/dm/sysinfo.c | 59 ++++++++++++++ 29 files changed, 314 insertions(+), 308 deletions(-) rename doc/device-tree-bindings/{board/gdsys,board_gazerbeam.txt => sysinfo/gdsys,sysinfo_gazerbeam.txt} (90%) delete mode 100644 drivers/board/board-uclass.c rename drivers/{board => sysinfo}/Kconfig (65%) rename drivers/{board => sysinfo}/Makefile (50%) rename drivers/{board => sysinfo}/gazerbeam.c (69%) rename drivers/{board => sysinfo}/gazerbeam.h (100%) rename drivers/{board => sysinfo}/sandbox.c (50%) rename drivers/{board => sysinfo}/sandbox.h (100%) create mode 100644 drivers/sysinfo/sysinfo-uclass.c rename include/{board.h => sysinfo.h} (65%) delete mode 100644 test/dm/board.c create mode 100644 test/dm/sysinfo.c diff --git a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi index 1c4977f20f..3439737fa3 100644 --- a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi +++ b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi @@ -32,7 +32,7 @@ }; board { - compatible = "gdsys,board_gazerbeam"; + compatible = "gdsys,sysinfo-gazerbeam"; csb = <&board_soc>; serdes = <&SERDES>; rxaui0 = <&RXAUI0_0>; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 70ccb4951a..f3b766271d 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -1103,10 +1103,6 @@ compatible = "sandbox,sandbox_osd"; }; - board { - compatible = "sandbox,board_sandbox"; - }; - sandbox_tee { compatible = "sandbox,tee"; }; @@ -1242,6 +1238,10 @@ reset-names = "valid", "no_mask", "out_of_range"; }; + sysinfo { + compatible = "sandbox,sysinfo-sandbox"; + }; + some_regmapped-bus { #address-cells = <0x1>; #size-cells = <0x1>; diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c index 3ea2bec8eb..658756d984 100644 --- a/board/gdsys/common/cmd_ioloop.c +++ b/board/gdsys/common/cmd_ioloop.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include "../../../drivers/misc/gdsys_soc.h" #include "../../../drivers/misc/gdsys_ioep.h" @@ -506,11 +506,11 @@ int do_ioloop(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) int do_iodev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { struct udevice *ioep = NULL; - struct udevice *board; + struct udevice *sysinfo; char name[8]; int ret; - if (board_get(&board)) + if (sysinfo_get(&sysinfo)) return CMD_RET_FAILURE; if (argc > 1) { @@ -518,7 +518,8 @@ int do_iodev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) snprintf(name, sizeof(name), "ioep%d", i); - ret = uclass_get_device_by_phandle(UCLASS_MISC, board, name, &ioep); + ret = uclass_get_device_by_phandle(UCLASS_MISC, sysinfo, name, + &ioep); if (ret || !ioep) { printf("Invalid IOEP %d\n", i); @@ -532,7 +533,8 @@ int do_iodev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) while (1) { snprintf(name, sizeof(name), "ioep%d", i); - ret = uclass_get_device_by_phandle(UCLASS_MISC, board, name, &ioep); + ret = uclass_get_device_by_phandle(UCLASS_MISC, sysinfo, + name, &ioep); if (ret || !ioep) break; diff --git a/board/gdsys/mpc8308/gazerbeam.c b/board/gdsys/mpc8308/gazerbeam.c index c317260251..0e7fa1e333 100644 --- a/board/gdsys/mpc8308/gazerbeam.c +++ b/board/gdsys/mpc8308/gazerbeam.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include @@ -15,11 +14,12 @@ #include #include #include +#include #include #include #include "../common/ihs_mdio.h" -#include "../../../drivers/board/gazerbeam.h" +#include "../../../drivers/sysinfo/gazerbeam.h" DECLARE_GLOBAL_DATA_PTR; @@ -43,22 +43,22 @@ static int get_tpm(struct udevice **devp) int board_early_init_r(void) { - struct udevice *board; + struct udevice *sysinfo; struct udevice *serdes; int mc = 0; int con = 0; - if (board_get(&board)) - puts("Could not find board information device.\n"); + if (sysinfo_get(&sysinfo)) + puts("Could not find sysinfo information device.\n"); /* Initialize serdes */ - uclass_get_device_by_phandle(UCLASS_MISC, board, "serdes", &serdes); + uclass_get_device_by_phandle(UCLASS_MISC, sysinfo, "serdes", &serdes); - if (board_detect(board)) + if (sysinfo_detect(sysinfo)) puts("Device information detection failed.\n"); - board_get_int(board, BOARD_MULTICHANNEL, &mc); - board_get_int(board, BOARD_VARIANT, &con); + sysinfo_get_int(sysinfo, BOARD_MULTICHANNEL, &mc); + sysinfo_get_int(sysinfo, BOARD_VARIANT, &con); if (mc == 2 || mc == 1) dev_disable_by_path("/immr@e0000000/i2c@3100/pca9698@22"); @@ -84,18 +84,18 @@ int board_early_init_r(void) return 0; } -int checkboard(void) +int checksysinfo(void) { - struct udevice *board; + struct udevice *sysinfo; char *s = env_get("serial#"); int mc = 0; int con = 0; - if (board_get(&board)) - puts("Could not find board information device.\n"); + if (sysinfo_get(&sysinfo)) + puts("Could not find sysinfo information device.\n"); - board_get_int(board, BOARD_MULTICHANNEL, &mc); - board_get_int(board, BOARD_VARIANT, &con); + sysinfo_get_int(sysinfo, BOARD_MULTICHANNEL, &mc); + sysinfo_get_int(sysinfo, BOARD_VARIANT, &con); puts("Board: Gazerbeam "); printf("%s ", mc == 4 ? "MC4" : mc == 2 ? "MC2" : "SC"); @@ -123,20 +123,22 @@ int last_stage_init(void) { int fpga_hw_rev = 0; int i; - struct udevice *board; + struct udevice *sysinfo; struct udevice *osd; struct video_osd_info osd_info; struct udevice *tpm; int ret; - if (board_get(&board)) - puts("Could not find board information device.\n"); + if (sysinfo_get(&sysinfo)) + puts("Could not find sysinfo information device.\n"); - if (board) { - int res = board_get_int(board, BOARD_HWVERSION, &fpga_hw_rev); + if (sysinfo) { + int res = sysinfo_get_int(sysinfo, BOARD_HWVERSION, + &fpga_hw_rev); if (res) - printf("Could not determind FPGA HW revision (res = %d)\n", res); + printf("Could not determind FPGA HW revision (res = %d)\n", + res); } env_set_ulong("fpga_hw_rev", fpga_hw_rev); @@ -154,7 +156,8 @@ int last_stage_init(void) snprintf(name, sizeof(name), "rxaui%d", i); /* Disable RXAUI polarity inversion */ - ret = uclass_get_device_by_phandle(UCLASS_MISC, board, name, &rxaui); + ret = uclass_get_device_by_phandle(UCLASS_MISC, sysinfo, + name, &rxaui); if (!ret) misc_set_enabled(rxaui, false); } diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c index f5ae48290f..b8b923c139 100644 --- a/board/google/chromebook_coral/coral.c +++ b/board/google/chromebook_coral/coral.c @@ -150,7 +150,7 @@ static const struct udevice_id coral_ids[] = { U_BOOT_DRIVER(coral_drv) = { .name = "coral", - .id = UCLASS_BOARD, + .id = UCLASS_SYSINFO, .of_match = coral_ids, ACPI_OPS_PTR(&coral_acpi_ops) }; diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index f5109e86d1..6418062b93 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -6,13 +6,13 @@ #include #include -#include #include #include #include #include #include #include +#include #include #include @@ -74,7 +74,7 @@ static int spl_fit_get_image_name(const void *fit, int images, const char *type, int index, const char **outname) { - struct udevice *board; + struct udevice *sysinfo; const char *name, *str; __maybe_unused int node; int conf_node; @@ -110,19 +110,20 @@ static int spl_fit_get_image_name(const void *fit, int images, } } - if (!found && !board_get(&board)) { + if (!found && CONFIG_IS_ENABLED(SYSINFO) && !sysinfo_get(&sysinfo)) { int rc; /* - * no string in the property for this index. Check if the board - * level code can supply one. + * no string in the property for this index. Check if the + * sysinfo-level code can supply one. */ - rc = board_get_fit_loadable(board, index - i - 1, type, &str); + rc = sysinfo_get_fit_loadable(sysinfo, index - i - 1, type, + &str); if (rc && rc != -ENOENT) return rc; if (!rc) { /* - * The board provided a name for a loadable. + * The sysinfo provided a name for a loadable. * Try to match it against the description properties * first. If no matching node is found, use it as a * node name. diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index e5ad79dcf7..d960793d9a 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -79,7 +79,6 @@ CONFIG_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_INTEL_ACPIGEN=y CONFIG_CPU=y -CONFIG_BOARD=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_MISC=y @@ -100,6 +99,7 @@ CONFIG_SOUND_MAX98357A=y CONFIG_SOUND_RT5677=y CONFIG_SPI=y CONFIG_ICH_SPI=y +CONFIG_SYSINFO=y CONFIG_TPL_SYSRESET=y # CONFIG_TPM_V1 is not set CONFIG_TPM2_CR50_I2C=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 36c2500bae..5765ef456b 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -157,8 +157,6 @@ CONFIG_CLK=y CONFIG_ICS8N3QV01=y CONFIG_CPU=y CONFIG_CPU_MPC83XX=y -CONFIG_BOARD=y -CONFIG_BOARD_GAZERBEAM=y CONFIG_DM_PCA953X=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y @@ -197,6 +195,8 @@ CONFIG_MPC83XX_SDRAM=y CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_GAZERBEAM=y CONFIG_SYSRESET=y CONFIG_SYSRESET_MPC83XX=y CONFIG_TIMER=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 23a47d158c..dc993cd13a 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -109,8 +109,6 @@ CONFIG_CPU=y CONFIG_DM_DEMO=y CONFIG_DM_DEMO_SIMPLE=y CONFIG_DM_DEMO_SHAPE=y -CONFIG_BOARD=y -CONFIG_BOARD_SANDBOX=y CONFIG_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_PM8916_GPIO=y @@ -201,6 +199,8 @@ CONFIG_SOC_DEVICE=y CONFIG_SANDBOX_SPI=y CONFIG_SPMI=y CONFIG_SPMI_SANDBOX=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SANDBOX=y CONFIG_SYSRESET=y CONFIG_TIMER=y CONFIG_TIMER_EARLY=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 8e2ef24e44..f2a767a4cd 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -131,8 +131,6 @@ CONFIG_CPU=y CONFIG_DM_DEMO=y CONFIG_DM_DEMO_SIMPLE=y CONFIG_DM_DEMO_SHAPE=y -CONFIG_BOARD=y -CONFIG_BOARD_SANDBOX=y CONFIG_DMA=y CONFIG_DMA_CHANNELS=y CONFIG_SANDBOX_DMA=y @@ -238,6 +236,8 @@ CONFIG_SOC_DEVICE=y CONFIG_SANDBOX_SPI=y CONFIG_SPMI=y CONFIG_SPMI_SANDBOX=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SANDBOX=y CONFIG_SYSRESET=y CONFIG_TIMER=y CONFIG_TIMER_EARLY=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 6ee23c4a61..1f593eba8f 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -90,8 +90,6 @@ CONFIG_CPU=y CONFIG_DM_DEMO=y CONFIG_DM_DEMO_SIMPLE=y CONFIG_DM_DEMO_SHAPE=y -CONFIG_BOARD=y -CONFIG_BOARD_SANDBOX=y CONFIG_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_PM8916_GPIO=y @@ -177,6 +175,8 @@ CONFIG_SOC_DEVICE=y CONFIG_SANDBOX_SPI=y CONFIG_SPMI=y CONFIG_SPMI_SANDBOX=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SANDBOX=y CONFIG_SYSRESET=y CONFIG_TIMER=y CONFIG_TIMER_EARLY=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index d47a6252de..1ac843e1bc 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -111,8 +111,6 @@ CONFIG_CPU=y CONFIG_DM_DEMO=y CONFIG_DM_DEMO_SIMPLE=y CONFIG_DM_DEMO_SHAPE=y -CONFIG_BOARD=y -CONFIG_BOARD_SANDBOX=y CONFIG_SPL_FIRMWARE=y CONFIG_GPIO_HOG=y CONFIG_PM8916_GPIO=y @@ -196,6 +194,8 @@ CONFIG_SOC_DEVICE=y CONFIG_SANDBOX_SPI=y CONFIG_SPMI=y CONFIG_SPMI_SANDBOX=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SANDBOX=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_TIMER=y diff --git a/doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt b/doc/device-tree-bindings/sysinfo/gdsys,sysinfo_gazerbeam.txt similarity index 90% rename from doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt rename to doc/device-tree-bindings/sysinfo/gdsys,sysinfo_gazerbeam.txt index 28c1080d90..f70652d3c4 100644 --- a/doc/device-tree-bindings/board/gdsys,board_gazerbeam.txt +++ b/doc/device-tree-bindings/sysinfo/gdsys,sysinfo_gazerbeam.txt @@ -1,11 +1,11 @@ -gdsys Gazerbeam board driver +gdsys Gazerbeam sysinfo driver This driver provides capabilities to access the gdsys Gazerbeam board's device information. Furthermore, phandles to some internal devices are provided for the board files. Required properties: -- compatible: should be "gdsys,board_gazerbeam" +- compatible: should be "gdsys,sysinfo-gazerbeam" - csb: phandle to the board's coherent system bus (CSB) device node - rxaui[0-3]: phandles to the rxaui control device nodes - fpga[0-1]: phandles to the board's gdsys FPGA device nodes @@ -17,8 +17,8 @@ Required properties: Example: -board { - compatible = "gdsys,board_gazerbeam"; +sysinfo { + compatible = "gdsys,sysinfo-gazerbeam"; csb = <&board_soc>; serdes = <&SERDES>; rxaui0 = <&RXAUI0>; diff --git a/drivers/Kconfig b/drivers/Kconfig index ed8a39c994..b1ada1cb7f 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -30,8 +30,6 @@ source "drivers/ddr/Kconfig" source "drivers/demo/Kconfig" -source "drivers/board/Kconfig" - source "drivers/ddr/fsl/Kconfig" source "drivers/dfu/Kconfig" @@ -114,6 +112,8 @@ source "drivers/spi/Kconfig" source "drivers/spmi/Kconfig" +source "drivers/sysinfo/Kconfig" + source "drivers/sysreset/Kconfig" source "drivers/tee/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 33f1d536cd..e371bc32bb 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -27,9 +27,9 @@ obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/ obj-$(CONFIG_$(SPL_TPL_)VIRTIO) += virtio/ obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/ obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/ +obj-$(CONFIG_$(SPL_)SYSINFO) += sysinfo/ obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/ obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += power/acpi_pmc/ -obj-$(CONFIG_$(SPL_)BOARD) += board/ obj-$(CONFIG_XEN) += xen/ obj-$(CONFIG_$(SPL_)FPGA) += fpga/ diff --git a/drivers/board/board-uclass.c b/drivers/board/board-uclass.c deleted file mode 100644 index b5485e9895..0000000000 --- a/drivers/board/board-uclass.c +++ /dev/null @@ -1,71 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2017 - * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc - */ - -#include -#include -#include - -int board_get(struct udevice **devp) -{ - return uclass_first_device_err(UCLASS_BOARD, devp); -} - -int board_detect(struct udevice *dev) -{ - struct board_ops *ops = board_get_ops(dev); - - if (!ops->detect) - return -ENOSYS; - - return ops->detect(dev); -} - -int board_get_fit_loadable(struct udevice *dev, int index, - const char *type, const char **strp) -{ - struct board_ops *ops = board_get_ops(dev); - - if (!ops->get_fit_loadable) - return -ENOSYS; - - return ops->get_fit_loadable(dev, index, type, strp); -} - -int board_get_bool(struct udevice *dev, int id, bool *val) -{ - struct board_ops *ops = board_get_ops(dev); - - if (!ops->get_bool) - return -ENOSYS; - - return ops->get_bool(dev, id, val); -} - -int board_get_int(struct udevice *dev, int id, int *val) -{ - struct board_ops *ops = board_get_ops(dev); - - if (!ops->get_int) - return -ENOSYS; - - return ops->get_int(dev, id, val); -} - -int board_get_str(struct udevice *dev, int id, size_t size, char *val) -{ - struct board_ops *ops = board_get_ops(dev); - - if (!ops->get_str) - return -ENOSYS; - - return ops->get_str(dev, id, size, val); -} - -UCLASS_DRIVER(board) = { - .id = UCLASS_BOARD, - .name = "board", - .post_bind = dm_scan_fdt_dev, -}; diff --git a/drivers/board/Kconfig b/drivers/sysinfo/Kconfig similarity index 65% rename from drivers/board/Kconfig rename to drivers/sysinfo/Kconfig index 254f657049..39141500a0 100644 --- a/drivers/board/Kconfig +++ b/drivers/sysinfo/Kconfig @@ -1,24 +1,24 @@ -menuconfig BOARD - bool "Device Information" +menuconfig SYSINFO + bool "Device System Information" help Support methods to query hardware configurations from internal mechanisms (e.g. reading GPIO values, determining the presence of devices on busses, etc.). This enables the usage of U-Boot with modular board architectures. -if BOARD +if SYSINFO -config SPL_BOARD +config SPL_SYSINFO depends on SPL_DM bool "Enable board driver support in SPL" -config BOARD_GAZERBEAM - bool "Enable board driver for the Gazerbeam board" +config SYSINFO_GAZERBEAM + bool "Enable sysinfo driver for the Gazerbeam board" help Support querying device information for the gdsys Gazerbeam board. -config BOARD_SANDBOX - bool "Enable board driver for the Sandbox board" +config SYSINFO_SANDBOX + bool "Enable sysinfo driver for the Sandbox board" help Support querying device information for the Sandbox boards. diff --git a/drivers/board/Makefile b/drivers/sysinfo/Makefile similarity index 50% rename from drivers/board/Makefile rename to drivers/sysinfo/Makefile index cc16361755..aecf0b0d47 100644 --- a/drivers/board/Makefile +++ b/drivers/sysinfo/Makefile @@ -2,6 +2,6 @@ # # (C) Copyright 2017 # Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc -obj-y += board-uclass.o -obj-$(CONFIG_BOARD_GAZERBEAM) += gazerbeam.o -obj-$(CONFIG_BOARD_SANDBOX) += sandbox.o +obj-y += sysinfo-uclass.o +obj-$(CONFIG_SYSINFO_GAZERBEAM) += gazerbeam.o +obj-$(CONFIG_SYSINFO_SANDBOX) += sandbox.o diff --git a/drivers/board/gazerbeam.c b/drivers/sysinfo/gazerbeam.c similarity index 69% rename from drivers/board/gazerbeam.c rename to drivers/sysinfo/gazerbeam.c index ed50fc530c..9e7a496655 100644 --- a/drivers/board/gazerbeam.c +++ b/drivers/sysinfo/gazerbeam.c @@ -6,7 +6,7 @@ #include #include -#include +#include #include #include #include @@ -27,16 +27,16 @@ static const int SC_GPIO_NO; static const int CON_GPIO_NO = 1; /** - * struct board_gazerbeam_priv - Private data structure for the gazerbeam board - * driver. - * @reset_gpios: GPIOs for the board's reset GPIOs. - * @var_gpios: GPIOs for the board's hardware variant GPIOs - * @ver_gpios: GPIOs for the board's hardware version GPIOs - * @variant: Container for the board's hardware variant (CON/CPU) - * @multichannel: Container for the board's multichannel variant (MC4/MC2/SC) - * @hwversion: Container for the board's hardware version + * struct sysinfo_gazerbeam_priv - Private data structure for the gazerbeam + * sysinfo driver + * @reset_gpios: GPIOs for the sysinfo's reset GPIOs. + * @var_gpios: GPIOs for the sysinfo's hardware variant GPIOs + * @ver_gpios: GPIOs for the sysinfo's hardware version GPIOs + * @variant: Container for the sysinfo's hardware variant (CON/CPU) + * @multichannel: Container for the sysinfo's multichannel variant (MC4/MC2/SC) + * @hwversion: Container for the sysinfo's hardware version */ -struct board_gazerbeam_priv { +struct sysinfo_gazerbeam_priv { struct gpio_desc reset_gpios[2]; struct gpio_desc var_gpios[2]; struct gpio_desc ver_gpios[4]; @@ -46,19 +46,19 @@ struct board_gazerbeam_priv { }; /** - * _read_board_variant_data() - Read variant information from the hardware. - * @dev: The board device for which to determine the multichannel and device + * _read_sysinfo_variant_data() - Read variant information from the hardware. + * @dev: The sysinfo device for which to determine the multichannel and device * type information. * - * The data read from the board's hardware (mostly hard-wired GPIOs) is stored + * The data read from the sysinfo's hardware (mostly hard-wired GPIOs) is stored * in the private data structure of the driver to be used by other driver * methods. * * Return: 0 if OK, -ve on error. */ -static int _read_board_variant_data(struct udevice *dev) +static int _read_sysinfo_variant_data(struct udevice *dev) { - struct board_gazerbeam_priv *priv = dev_get_priv(dev); + struct sysinfo_gazerbeam_priv *priv = dev_get_priv(dev); struct udevice *i2c_bus; struct udevice *dummy; char *listname; @@ -129,10 +129,10 @@ static int _read_board_variant_data(struct udevice *dev) } /** - * _read_hwversion() - Read the hardware version from the board. - * @dev: The board device for which to read the hardware version. + * _read_hwversion() - Read the hardware version from the sysinfo. + * @dev: The sysinfo device for which to read the hardware version. * - * The hardware version read from the board (from hard-wired GPIOs) is stored + * The hardware version read from the sysinfo (from hard-wired GPIOs) is stored * in the private data structure of the driver to be used by other driver * methods. * @@ -140,7 +140,7 @@ static int _read_board_variant_data(struct udevice *dev) */ static int _read_hwversion(struct udevice *dev) { - struct board_gazerbeam_priv *priv = dev_get_priv(dev); + struct sysinfo_gazerbeam_priv *priv = dev_get_priv(dev); int res; res = gpio_request_list_by_name(dev, "ver-gpios", priv->ver_gpios, @@ -172,11 +172,11 @@ static int _read_hwversion(struct udevice *dev) return 0; } -static int board_gazerbeam_detect(struct udevice *dev) +static int sysinfo_gazerbeam_detect(struct udevice *dev) { int res; - res = _read_board_variant_data(dev); + res = _read_sysinfo_variant_data(dev); if (res) { debug("%s: Error reading multichannel variant (err = %d)\n", dev->name, res); @@ -193,9 +193,9 @@ static int board_gazerbeam_detect(struct udevice *dev) return 0; } -static int board_gazerbeam_get_int(struct udevice *dev, int id, int *val) +static int sysinfo_gazerbeam_get_int(struct udevice *dev, int id, int *val) { - struct board_gazerbeam_priv *priv = dev_get_priv(dev); + struct sysinfo_gazerbeam_priv *priv = dev_get_priv(dev); switch (id) { case BOARD_MULTICHANNEL: @@ -215,19 +215,19 @@ static int board_gazerbeam_get_int(struct udevice *dev, int id, int *val) return 0; } -static const struct udevice_id board_gazerbeam_ids[] = { - { .compatible = "gdsys,board_gazerbeam" }, +static const struct udevice_id sysinfo_gazerbeam_ids[] = { + { .compatible = "gdsys,sysinfo-gazerbeam" }, { /* sentinel */ } }; -static const struct board_ops board_gazerbeam_ops = { - .detect = board_gazerbeam_detect, - .get_int = board_gazerbeam_get_int, +static const struct sysinfo_ops sysinfo_gazerbeam_ops = { + .detect = sysinfo_gazerbeam_detect, + .get_int = sysinfo_gazerbeam_get_int, }; -static int board_gazerbeam_probe(struct udevice *dev) +static int sysinfo_gazerbeam_probe(struct udevice *dev) { - struct board_gazerbeam_priv *priv = dev_get_priv(dev); + struct sysinfo_gazerbeam_priv *priv = dev_get_priv(dev); int gpio_num, i; gpio_num = gpio_request_list_by_name(dev, "reset-gpios", @@ -255,11 +255,11 @@ static int board_gazerbeam_probe(struct udevice *dev) return 0; } -U_BOOT_DRIVER(board_gazerbeam) = { - .name = "board_gazerbeam", - .id = UCLASS_BOARD, - .of_match = board_gazerbeam_ids, - .ops = &board_gazerbeam_ops, - .priv_auto_alloc_size = sizeof(struct board_gazerbeam_priv), - .probe = board_gazerbeam_probe, +U_BOOT_DRIVER(sysinfo_gazerbeam) = { + .name = "sysinfo_gazerbeam", + .id = UCLASS_SYSINFO, + .of_match = sysinfo_gazerbeam_ids, + .ops = &sysinfo_gazerbeam_ops, + .priv_auto_alloc_size = sizeof(struct sysinfo_gazerbeam_priv), + .probe = sysinfo_gazerbeam_probe, }; diff --git a/drivers/board/gazerbeam.h b/drivers/sysinfo/gazerbeam.h similarity index 100% rename from drivers/board/gazerbeam.h rename to drivers/sysinfo/gazerbeam.h diff --git a/drivers/board/sandbox.c b/drivers/sysinfo/sandbox.c similarity index 50% rename from drivers/board/sandbox.c rename to drivers/sysinfo/sandbox.c index 50621e47a4..62a1cb4ac6 100644 --- a/drivers/board/sandbox.c +++ b/drivers/sysinfo/sandbox.c @@ -6,11 +6,11 @@ #include #include -#include +#include #include "sandbox.h" -struct board_sandbox_priv { +struct sysinfo_sandbox_priv { bool called_detect; int test_i1; int test_i2; @@ -19,9 +19,9 @@ struct board_sandbox_priv { char vacation_spots[][64] = {"R'lyeh", "Dreamlands", "Plateau of Leng", "Carcosa", "Yuggoth", "The Nameless City"}; -int board_sandbox_detect(struct udevice *dev) +int sysinfo_sandbox_detect(struct udevice *dev) { - struct board_sandbox_priv *priv = dev_get_priv(dev); + struct sysinfo_sandbox_priv *priv = dev_get_priv(dev); priv->called_detect = true; priv->test_i2 = 100; @@ -29,9 +29,9 @@ int board_sandbox_detect(struct udevice *dev) return 0; } -int board_sandbox_get_bool(struct udevice *dev, int id, bool *val) +int sysinfo_sandbox_get_bool(struct udevice *dev, int id, bool *val) { - struct board_sandbox_priv *priv = dev_get_priv(dev); + struct sysinfo_sandbox_priv *priv = dev_get_priv(dev); switch (id) { case BOOL_CALLED_DETECT: @@ -43,9 +43,9 @@ int board_sandbox_get_bool(struct udevice *dev, int id, bool *val) return -ENOENT; } -int board_sandbox_get_int(struct udevice *dev, int id, int *val) +int sysinfo_sandbox_get_int(struct udevice *dev, int id, int *val) { - struct board_sandbox_priv *priv = dev_get_priv(dev); + struct sysinfo_sandbox_priv *priv = dev_get_priv(dev); switch (id) { case INT_TEST1: @@ -63,9 +63,9 @@ int board_sandbox_get_int(struct udevice *dev, int id, int *val) return -ENOENT; } -int board_sandbox_get_str(struct udevice *dev, int id, size_t size, char *val) +int sysinfo_sandbox_get_str(struct udevice *dev, int id, size_t size, char *val) { - struct board_sandbox_priv *priv = dev_get_priv(dev); + struct sysinfo_sandbox_priv *priv = dev_get_priv(dev); int i1 = priv->test_i1; int i2 = priv->test_i2; int index = (i1 * i2) % ARRAY_SIZE(vacation_spots); @@ -80,28 +80,28 @@ int board_sandbox_get_str(struct udevice *dev, int id, size_t size, char *val) return -ENOENT; } -static const struct udevice_id board_sandbox_ids[] = { - { .compatible = "sandbox,board_sandbox" }, +static const struct udevice_id sysinfo_sandbox_ids[] = { + { .compatible = "sandbox,sysinfo-sandbox" }, { /* sentinel */ } }; -static const struct board_ops board_sandbox_ops = { - .detect = board_sandbox_detect, - .get_bool = board_sandbox_get_bool, - .get_int = board_sandbox_get_int, - .get_str = board_sandbox_get_str, +static const struct sysinfo_ops sysinfo_sandbox_ops = { + .detect = sysinfo_sandbox_detect, + .get_bool = sysinfo_sandbox_get_bool, + .get_int = sysinfo_sandbox_get_int, + .get_str = sysinfo_sandbox_get_str, }; -int board_sandbox_probe(struct udevice *dev) +int sysinfo_sandbox_probe(struct udevice *dev) { return 0; } -U_BOOT_DRIVER(board_sandbox) = { - .name = "board_sandbox", - .id = UCLASS_BOARD, - .of_match = board_sandbox_ids, - .ops = &board_sandbox_ops, - .priv_auto_alloc_size = sizeof(struct board_sandbox_priv), - .probe = board_sandbox_probe, +U_BOOT_DRIVER(sysinfo_sandbox) = { + .name = "sysinfo_sandbox", + .id = UCLASS_SYSINFO, + .of_match = sysinfo_sandbox_ids, + .ops = &sysinfo_sandbox_ops, + .priv_auto_alloc_size = sizeof(struct sysinfo_sandbox_priv), + .probe = sysinfo_sandbox_probe, }; diff --git a/drivers/board/sandbox.h b/drivers/sysinfo/sandbox.h similarity index 100% rename from drivers/board/sandbox.h rename to drivers/sysinfo/sandbox.h diff --git a/drivers/sysinfo/sysinfo-uclass.c b/drivers/sysinfo/sysinfo-uclass.c new file mode 100644 index 0000000000..6df58fe160 --- /dev/null +++ b/drivers/sysinfo/sysinfo-uclass.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2017 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include +#include +#include + +int sysinfo_get(struct udevice **devp) +{ + return uclass_first_device_err(UCLASS_SYSINFO, devp); +} + +int sysinfo_detect(struct udevice *dev) +{ + struct sysinfo_ops *ops = sysinfo_get_ops(dev); + + if (!ops->detect) + return -ENOSYS; + + return ops->detect(dev); +} + +int sysinfo_get_fit_loadable(struct udevice *dev, int index, const char *type, + const char **strp) +{ + struct sysinfo_ops *ops = sysinfo_get_ops(dev); + + if (!ops->get_fit_loadable) + return -ENOSYS; + + return ops->get_fit_loadable(dev, index, type, strp); +} + +int sysinfo_get_bool(struct udevice *dev, int id, bool *val) +{ + struct sysinfo_ops *ops = sysinfo_get_ops(dev); + + if (!ops->get_bool) + return -ENOSYS; + + return ops->get_bool(dev, id, val); +} + +int sysinfo_get_int(struct udevice *dev, int id, int *val) +{ + struct sysinfo_ops *ops = sysinfo_get_ops(dev); + + if (!ops->get_int) + return -ENOSYS; + + return ops->get_int(dev, id, val); +} + +int sysinfo_get_str(struct udevice *dev, int id, size_t size, char *val) +{ + struct sysinfo_ops *ops = sysinfo_get_ops(dev); + + if (!ops->get_str) + return -ENOSYS; + + return ops->get_str(dev, id, size, val); +} + +UCLASS_DRIVER(sysinfo) = { + .id = UCLASS_SYSINFO, + .name = "sysinfo", + .post_bind = dm_scan_fdt_dev, +}; diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c index ba7704225a..6139252a73 100644 --- a/drivers/timer/mpc83xx_timer.c +++ b/drivers/timer/mpc83xx_timer.c @@ -5,12 +5,12 @@ */ #include -#include #include #include #include #include #include +#include #include #include #include @@ -97,7 +97,7 @@ int interrupt_init(void) { immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; struct udevice *csb; - struct udevice *board; + struct udevice *sysinfo; struct udevice *timer; struct mpc83xx_timer_priv *timer_priv; struct clk clock; @@ -112,12 +112,12 @@ int interrupt_init(void) timer_priv = dev_get_priv(timer); - if (board_get(&board)) { - debug("%s: board device could not be fetched.\n", __func__); + if (sysinfo_get(&sysinfo)) { + debug("%s: sysinfo device could not be fetched.\n", __func__); return -ENOENT; } - ret = uclass_get_device_by_phandle(UCLASS_SIMPLE_BUS, board, + ret = uclass_get_device_by_phandle(UCLASS_SIMPLE_BUS, sysinfo, "csb", &csb); if (ret) { debug("%s: Could not retrieve CSB device (error: %d)", diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 17542de2f3..e952a9967c 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -36,7 +36,6 @@ enum uclass_id { UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */ UCLASS_AXI, /* AXI bus */ UCLASS_BLK, /* Block device */ - UCLASS_BOARD, /* Device information from hardware */ UCLASS_BOOTCOUNT, /* Bootcount backing store */ UCLASS_BUTTON, /* Button */ UCLASS_CACHE, /* Cache controller */ @@ -107,6 +106,7 @@ enum uclass_id { UCLASS_SPI_GENERIC, /* Generic SPI flash target */ UCLASS_SPMI, /* System Power Management Interface bus */ UCLASS_SYSCON, /* System configuration device */ + UCLASS_SYSINFO, /* Device information from hardware */ UCLASS_SYSRESET, /* System reset device */ UCLASS_TEE, /* Trusted Execution Environment device */ UCLASS_THERMAL, /* Thermal sensor */ diff --git a/include/board.h b/include/sysinfo.h similarity index 65% rename from include/board.h rename to include/sysinfo.h index 678b652b0a..c045d316b0 100644 --- a/include/board.h +++ b/include/sysinfo.h @@ -6,23 +6,23 @@ /* * This uclass encapsulates hardware methods to gather information about a - * board or a specific device such as hard-wired GPIOs on GPIO expanders, + * sysinfo or a specific device such as hard-wired GPIOs on GPIO expanders, * read-only data in flash ICs, or similar. * * The interface offers functions to read the usual standard data types (bool, * int, string) from the device, each of which is identified by a static * numeric ID (which will usually be defined as a enum in a header file). * - * If for example the board had a read-only serial number flash IC, we could + * If for example the sysinfo had a read-only serial number flash IC, we could * call * - * ret = board_detect(dev); + * ret = sysinfo_detect(dev); * if (ret) { - * debug("board device not found."); + * debug("sysinfo device not found."); * return ret; * } * - * ret = board_get_int(dev, ID_SERIAL_NUMBER, &serial); + * ret = sysinfo_get_int(dev, ID_SERIAL_NUMBER, &serial); * if (ret) { * debug("Error when reading serial number from device."); * return ret; @@ -31,8 +31,8 @@ * to read the serial number. */ -#if CONFIG_IS_ENABLED(BOARD) -struct board_ops { +#if CONFIG_IS_ENABLED(SYSINFO) +struct sysinfo_ops { /** * detect() - Run the hardware info detection procedure for this * device. @@ -50,7 +50,7 @@ struct board_ops { /** * get_bool() - Read a specific bool data value that describes the * hardware setup. - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @id: A unique identifier for the bool value to be read. * @val: Pointer to a buffer that receives the value read. * @@ -61,7 +61,7 @@ struct board_ops { /** * get_int() - Read a specific int data value that describes the * hardware setup. - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @id: A unique identifier for the int value to be read. * @val: Pointer to a buffer that receives the value read. * @@ -72,7 +72,7 @@ struct board_ops { /** * get_str() - Read a specific string data value that describes the * hardware setup. - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @id: A unique identifier for the string value to be read. * @size: The size of the buffer to receive the string data. * @val: Pointer to a buffer that receives the value read. @@ -87,7 +87,7 @@ struct board_ops { * detection. A classic use-case would when DTBOs are used to describe * additionnal daughter cards. * - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @index: Index of the image. Starts at 0 and gets incremented * after each call to this function. * @type: The type of image. For example, "fdt" for DTBs @@ -100,70 +100,70 @@ struct board_ops { const char *type, const char **strp); }; -#define board_get_ops(dev) ((struct board_ops *)(dev)->driver->ops) +#define sysinfo_get_ops(dev) ((struct sysinfo_ops *)(dev)->driver->ops) /** - * board_detect() - Run the hardware info detection procedure for this device. + * sysinfo_detect() - Run the hardware info detection procedure for this device. * * @dev: The device containing the information * * Return: 0 if OK, -ve on error. */ -int board_detect(struct udevice *dev); +int sysinfo_detect(struct udevice *dev); /** - * board_get_bool() - Read a specific bool data value that describes the + * sysinfo_get_bool() - Read a specific bool data value that describes the * hardware setup. - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @id: A unique identifier for the bool value to be read. * @val: Pointer to a buffer that receives the value read. * * Return: 0 if OK, -ve on error. */ -int board_get_bool(struct udevice *dev, int id, bool *val); +int sysinfo_get_bool(struct udevice *dev, int id, bool *val); /** - * board_get_int() - Read a specific int data value that describes the + * sysinfo_get_int() - Read a specific int data value that describes the * hardware setup. - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @id: A unique identifier for the int value to be read. * @val: Pointer to a buffer that receives the value read. * * Return: 0 if OK, -ve on error. */ -int board_get_int(struct udevice *dev, int id, int *val); +int sysinfo_get_int(struct udevice *dev, int id, int *val); /** - * board_get_str() - Read a specific string data value that describes the + * sysinfo_get_str() - Read a specific string data value that describes the * hardware setup. - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @id: A unique identifier for the string value to be read. * @size: The size of the buffer to receive the string data. * @val: Pointer to a buffer that receives the value read. * * Return: 0 if OK, -ve on error. */ -int board_get_str(struct udevice *dev, int id, size_t size, char *val); +int sysinfo_get_str(struct udevice *dev, int id, size_t size, char *val); /** - * board_get() - Return the board device for the board in question. - * @devp: Pointer to structure to receive the board device. + * sysinfo_get() - Return the sysinfo device for the sysinfo in question. + * @devp: Pointer to structure to receive the sysinfo device. * - * Since there can only be at most one board instance, the API can supply a + * Since there can only be at most one sysinfo instance, the API can supply a * function that returns the unique device. This is especially useful for use - * in board files. + * in sysinfo files. * * Return: 0 if OK, -ve on error. */ -int board_get(struct udevice **devp); +int sysinfo_get(struct udevice **devp); /** - * board_get_fit_loadable - Get the name of an image to load from FIT + * sysinfo_get_fit_loadable - Get the name of an image to load from FIT * This function can be used to provide the image names based on runtime * detection. A classic use-case would when DTBOs are used to describe * additionnal daughter cards. * - * @dev: The board instance to gather the data. + * @dev: The sysinfo instance to gather the data. * @index: Index of the image. Starts at 0 and gets incremented * after each call to this function. * @type: The type of image. For example, "fdt" for DTBs @@ -173,39 +173,39 @@ int board_get(struct udevice **devp); * Return: 0 if OK, -ENOENT if no loadable is available else -ve on * error. */ -int board_get_fit_loadable(struct udevice *dev, int index, - const char *type, const char **strp); +int sysinfo_get_fit_loadable(struct udevice *dev, int index, const char *type, + const char **strp); #else -static inline int board_detect(struct udevice *dev) +static inline int sysinfo_detect(struct udevice *dev) { return -ENOSYS; } -static inline int board_get_bool(struct udevice *dev, int id, bool *val) +static inline int sysinfo_get_bool(struct udevice *dev, int id, bool *val) { return -ENOSYS; } -static inline int board_get_int(struct udevice *dev, int id, int *val) +static inline int sysinfo_get_int(struct udevice *dev, int id, int *val) { return -ENOSYS; } -static inline int board_get_str(struct udevice *dev, int id, size_t size, - char *val) +static inline int sysinfo_get_str(struct udevice *dev, int id, size_t size, + char *val) { return -ENOSYS; } -static inline int board_get(struct udevice **devp) +static inline int sysinfo_get(struct udevice **devp) { return -ENOSYS; } -static inline int board_get_fit_loadable(struct udevice *dev, int index, - const char *type, const char **strp) +static inline int sysinfo_get_fit_loadable(struct udevice *dev, int index, + const char *type, const char **strp) { return -ENOSYS; } diff --git a/test/dm/Makefile b/test/dm/Makefile index 57e13ad533..46e076ed09 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -21,7 +21,6 @@ obj-$(CONFIG_ACPIGEN) += acpigen.o obj-$(CONFIG_ACPIGEN) += acpi_dp.o obj-$(CONFIG_SOUND) += audio.o obj-$(CONFIG_BLK) += blk.o -obj-$(CONFIG_BOARD) += board.o obj-$(CONFIG_BUTTON) += button.o obj-$(CONFIG_DM_BOOTCOUNT) += bootcount.o obj-$(CONFIG_CLK) += clk.o clk_ccf.o @@ -78,6 +77,7 @@ obj-$(CONFIG_DM_SERIAL) += serial.o obj-$(CONFIG_CPU) += cpu.o obj-$(CONFIG_SOC_DEVICE) += soc.o obj-$(CONFIG_SOUND) += sound.o +obj-$(CONFIG_SYSINFO) += sysinfo.o obj-$(CONFIG_TEE) += tee.o obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o obj-$(CONFIG_DMA) += dma.o diff --git a/test/dm/board.c b/test/dm/board.c deleted file mode 100644 index f3e7f63f25..0000000000 --- a/test/dm/board.c +++ /dev/null @@ -1,59 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2018 - * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "../../drivers/board/sandbox.h" - -static int dm_test_board(struct unit_test_state *uts) -{ - struct udevice *board; - bool called_detect; - char str[64]; - int i; - - board_get(&board); - ut_assert(board); - - board_get_bool(board, BOOL_CALLED_DETECT, &called_detect); - ut_assert(!called_detect); - - board_detect(board); - - board_get_bool(board, BOOL_CALLED_DETECT, &called_detect); - ut_assert(called_detect); - - board_get_str(board, STR_VACATIONSPOT, sizeof(str), str); - ut_assertok(strcmp(str, "R'lyeh")); - - board_get_int(board, INT_TEST1, &i); - ut_asserteq(0, i); - - board_get_int(board, INT_TEST2, &i); - ut_asserteq(100, i); - - board_get_str(board, STR_VACATIONSPOT, sizeof(str), str); - ut_assertok(strcmp(str, "Carcosa")); - - board_get_int(board, INT_TEST1, &i); - ut_asserteq(1, i); - - board_get_int(board, INT_TEST2, &i); - ut_asserteq(99, i); - - board_get_str(board, STR_VACATIONSPOT, sizeof(str), str); - ut_assertok(strcmp(str, "Yuggoth")); - - return 0; -} - -DM_TEST(dm_test_board, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); diff --git a/test/dm/sysinfo.c b/test/dm/sysinfo.c new file mode 100644 index 0000000000..4aaa9e85bc --- /dev/null +++ b/test/dm/sysinfo.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "../../drivers/sysinfo/sandbox.h" + +static int dm_test_sysinfo(struct unit_test_state *uts) +{ + struct udevice *sysinfo; + bool called_detect; + char str[64]; + int i; + + ut_assertok(sysinfo_get(&sysinfo)); + ut_assert(sysinfo); + + sysinfo_get_bool(sysinfo, BOOL_CALLED_DETECT, &called_detect); + ut_assert(!called_detect); + + sysinfo_detect(sysinfo); + + sysinfo_get_bool(sysinfo, BOOL_CALLED_DETECT, &called_detect); + ut_assert(called_detect); + + sysinfo_get_str(sysinfo, STR_VACATIONSPOT, sizeof(str), str); + ut_assertok(strcmp(str, "R'lyeh")); + + sysinfo_get_int(sysinfo, INT_TEST1, &i); + ut_asserteq(0, i); + + sysinfo_get_int(sysinfo, INT_TEST2, &i); + ut_asserteq(100, i); + + sysinfo_get_str(sysinfo, STR_VACATIONSPOT, sizeof(str), str); + ut_assertok(strcmp(str, "Carcosa")); + + sysinfo_get_int(sysinfo, INT_TEST1, &i); + ut_asserteq(1, i); + + sysinfo_get_int(sysinfo, INT_TEST2, &i); + ut_asserteq(99, i); + + sysinfo_get_str(sysinfo, STR_VACATIONSPOT, sizeof(str), str); + ut_assertok(strcmp(str, "Yuggoth")); + + return 0; +} + +DM_TEST(dm_test_sysinfo, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); From 49337238effdd86e5863b14a52c1ecc08867bb01 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:06 -0700 Subject: [PATCH 38/50] doc: Add a binding for sysinfo Add a simple binding file for this, so that it is clear what this binding directory is for. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- doc/device-tree-bindings/sysinfo/sysinfo.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 doc/device-tree-bindings/sysinfo/sysinfo.txt diff --git a/doc/device-tree-bindings/sysinfo/sysinfo.txt b/doc/device-tree-bindings/sysinfo/sysinfo.txt new file mode 100644 index 0000000000..9445031b18 --- /dev/null +++ b/doc/device-tree-bindings/sysinfo/sysinfo.txt @@ -0,0 +1,19 @@ +Sysinfo +======= + +This provides capabilities to access information about a board/system, for +use by drivers. + +Required properties: + + - compatible: any suitable string where the driver is in the UCLASS_SYSINFO + class + +See also smbios.txt + + +Example + +sysinfo { + compatible = "sandbox,sysinfo-sandbox"; +}; From 78227d4eda26d5838b34e12f5080346728015fa5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:07 -0700 Subject: [PATCH 39/50] x86: Pass an ofnode into each SMBIOS function As a first step to obtaining SMBIOS information from the devicetree, add an ofnode parameter to the writing functions. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/smbios.h | 5 ++++- lib/smbios.c | 44 ++++++++++++++++++++++++++------------------ 2 files changed, 30 insertions(+), 19 deletions(-) diff --git a/include/smbios.h b/include/smbios.h index 44f49e9556..1846607c3c 100644 --- a/include/smbios.h +++ b/include/smbios.h @@ -8,6 +8,8 @@ #ifndef _SMBIOS_H_ #define _SMBIOS_H_ +#include + /* SMBIOS spec version implemented */ #define SMBIOS_MAJOR_VER 3 #define SMBIOS_MINOR_VER 0 @@ -222,9 +224,10 @@ static inline void fill_smbios_header(void *table, int type, * * @addr: start address to write the structure * @handle: the structure's handle, a unique 16-bit number + * @node: node containing the information to write (ofnode_null() if none) * @return: size of the structure */ -typedef int (*smbios_write_type)(ulong *addr, int handle); +typedef int (*smbios_write_type)(ulong *addr, int handle, ofnode node); /** * write_smbios_table() - Write SMBIOS table diff --git a/lib/smbios.c b/lib/smbios.c index 11790443e1..b0f5e93604 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -13,7 +14,6 @@ #include #ifdef CONFIG_CPU #include -#include #include #endif @@ -25,7 +25,7 @@ * * @start: string area start address * @str: string to add - * @return: string number in the string area + * @return: string number in the string area (1 or more) */ static int smbios_add_string(char *start, const char *str) { @@ -74,7 +74,7 @@ static int smbios_string_table_len(char *start) return len + 1; } -static int smbios_write_type0(ulong *current, int handle) +static int smbios_write_type0(ulong *current, int handle, ofnode node) { struct smbios_type0 *t; int len = sizeof(struct smbios_type0); @@ -111,7 +111,7 @@ static int smbios_write_type0(ulong *current, int handle) return len; } -static int smbios_write_type1(ulong *current, int handle) +static int smbios_write_type1(ulong *current, int handle, ofnode node) { struct smbios_type1 *t; int len = sizeof(struct smbios_type1); @@ -134,7 +134,7 @@ static int smbios_write_type1(ulong *current, int handle) return len; } -static int smbios_write_type2(ulong *current, int handle) +static int smbios_write_type2(ulong *current, int handle, ofnode node) { struct smbios_type2 *t; int len = sizeof(struct smbios_type2); @@ -154,7 +154,7 @@ static int smbios_write_type2(ulong *current, int handle) return len; } -static int smbios_write_type3(ulong *current, int handle) +static int smbios_write_type3(ulong *current, int handle, ofnode node) { struct smbios_type3 *t; int len = sizeof(struct smbios_type3); @@ -176,7 +176,7 @@ static int smbios_write_type3(ulong *current, int handle) return len; } -static void smbios_write_type4_dm(struct smbios_type4 *t) +static void smbios_write_type4_dm(struct smbios_type4 *t, ofnode node) { u16 processor_family = SMBIOS_PROCESSOR_FAMILY_UNKNOWN; const char *vendor = "Unknown"; @@ -185,20 +185,20 @@ static void smbios_write_type4_dm(struct smbios_type4 *t) #ifdef CONFIG_CPU char processor_name[49]; char vendor_name[49]; - struct udevice *dev = NULL; + struct udevice *cpu = NULL; - uclass_find_first_device(UCLASS_CPU, &dev); - if (dev) { - struct cpu_platdata *plat = dev_get_parent_platdata(dev); + uclass_find_first_device(UCLASS_CPU, &cpu); + if (cpu) { + struct cpu_platdata *plat = dev_get_parent_platdata(cpu); if (plat->family) processor_family = plat->family; t->processor_id[0] = plat->id[0]; t->processor_id[1] = plat->id[1]; - if (!cpu_get_vendor(dev, vendor_name, sizeof(vendor_name))) + if (!cpu_get_vendor(cpu, vendor_name, sizeof(vendor_name))) vendor = vendor_name; - if (!cpu_get_desc(dev, processor_name, sizeof(processor_name))) + if (!cpu_get_desc(cpu, processor_name, sizeof(processor_name))) name = processor_name; } #endif @@ -208,7 +208,7 @@ static void smbios_write_type4_dm(struct smbios_type4 *t) t->processor_version = smbios_add_string(t->eos, name); } -static int smbios_write_type4(ulong *current, int handle) +static int smbios_write_type4(ulong *current, int handle, ofnode node) { struct smbios_type4 *t; int len = sizeof(struct smbios_type4); @@ -217,7 +217,7 @@ static int smbios_write_type4(ulong *current, int handle) memset(t, 0, sizeof(struct smbios_type4)); fill_smbios_header(t, SMBIOS_PROCESSOR_INFORMATION, len, handle); t->processor_type = SMBIOS_PROCESSOR_TYPE_CENTRAL; - smbios_write_type4_dm(t); + smbios_write_type4_dm(t, node); t->status = SMBIOS_PROCESSOR_STATUS_ENABLED; t->processor_upgrade = SMBIOS_PROCESSOR_UPGRADE_NONE; t->l1_cache_handle = 0xffff; @@ -232,7 +232,7 @@ static int smbios_write_type4(ulong *current, int handle) return len; } -static int smbios_write_type32(ulong *current, int handle) +static int smbios_write_type32(ulong *current, int handle, ofnode node) { struct smbios_type32 *t; int len = sizeof(struct smbios_type32); @@ -247,7 +247,7 @@ static int smbios_write_type32(ulong *current, int handle) return len; } -static int smbios_write_type127(ulong *current, int handle) +static int smbios_write_type127(ulong *current, int handle, ofnode node) { struct smbios_type127 *t; int len = sizeof(struct smbios_type127); @@ -274,7 +274,9 @@ static smbios_write_type smbios_write_funcs[] = { ulong write_smbios_table(ulong addr) { + ofnode node = ofnode_null(); struct smbios_entry *se; + struct udevice *dev; ulong table_addr; ulong tables; int len = 0; @@ -284,6 +286,12 @@ ulong write_smbios_table(ulong addr) int isize; int i; + if (IS_ENABLED(CONFIG_OF_CONTROL)) { + uclass_first_device(UCLASS_SYSINFO, &dev); + if (dev) + node = dev_read_subnode(dev, "smbios"); + } + /* 16 byte align the table address */ addr = ALIGN(addr, 16); @@ -296,7 +304,7 @@ ulong write_smbios_table(ulong addr) /* populate minimum required tables */ for (i = 0; i < ARRAY_SIZE(smbios_write_funcs); i++) { - int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++); + int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++, node); max_struct_size = max(max_struct_size, tmp); len += tmp; From 44ffb6f0ecaf25bd233b511cbf2ddb7b6019a53d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:08 -0700 Subject: [PATCH 40/50] smbios: Allow properties to come from the device tree Support a way to put SMBIOS properties in the device tree. These can be placed in a 'board' device in an 'smbios' subnode. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- lib/smbios.c | 98 +++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 81 insertions(+), 17 deletions(-) diff --git a/lib/smbios.c b/lib/smbios.c index b0f5e93604..3f9d2ec085 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -17,6 +17,18 @@ #include #endif +/** + * struct smbios_write_method - Information about a table-writing function + * + * @write: Function to call + * @subnode_name: Name of subnode which has the information for this function, + * NULL if none + */ +struct smbios_write_method { + smbios_write_type write; + const char *subnode_name; +}; + /** * smbios_add_string() - add a string to the string area * @@ -52,6 +64,43 @@ static int smbios_add_string(char *start, const char *str) } } +/** + * smbios_add_prop_default() - Add a property from the device tree or default + * + * @start: string area start address + * @node: node containing the information to write (ofnode_null() if none) + * @prop: property to write + * @def: default string if the node has no such property + * @return 0 if not found, else SMBIOS string number (1 or more) + */ +static int smbios_add_prop_default(char *start, ofnode node, const char *prop, + const char *def) +{ + const char *str = NULL; + + if (IS_ENABLED(CONFIG_OF_CONTROL)) + str = ofnode_read_string(node, prop); + if (str) + return smbios_add_string(start, str); + else if (def) + return smbios_add_string(start, def); + + return 0; +} + +/** + * smbios_add_prop() - Add a property from the device tree + * + * @start: string area start address + * @node: node containing the information to write (ofnode_null() if none) + * @prop: property to write + * @return 0 if not found, else SMBIOS string number (1 or more) + */ +static int smbios_add_prop(char *start, ofnode node, const char *prop) +{ + return smbios_add_prop_default(start, node, prop, NULL); +} + /** * smbios_string_table_len() - compute the string area size * @@ -120,11 +169,15 @@ static int smbios_write_type1(ulong *current, int handle, ofnode node) t = map_sysmem(*current, len); memset(t, 0, sizeof(struct smbios_type1)); fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); - t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER); - t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME); + t->manufacturer = smbios_add_prop_default(t->eos, node, "manufacturer", + CONFIG_SMBIOS_MANUFACTURER); + t->product_name = smbios_add_prop_default(t->eos, node, "product", + CONFIG_SMBIOS_PRODUCT_NAME); if (serial_str) { - strncpy((char *)t->uuid, serial_str, sizeof(t->uuid)); t->serial_number = smbios_add_string(t->eos, serial_str); + strncpy((char *)t->uuid, serial_str, sizeof(t->uuid)); + } else { + t->serial_number = smbios_add_prop(t->eos, node, "serial"); } len = t->length + smbios_string_table_len(t->eos); @@ -142,8 +195,10 @@ static int smbios_write_type2(ulong *current, int handle, ofnode node) t = map_sysmem(*current, len); memset(t, 0, sizeof(struct smbios_type2)); fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); - t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER); - t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME); + t->manufacturer = smbios_add_prop_default(t->eos, node, "manufacturer", + CONFIG_SMBIOS_MANUFACTURER); + t->product_name = smbios_add_prop_default(t->eos, node, "product", + CONFIG_SMBIOS_PRODUCT_NAME); t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING; t->board_type = SMBIOS_BOARD_MOTHERBOARD; @@ -162,7 +217,8 @@ static int smbios_write_type3(ulong *current, int handle, ofnode node) t = map_sysmem(*current, len); memset(t, 0, sizeof(struct smbios_type3)); fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); - t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER); + t->manufacturer = smbios_add_prop_default(t->eos, node, "manufacturer", + CONFIG_SMBIOS_MANUFACTURER); t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; t->bootup_state = SMBIOS_STATE_SAFE; t->power_supply_state = SMBIOS_STATE_SAFE; @@ -262,19 +318,19 @@ static int smbios_write_type127(ulong *current, int handle, ofnode node) return len; } -static smbios_write_type smbios_write_funcs[] = { - smbios_write_type0, - smbios_write_type1, - smbios_write_type2, - smbios_write_type3, - smbios_write_type4, - smbios_write_type32, - smbios_write_type127 +static struct smbios_write_method smbios_write_funcs[] = { + { smbios_write_type0, }, + { smbios_write_type1, "system", }, + { smbios_write_type2, "baseboard", }, + { smbios_write_type3, "chassis", }, + { smbios_write_type4, }, + { smbios_write_type32, }, + { smbios_write_type127 }, }; ulong write_smbios_table(ulong addr) { - ofnode node = ofnode_null(); + ofnode parent_node = ofnode_null(); struct smbios_entry *se; struct udevice *dev; ulong table_addr; @@ -289,7 +345,7 @@ ulong write_smbios_table(ulong addr) if (IS_ENABLED(CONFIG_OF_CONTROL)) { uclass_first_device(UCLASS_SYSINFO, &dev); if (dev) - node = dev_read_subnode(dev, "smbios"); + parent_node = dev_read_subnode(dev, "smbios"); } /* 16 byte align the table address */ @@ -304,7 +360,15 @@ ulong write_smbios_table(ulong addr) /* populate minimum required tables */ for (i = 0; i < ARRAY_SIZE(smbios_write_funcs); i++) { - int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++, node); + const struct smbios_write_method *method; + ofnode node = ofnode_null(); + int tmp; + + method = &smbios_write_funcs[i]; + if (IS_ENABLED(CONFIG_OF_CONTROL) && method->subnode_name) + node = ofnode_find_subnode(parent_node, + method->subnode_name); + tmp = method->write((ulong *)&addr, handle++, node); max_struct_size = max(max_struct_size, tmp); len += tmp; From a3f5c8ea69a0047aa0db12517b3bf91ae7d3f682 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:09 -0700 Subject: [PATCH 41/50] smbios: Add more properties The current tables only support a subset of the available fields defined by the SMBIOS spec. Add a few more. We could use CONFIG_SYS_CPU or CONFIG_SYS_SOC as a default for family, but the meaning of that value relates more to the whole system rather than just the SoC. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- lib/smbios.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/smbios.c b/lib/smbios.c index 3f9d2ec085..a52a9d5b30 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -173,12 +173,15 @@ static int smbios_write_type1(ulong *current, int handle, ofnode node) CONFIG_SMBIOS_MANUFACTURER); t->product_name = smbios_add_prop_default(t->eos, node, "product", CONFIG_SMBIOS_PRODUCT_NAME); + t->version = smbios_add_prop(t->eos, node, "version"); if (serial_str) { t->serial_number = smbios_add_string(t->eos, serial_str); strncpy((char *)t->uuid, serial_str, sizeof(t->uuid)); } else { t->serial_number = smbios_add_prop(t->eos, node, "serial"); } + t->sku_number = smbios_add_prop(t->eos, node, "sku"); + t->family = smbios_add_prop(t->eos, node, "family"); len = t->length + smbios_string_table_len(t->eos); *current += len; @@ -199,6 +202,7 @@ static int smbios_write_type2(ulong *current, int handle, ofnode node) CONFIG_SMBIOS_MANUFACTURER); t->product_name = smbios_add_prop_default(t->eos, node, "product", CONFIG_SMBIOS_PRODUCT_NAME); + t->asset_tag_number = smbios_add_prop(t->eos, node, "asset-tag"); t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING; t->board_type = SMBIOS_BOARD_MOTHERBOARD; From f96965315489fcb7fc9df8fe4da0137150bb3826 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:10 -0700 Subject: [PATCH 42/50] smbios: Add documentation and devicetree binding Add information about how to set SMBIOS properties using the devicetree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- doc/arch/x86.rst | 8 +++ doc/device-tree-bindings/sysinfo/smbios.txt | 77 +++++++++++++++++++++ 2 files changed, 85 insertions(+) create mode 100644 doc/device-tree-bindings/sysinfo/smbios.txt diff --git a/doc/arch/x86.rst b/doc/arch/x86.rst index c6b70ce61a..cc307aa8d5 100644 --- a/doc/arch/x86.rst +++ b/doc/arch/x86.rst @@ -740,6 +740,14 @@ Note that this is a development feature only. It is not intended for use in production environments. Also it is not currently part of the automated tests so may break in the future. +SMBIOS tables +------------- + +To generate SMBIOS tables in U-Boot, for use by the OS, enable the +CONFIG_GENERATE_SMBIOS_TABLE option. The easiest way to provide the values to +use is via the device tree. For details see +device-tree-bindings/sysinfo/smbios.txt + TODO List --------- - Audio diff --git a/doc/device-tree-bindings/sysinfo/smbios.txt b/doc/device-tree-bindings/sysinfo/smbios.txt new file mode 100644 index 0000000000..b522322802 --- /dev/null +++ b/doc/device-tree-bindings/sysinfo/smbios.txt @@ -0,0 +1,77 @@ +SMBIOS sysinfo information +========================== + +This binding allows the values for the SMBIOS tables to be specified in the +devicetree, as below. + +Required properties: + + - compatible: "u-boot,smbios" or any other string depending on your board + +This driver allows providing board-specific features such as power control +GPIOs. In addition, the SMBIOS values can be specified in the device tree, +as below: + +An optional 'smbios' subnode can be used to provide these properties. Within +that, the properties are broken down by table type, as in the System Management +BIOS (Basic Input/Output System) Specification. + +Available subnodes for each table type are: + + - 1 : system + - 2 : baseboard + - 3 : chassis + +Within each subnode the following tables are recognised: + +"system" subnode optional properties: + + - manufacturer: Product manufacturer for system + - product: Product name + - version: Product version string + - serial: Serial number for system (note that this can be overridden by + the serial# environment variable) + - sku: Product SKU (Stock-Keeping Unit) + - family: Product family + +"baseboard" subnode optional properties: + + - manufacturer: Product manufacturer for baseboard + - product: Product name + - asset-tag: Asset tag for the motherboard, sometimes used in organisations + to track devices + +"chassis" subnode optional properties: + + - manufacturer: Product manufacturer for chassis + + +Example: + +sysinfo { + compatible = "sandbox,sysinfo-sandbox"; + + smbios { + /* Type 1 table */ + system { + manufacturer = "Google"; + product = "Coral"; + version = "rev2"; + serial = "123456789"; + sku = "sku3"; + family = "Google_Coral"; + }; + + /* Type 2 table */ + baseboard { + manufacturer = "Google"; + product = "Coral"; + asset-tag = "ABC123"; + }; + + /* Type 3 table */ + chassis { + manufacturer = "Google"; + }; + }; +}; From 44c74bdd5828c885b97a1518b9d85239a1020c6c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:11 -0700 Subject: [PATCH 43/50] sysinfo: Provide a default driver to set SMBIOS values Some boards want to specify the manufacturer or product name but do not need to have their own sysinfo driver. Add a default driver which provides a way to specify this SMBIOS information in the devicetree, without needing any board-specific functionality. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- drivers/sysinfo/Kconfig | 8 ++++++++ drivers/sysinfo/Makefile | 1 + drivers/sysinfo/smbios.c | 24 ++++++++++++++++++++++++ lib/Kconfig | 3 +++ 4 files changed, 36 insertions(+) create mode 100644 drivers/sysinfo/smbios.c diff --git a/drivers/sysinfo/Kconfig b/drivers/sysinfo/Kconfig index 39141500a0..85c1e81e41 100644 --- a/drivers/sysinfo/Kconfig +++ b/drivers/sysinfo/Kconfig @@ -22,4 +22,12 @@ config SYSINFO_SANDBOX help Support querying device information for the Sandbox boards. +config SYSINFO_SMBIOS + bool "Provide a default sysinfo driver for SMBIOS information" + help + Some boards want to specify the manufacturer or product name but do + not need to have their own sysinfo driver. This includes a default + one which provides a way to specify this SMBIOS information in the + devicetree, without needing any board-specific functionality. + endif diff --git a/drivers/sysinfo/Makefile b/drivers/sysinfo/Makefile index aecf0b0d47..6d04fcba1d 100644 --- a/drivers/sysinfo/Makefile +++ b/drivers/sysinfo/Makefile @@ -5,3 +5,4 @@ obj-y += sysinfo-uclass.o obj-$(CONFIG_SYSINFO_GAZERBEAM) += gazerbeam.o obj-$(CONFIG_SYSINFO_SANDBOX) += sandbox.o +obj-$(CONFIG_SYSINFO_SMBIOS) += smbios.o diff --git a/drivers/sysinfo/smbios.c b/drivers/sysinfo/smbios.c new file mode 100644 index 0000000000..80ebd1921d --- /dev/null +++ b/drivers/sysinfo/smbios.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 Google LLC + * Written by Simon Glass + */ + +#include +#include +#include + +static const struct udevice_id sysinfo_smbios_ids[] = { + { .compatible = "u-boot,sysinfo-smbios" }, + { /* sentinel */ } +}; + +static const struct sysinfo_ops sysinfo_smbios_ops = { +}; + +U_BOOT_DRIVER(sysinfo_smbios) = { + .name = "sysinfo_smbios", + .id = UCLASS_SYSINFO, + .of_match = sysinfo_smbios_ids, + .ops = &sysinfo_smbios_ops, +}; diff --git a/lib/Kconfig b/lib/Kconfig index 8f487533e8..fdc35a9232 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -658,6 +658,9 @@ config GENERATE_SMBIOS_TABLE Check http://www.dmtf.org/standards/smbios for details. + See also SMBIOS_SYSINFO which allows SMBIOS values to be provided in + the devicetree. + config SMBIOS_MANUFACTURER string "SMBIOS Manufacturer" depends on GENERATE_SMBIOS_TABLE From 70190f82cb3b469e327a274ba523e4453c4c4402 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:12 -0700 Subject: [PATCH 44/50] rockchip: Use devicetree for SMBIOS settings Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 21 +++++++++++++++++++++ arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 23 +++++++++++++++++++++++ arch/arm/dts/rk3328-rock64-u-boot.dtsi | 21 +++++++++++++++++++++ arch/arm/dts/rk3368-lion-u-boot.dtsi | 20 ++++++++++++++++++++ configs/lion-rk3368_defconfig | 4 ++-- configs/roc-cc-rk3328_defconfig | 4 ++-- configs/rock-pi-e-rk3328_defconfig | 4 ++-- configs/rock64-rk3328_defconfig | 4 ++-- 8 files changed, 93 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi index e929d86e30..08806dfc0f 100644 --- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi +++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi @@ -9,6 +9,27 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; }; + + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "firefly"; + product = "roc-rk3328-cc"; + }; + + baseboard { + manufacturer = "firefly"; + product = "roc-rk3328-cc"; + }; + + chassis { + manufacturer = "firefly"; + product = "roc-rk3328-cc"; + }; + }; + }; }; &gpio0 { diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi index bf5b1f3adc..4fc055eacb 100644 --- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -6,6 +6,29 @@ #include "rk3328-u-boot.dtsi" #include "rk3328-sdram-ddr3-666.dtsi" +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + + baseboard { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + + chassis { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + }; + }; +}; + &gpio0 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index 7340ef95f1..2af32aea05 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -9,6 +9,27 @@ chosen { u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; }; + + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "pine64"; + product = "rock64_rk3328"; + }; + + baseboard { + manufacturer = "pine64"; + product = "rock64_rk3328"; + }; + + chassis { + manufacturer = "pine64"; + product = "rock64_rk3328"; + }; + }; + }; }; &gpio0 { diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi index edc93e438f..6d54214de9 100644 --- a/arch/arm/dts/rk3368-lion-u-boot.dtsi +++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi @@ -14,6 +14,26 @@ u-boot,spl-boot-order = &emmc, &sdmmc; }; + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "rockchip"; + product = "sheep_rk3368"; + }; + + baseboard { + manufacturer = "rockchip"; + product = "sheep_rk3368"; + }; + + chassis { + manufacturer = "rockchip"; + product = "sheep_rk3368"; + }; + }; + }; }; &pinctrl { diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index b5b7a0b2da..3287bd1c05 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -16,7 +16,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion" -CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y @@ -89,4 +88,5 @@ CONFIG_SYSRESET=y CONFIG_SPL_TINY_MEMSET=y CONFIG_LZO=y CONFIG_ERRNO_STR=y -CONFIG_SMBIOS_MANUFACTURER="rockchip" +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 98b11af2d9..946a007a79 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -13,7 +13,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc" -CONFIG_SMBIOS_PRODUCT_NAME="roc-rk3328-cc" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -100,4 +99,5 @@ CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y -CONFIG_SMBIOS_MANUFACTURER="firefly" +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 5267691732..fae9a50c81 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e" -CONFIG_SMBIOS_PRODUCT_NAME="rock-pi-e_rk3328" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -102,4 +101,5 @@ CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y -CONFIG_SMBIOS_MANUFACTURER="radxa" +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index d6074adb04..c625a47dc7 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -13,7 +13,6 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" -CONFIG_SMBIOS_PRODUCT_NAME="rock64_rk3328" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -99,4 +98,5 @@ CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y -CONFIG_SMBIOS_MANUFACTURER="pine64" +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y From c0697c1f4b6ddbe4a708bda78852c5dda153f522 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:13 -0700 Subject: [PATCH 45/50] imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- .../dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts | 25 +++++++++++++++++++ configs/myir_mys_6ulx_defconfig | 3 ++- 2 files changed, 27 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts diff --git a/arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts b/arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts new file mode 100644 index 0000000000..378e4fa58d --- /dev/null +++ b/arch/arm/dts/imx6ull-myir-mys-6ulx-eval-u-boot.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Linumiz + * Author: Parthiban Nallathambi + */ + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "MYiR"; + }; + + baseboard { + manufacturer = "MYiR"; + }; + + chassis { + manufacturer = "MYiR"; + }; + }; + }; +}; diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index 02b2060874..4ba817ab1e 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -67,4 +67,5 @@ CONFIG_MXC_UART=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_GADGET=y -CONFIG_SMBIOS_MANUFACTURER="MYiR" +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y From a1d63bc13505c7f1257f01aac9e74c6fb7f0c72d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:14 -0700 Subject: [PATCH 46/50] odroid-c2: Use devicetree for SMBIOS settings Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 23 ++++++++++++++++++++ configs/odroid-c2_defconfig | 4 ++-- 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi index 484b40504d..90087b00db 100644 --- a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi +++ b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi @@ -6,6 +6,29 @@ #include "meson-gx-u-boot.dtsi" +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "Hardkernel Co., Ltd."; + product = "ODROID-C2"; + }; + + baseboard { + manufacturer = "Hardkernel Co., Ltd."; + product = "ODROID-C2"; + }; + + chassis { + manufacturer = "Hardkernel Co., Ltd."; + product = "ODROID-C2"; + }; + }; + }; +}; + &usb0 { status = "disabled"; }; diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 5fdce3b463..f2c9fa7277 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -8,7 +8,6 @@ CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" -CONFIG_SMBIOS_PRODUCT_NAME="ODROID-C2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -64,4 +63,5 @@ CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="Hardkernel Co., Ltd." +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y From fa9e1bcfc44e0982ece00d8c335b8748be907b07 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:15 -0700 Subject: [PATCH 47/50] arm64: mvebu: Use devicetree for SMBIOS settings on uDPU Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/arm/dts/armada-3720-uDPU-u-boot.dtsi | 20 ++++++++++++++++++++ configs/uDPU_defconfig | 3 ++- 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi index ef178bdc86..fdad90ad12 100644 --- a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi +++ b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi @@ -1,5 +1,25 @@ // SPDX-License-Identifier: GPL-2.0+ +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + product = "uDPU"; + }; + + baseboard { + product = "uDPU"; + }; + + chassis { + product = "uDPU"; + }; + }; + }; +}; + &spi0 { u-boot,dm-pre-reloc; diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index dfab2b306b..ec97489523 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -11,7 +11,6 @@ CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU" -CONFIG_SMBIOS_PRODUCT_NAME="uDPU" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y @@ -97,3 +96,5 @@ CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_LZO=y CONFIG_SPL_LZO=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y From 8f1f374f63076cdbb8f7106bd80fcae50ba62394 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:16 -0700 Subject: [PATCH 48/50] x86: galileo: Use devicetree for SMBIOS settings Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/dts/galileo.dts | 28 ++++++++++++++++++++++++++++ board/intel/galileo/Kconfig | 11 ----------- 2 files changed, 28 insertions(+), 11 deletions(-) diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 5de4568679..501047124e 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -164,4 +164,32 @@ }; }; + smbios { + compatible = "u-boot,sysinfo-smbios"; + + /* + * Override the default product name U-Boot reports in the + * SMBIOS table, to be compatible with the Intel provided UEFI + * BIOS, as Linux kernel drivers + * (drivers/mfd/intel_quark_i2c_gpio.c and + * drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of + * it to do different board level configuration. + * + * This can be "Galileo" for GEN1 Galileo board. + */ + smbios { + system { + product = "GalileoGen2"; + }; + + baseboard { + product = "GalileoGen2"; + }; + + chassis { + product = "GalileoGen2"; + }; + }; + }; + }; diff --git a/board/intel/galileo/Kconfig b/board/intel/galileo/Kconfig index 1416c891e8..fb8d94fb5b 100644 --- a/board/intel/galileo/Kconfig +++ b/board/intel/galileo/Kconfig @@ -22,15 +22,4 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_1024 select SPI_FLASH_WINBOND -config SMBIOS_PRODUCT_NAME - default "GalileoGen2" - help - Override the default product name U-Boot reports in the SMBIOS - table, to be compatible with the Intel provided UEFI BIOS, as - Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and - drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of - it to do different board level configuration. - - This can be "Galileo" for GEN1 Galileo board. - endif From 839d66cdb518f5bd28d25b4b9bf3413711826945 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:17 -0700 Subject: [PATCH 49/50] x86: Provide default SMBIOS manufacturer/product Add a file containing defaults for these, using the existing CONFIG options. This file must be included with #include since it needs to be passed through the C preprocessor. Enable the driver for all x86 boards that generate SMBIOS tables. Disable it for coral since it has its own driver. Signed-off-by: Simon Glass Reviewed-by: Bin Meng [bmeng: reword the commit message a little bit] Signed-off-by: Bin Meng --- arch/Kconfig | 2 ++ arch/x86/dts/bayleybay.dts | 2 ++ arch/x86/dts/baytrail_som-db5800-som-6867.dts | 2 ++ arch/x86/dts/cherryhill.dts | 2 ++ arch/x86/dts/chromebook_link.dts | 2 ++ arch/x86/dts/chromebook_samus.dts | 2 ++ arch/x86/dts/chromebox_panther.dts | 2 ++ arch/x86/dts/conga-qeval20-qa3-e3845.dts | 2 ++ arch/x86/dts/cougarcanyon2.dts | 2 ++ arch/x86/dts/crownbay.dts | 2 ++ arch/x86/dts/dfi-bt700.dtsi | 2 ++ arch/x86/dts/edison.dts | 2 ++ arch/x86/dts/minnowmax.dts | 2 ++ arch/x86/dts/qemu-x86_i440fx.dts | 2 ++ arch/x86/dts/qemu-x86_q35.dts | 2 ++ arch/x86/dts/smbios.dtsi | 32 +++++++++++++++++++ configs/chromebook_coral_defconfig | 2 +- 17 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 arch/x86/dts/smbios.dtsi diff --git a/arch/Kconfig b/arch/Kconfig index 3b9fcce980..041e179256 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -198,6 +198,8 @@ config X86 imply RTC_MC146818 imply IRQ imply ACPIGEN if !QEMU + imply SYSINFO if GENERATE_SMBIOS_TABLE + imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE # Thing to enable for when SPL/TPL are enabled: SPL imply SPL_DM diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index d0168e88db..70e5798403 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -16,6 +16,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Bayley Bay"; compatible = "intel,bayleybay", "intel,baytrail"; diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts index 5abbc66ce9..a7dc03b645 100644 --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts @@ -16,6 +16,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Advantech SOM-DB5800-SOM-6867"; compatible = "advantech,som-db5800-som-6867", "intel,baytrail"; diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts index 37146fde2b..2ce7f1aa91 100644 --- a/arch/x86/dts/cherryhill.dts +++ b/arch/x86/dts/cherryhill.dts @@ -14,6 +14,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Cherry Hill"; compatible = "intel,cherryhill", "intel,braswell"; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 09488f13b5..e529c4b63e 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -11,6 +11,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Google Link"; compatible = "google,link", "intel,celeron-ivybridge"; diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index d8e04a6698..adaeb1ea35 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -9,6 +9,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + #ifdef CONFIG_CHROMEOS_VBOOT #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index bcd4c4d9c1..77b6ac9ab9 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -6,6 +6,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Google Panther"; compatible = "google,panther", "intel,haswell"; diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index 70b8c04519..bbea99da2c 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -16,6 +16,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "congatec-QEVAL20-QA3-E3845"; compatible = "congatec,qeval20-qa3-e3845", "intel,baytrail"; diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts index c6ba811e05..602523333e 100644 --- a/arch/x86/dts/cougarcanyon2.dts +++ b/arch/x86/dts/cougarcanyon2.dts @@ -14,6 +14,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Cougar Canyon 2"; compatible = "intel,cougarcanyon2", "intel,chiefriver"; diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index f492c35875..a7166a9749 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -15,6 +15,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Crown Bay"; compatible = "intel,crownbay", "intel,queensbay"; diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi index e9930cb043..7d7b8357d9 100644 --- a/arch/x86/dts/dfi-bt700.dtsi +++ b/arch/x86/dts/dfi-bt700.dtsi @@ -13,6 +13,8 @@ #include "rtc.dtsi" #include "tsc_timer.dtsi" +#include "smbios.dtsi" + / { config { silent_console = <0>; diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index e2f9469de3..bc84bc892e 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -12,6 +12,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Edison"; compatible = "intel,edison"; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index f4cdb2c3cd..133d55bc20 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -15,6 +15,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "Intel Minnowboard Max"; compatible = "intel,minnowmax", "intel,baytrail"; diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts index 2e5210d4ee..c33a11d593 100644 --- a/arch/x86/dts/qemu-x86_i440fx.dts +++ b/arch/x86/dts/qemu-x86_i440fx.dts @@ -14,6 +14,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "QEMU x86 (I440FX)"; compatible = "qemu,x86"; diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts index e8f55b19a2..9faae7fb56 100644 --- a/arch/x86/dts/qemu-x86_q35.dts +++ b/arch/x86/dts/qemu-x86_q35.dts @@ -24,6 +24,8 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" +#include "smbios.dtsi" + / { model = "QEMU x86 (Q35)"; compatible = "qemu,x86"; diff --git a/arch/x86/dts/smbios.dtsi b/arch/x86/dts/smbios.dtsi new file mode 100644 index 0000000000..9fa8c638a5 --- /dev/null +++ b/arch/x86/dts/smbios.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Default SMBIOS information. Include this in your board .dts file if you want + * these defaults. + * + * Copyright 2020 Google LLC + */ + +#include + +/ { + smbios: smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = CONFIG_SYS_VENDOR; + product = CONFIG_SYS_BOARD; + }; + + baseboard { + manufacturer = CONFIG_SYS_VENDOR; + product = CONFIG_SYS_BOARD; + }; + + chassis { + manufacturer = CONFIG_SYS_VENDOR; + /* chassis product is not set by default */ + }; + }; + }; +}; diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index d960793d9a..51f892fb13 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -99,7 +99,7 @@ CONFIG_SOUND_MAX98357A=y CONFIG_SOUND_RT5677=y CONFIG_SPI=y CONFIG_ICH_SPI=y -CONFIG_SYSINFO=y +# CONFIG_SYSINFO_SMBIOS is not set CONFIG_TPL_SYSRESET=y # CONFIG_TPM_V1 is not set CONFIG_TPM2_CR50_I2C=y From e4f8e543f1a905857a753a1d411997a81f4f52aa Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 5 Nov 2020 06:32:18 -0700 Subject: [PATCH 50/50] smbios: Drop the unused Kconfig options Now that we can use devicetree to specify this information, drop the old CONFIG options. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- configs/clearfog_gt_8k_defconfig | 2 -- configs/mt7622_rfb_defconfig | 1 - configs/mvebu_db_armada8k_defconfig | 2 -- configs/r8a774a1_beacon_defconfig | 2 -- configs/r8a77970_eagle_defconfig | 2 -- configs/r8a77980_condor_defconfig | 2 -- configs/r8a77990_ebisu_defconfig | 2 -- configs/r8a77995_draak_defconfig | 2 -- configs/rcar3_salvator-x_defconfig | 2 -- configs/rcar3_ulcb_defconfig | 2 -- lib/Kconfig | 16 --------- lib/smbios.c | 50 +++++++++-------------------- 12 files changed, 15 insertions(+), 70 deletions(-) diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 552df3a8b8..9bb1f212a7 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -12,7 +12,6 @@ CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y @@ -78,4 +77,3 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index a6089d6cf6..ccf926e104 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="mt7622-rfb" CONFIG_LOGLEVEL=7 diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index a88d5cc98b..5d8a1b655c 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y @@ -72,4 +71,3 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig index 5d564d82c2..2f45edd92e 100644 --- a/configs/r8a774a1_beacon_defconfig +++ b/configs/r8a774a1_beacon_defconfig @@ -8,7 +8,6 @@ CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2M=y # CONFIG_SPL is not set CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set @@ -64,4 +63,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index a777484235..9dbe0e1d5b 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -74,4 +73,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 4e457234ed..dbe2912779 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -75,4 +74,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 4667284bb3..cb75b5c3a6 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -84,4 +83,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 5cc0f608da..46a7314fa9 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_DRAAK=y CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -85,4 +84,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 5f2f366554..ff6e0e945e 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SALVATOR_X=y CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -89,4 +88,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 03865dfc34..df202a7598 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_ULCB=y CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y @@ -87,4 +86,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/lib/Kconfig b/lib/Kconfig index fdc35a9232..7673d2e4e0 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -661,22 +661,6 @@ config GENERATE_SMBIOS_TABLE See also SMBIOS_SYSINFO which allows SMBIOS values to be provided in the devicetree. -config SMBIOS_MANUFACTURER - string "SMBIOS Manufacturer" - depends on GENERATE_SMBIOS_TABLE - default SYS_VENDOR - help - The board manufacturer to store in SMBIOS structures. - Change this to override the default one (CONFIG_SYS_VENDOR). - -config SMBIOS_PRODUCT_NAME - string "SMBIOS Product Name" - depends on GENERATE_SMBIOS_TABLE - default SYS_BOARD - help - The product name to store in SMBIOS structures. - Change this to override the default one (CONFIG_SYS_BOARD). - endmenu config ASN1_COMPILER diff --git a/lib/smbios.c b/lib/smbios.c index a52a9d5b30..485a812c77 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -64,30 +64,6 @@ static int smbios_add_string(char *start, const char *str) } } -/** - * smbios_add_prop_default() - Add a property from the device tree or default - * - * @start: string area start address - * @node: node containing the information to write (ofnode_null() if none) - * @prop: property to write - * @def: default string if the node has no such property - * @return 0 if not found, else SMBIOS string number (1 or more) - */ -static int smbios_add_prop_default(char *start, ofnode node, const char *prop, - const char *def) -{ - const char *str = NULL; - - if (IS_ENABLED(CONFIG_OF_CONTROL)) - str = ofnode_read_string(node, prop); - if (str) - return smbios_add_string(start, str); - else if (def) - return smbios_add_string(start, def); - - return 0; -} - /** * smbios_add_prop() - Add a property from the device tree * @@ -98,7 +74,16 @@ static int smbios_add_prop_default(char *start, ofnode node, const char *prop, */ static int smbios_add_prop(char *start, ofnode node, const char *prop) { - return smbios_add_prop_default(start, node, prop, NULL); + + if (IS_ENABLED(CONFIG_OF_CONTROL)) { + const char *str; + + str = ofnode_read_string(node, prop); + if (str) + return smbios_add_string(start, str); + } + + return 0; } /** @@ -169,10 +154,8 @@ static int smbios_write_type1(ulong *current, int handle, ofnode node) t = map_sysmem(*current, len); memset(t, 0, sizeof(struct smbios_type1)); fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); - t->manufacturer = smbios_add_prop_default(t->eos, node, "manufacturer", - CONFIG_SMBIOS_MANUFACTURER); - t->product_name = smbios_add_prop_default(t->eos, node, "product", - CONFIG_SMBIOS_PRODUCT_NAME); + t->manufacturer = smbios_add_prop(t->eos, node, "manufacturer"); + t->product_name = smbios_add_prop(t->eos, node, "product"); t->version = smbios_add_prop(t->eos, node, "version"); if (serial_str) { t->serial_number = smbios_add_string(t->eos, serial_str); @@ -198,10 +181,8 @@ static int smbios_write_type2(ulong *current, int handle, ofnode node) t = map_sysmem(*current, len); memset(t, 0, sizeof(struct smbios_type2)); fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); - t->manufacturer = smbios_add_prop_default(t->eos, node, "manufacturer", - CONFIG_SMBIOS_MANUFACTURER); - t->product_name = smbios_add_prop_default(t->eos, node, "product", - CONFIG_SMBIOS_PRODUCT_NAME); + t->manufacturer = smbios_add_prop(t->eos, node, "manufacturer"); + t->product_name = smbios_add_prop(t->eos, node, "product"); t->asset_tag_number = smbios_add_prop(t->eos, node, "asset-tag"); t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING; t->board_type = SMBIOS_BOARD_MOTHERBOARD; @@ -221,8 +202,7 @@ static int smbios_write_type3(ulong *current, int handle, ofnode node) t = map_sysmem(*current, len); memset(t, 0, sizeof(struct smbios_type3)); fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); - t->manufacturer = smbios_add_prop_default(t->eos, node, "manufacturer", - CONFIG_SMBIOS_MANUFACTURER); + t->manufacturer = smbios_add_prop(t->eos, node, "manufacturer"); t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; t->bootup_state = SMBIOS_STATE_SAFE; t->power_supply_state = SMBIOS_STATE_SAFE;