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https://github.com/brain-hackers/u-boot-brain
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imx6: aristainetos: convert CONFIG_DM_SPI
enable CONFIG_DM_SPI and CONFIG_DM_SPI_FLASH and get rid of build removal warnings. define CONFIG_GPIO_ENABLE_SPI_FLASH is not longer needed, so remove it from config_whitelist.txt Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher
Stefano Babic
parent
64679e2c80
commit
cf8cbb0709
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@ -32,7 +32,6 @@
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#include <dm/root.h>
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#include <env.h>
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#include <micrel.h>
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#include <spi.h>
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#include <video.h>
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#include <../drivers/video/imx/ipu.h>
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#if defined(CONFIG_VIDEO_BMP_LOGO)
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@ -45,9 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
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#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_ODE | PAD_CTL_SRE_FAST)
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@ -56,18 +52,6 @@ DECLARE_GLOBAL_DATA_PTR;
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#define DISP_PAD_CTRL (0x10)
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#define ECSPI4_CS1 IMX_GPIO_NR(5, 2)
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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/* 4.3 display controller */
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#define ECSPI1_CS0 IMX_GPIO_NR(4, 9)
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#define ECSPI4_CS0 IMX_GPIO_NR(3, 29)
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#elif (CONFIG_SYS_BOARD_VERSION == 3)
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#define ECSPI1_CS0 IMX_GPIO_NR(2, 30) /* NOR flash */
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/* 4.3 display controller */
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#define ECSPI1_CS1 IMX_GPIO_NR(4, 10)
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#endif
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enum {
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BOARD_TYPE_4 = 4,
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BOARD_TYPE_7 = 7,
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@ -129,33 +113,11 @@ static iomux_v3_cfg_t const backlight_pads[] = {
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MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static iomux_v3_cfg_t const ecspi1_pads[] = {
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MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(SPI_PAD_CTRL),
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#elif (CONFIG_SYS_BOARD_VERSION == 3)
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MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL),
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MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
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#endif
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};
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static void setup_iomux_enet(void)
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{
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imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
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}
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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iomux_v3_cfg_t const ecspi4_pads[] = {
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MX6_PAD_EIM_D21__ECSPI4_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_D22__ECSPI4_MISO | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_D28__ECSPI4_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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#endif
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static iomux_v3_cfg_t const display_pads[] = {
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MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(DISP_PAD_CTRL),
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MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15,
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@ -187,50 +149,6 @@ static iomux_v3_cfg_t const display_pads[] = {
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MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23,
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};
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int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
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{
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if (bus == CONFIG_SF_DEFAULT_BUS && cs == CONFIG_SF_DEFAULT_CS)
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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return IMX_GPIO_NR(5, 2);
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if (bus == 0 && cs == 0)
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return IMX_GPIO_NR(4, 9);
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#elif (CONFIG_SYS_BOARD_VERSION == 3)
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return ECSPI1_CS0;
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if (bus == 0 && cs == 1)
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return ECSPI1_CS1;
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#endif
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return -1;
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}
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static void setup_spi(void)
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{
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int i;
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imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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imx_iomux_v3_setup_multiple_pads(ecspi4_pads, ARRAY_SIZE(ecspi4_pads));
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#endif
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for (i = 0; i < 4; i++)
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enable_spi_clk(true, i);
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gpio_request(ECSPI1_CS0, "spi1_cs0");
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gpio_direction_output(ECSPI1_CS0, 1);
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#if (CONFIG_SYS_BOARD_VERSION == 2)
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gpio_request(ECSPI4_CS1, "spi4_cs1");
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gpio_direction_output(ECSPI4_CS1, 0);
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/* set cs0 to high (second device on spi bus #4) */
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gpio_request(ECSPI4_CS0, "spi4_cs0");
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gpio_direction_output(ECSPI4_CS0, 1);
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#elif (CONFIG_SYS_BOARD_VERSION == 3)
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gpio_request(ECSPI1_CS1, "spi1_cs1");
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gpio_direction_output(ECSPI1_CS1, 1);
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#endif
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}
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int board_phy_config(struct phy_device *phydev)
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{
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/* control data pad skew - devaddr = 0x02, register = 0x04 */
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@ -564,13 +482,6 @@ static void setup_board_gpio(void)
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setup_one_led("led_blue", LEDST_OFF);
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}
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static void setup_board_spi(void)
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{
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/* enable spi bus #2 SS drivers (and spi bus #4 SS1 for rev2b) */
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gpio_request(IMX_GPIO_NR(6, 6), "spi_ena");
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gpio_direction_output(IMX_GPIO_NR(6, 6), 1);
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}
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int board_late_init(void)
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{
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char *my_bootdelay;
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@ -785,8 +696,6 @@ int board_init(void)
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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setup_spi();
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
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&i2c_pad_info1);
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setup_i2c(1, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
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@ -795,14 +704,8 @@ int board_init(void)
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&i2c_pad_info3);
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setup_i2c4();
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/* SPI NOR Flash read only */
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gpio_request(CONFIG_GPIO_ENABLE_SPI_FLASH, "ena_spi_nor");
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gpio_direction_output(CONFIG_GPIO_ENABLE_SPI_FLASH, 0);
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gpio_free(CONFIG_GPIO_ENABLE_SPI_FLASH);
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setup_board_gpio();
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setup_gpmi_nand();
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setup_board_spi();
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/* GPIO_1 for USB_OTG_ID */
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clrsetbits_le32(&iomux->gpr[1], IOMUXC_GPR1_USB_OTG_ID_SEL_MASK, 0);
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@ -64,6 +64,7 @@ CONFIG_FSL_USDHC=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_NAND_MXS=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_BUS=3
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CONFIG_SF_DEFAULT_CS=1
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CONFIG_SF_DEFAULT_MODE=0
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@ -84,6 +85,7 @@ CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_PWM_IMX=y
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CONFIG_DM_SERIAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_MXC_SPI=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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@ -31,8 +31,6 @@
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"ubifsload ${fit_addr_r} /boot/system.itb; " \
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"imi ${fit_addr_r}\0 "
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#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
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/* Framebuffer */
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#define CONFIG_SYS_LDB_CLOCK 33246000
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#define CONFIG_LG4573
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@ -649,7 +649,6 @@ CONFIG_GLOBAL_DATA_NOT_REG10
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CONFIG_GLOBAL_TIMER
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CONFIG_GMII
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CONFIG_GPCNTRL
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CONFIG_GPIO_ENABLE_SPI_FLASH
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CONFIG_GPIO_LED_INVERTED_TABLE
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CONFIG_GPIO_LED_STUBS
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CONFIG_GREEN_LED
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