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sunxi: Configure only LVDS pins instead of all LCD pins when LVDS interface selected

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The behavior before this patch would attempt to configure the mux
setting for pins 0 to 27 on PORTD to all be setting 3 for LVDS.  The
LVDS interface actually only uses pins 18 to 27 and not pins 0 to 27
as in the parallel LCD interface.  This patch restricts the
configuration to only the relevant pins 18 to 27 on PORTD.

This was tested on a sun8i A33 tablet with an LVDS screen.  MMC1 has
the capability to use pins 2 to 7 on PORTD and the mux on those pins
was being inadvertently set to setting 3 for MMC functionality which
this patch corrects.

Signed-off-by: Lawrence Yu <lyu@micile.com>
[hdegoede@redhat.com: Only apply this change to A23 / A33]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
Lawrence Yu 2016-03-04 09:08:56 -08:00 committed by Hans de Goede
parent 70fe24ed93
commit cf6eca7ccd
1 changed files with 4 additions and 0 deletions
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4
drivers/video/sunxi_display.c
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@ -767,7 +767,11 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
int bp, clk_delay, clk_div, clk_double, pin, total, val;
#if defined CONFIG_MACH_SUN8I && defined CONFIG_VIDEO_LCD_IF_LVDS
for (pin = SUNXI_GPD(18); pin <= SUNXI_GPD(27); pin++) {
#else
for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++) {
#endif
#ifdef CONFIG_VIDEO_LCD_IF_PARALLEL
sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0);
#endif