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ARM: uniphier: move NAND reset assertion to U-Boot proper from SPL

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The comment /* deassert reset */ is wrong. It asserts the reset.

It no longer needs to stay in SPL. The NAND controller reset is
handled  in the driver. So, this assert can be moved to the
board_init() of U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2020-02-14 20:54:40 +09:00
parent ef5c7d6d5c
commit ce4e9ff4d2
5 changed files with 56 additions and 7 deletions
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1
arch/arm/mach-uniphier/Makefile
View File

@ -22,6 +22,7 @@ endif
obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
obj-y += pinctrl-glue.o
obj-$(CONFIG_MMC) += mmc-first-dev.o
obj-$(CONFIG_NAND_DENALI) += nand-reset.o
obj-y += fdt-fixup.o
endif

4
arch/arm/mach-uniphier/board_init.c
View File

@ -141,6 +141,10 @@ int board_init(void)
support_card_late_init();
led_puts("U4");
uniphier_nand_reset_assert();
led_puts("Uboo");
return 0;

7
arch/arm/mach-uniphier/clk/clk-early-ld4.c
View File

@ -15,13 +15,6 @@ void uniphier_ld4_early_clk_init(void)
{
u32 tmp;
/* deassert reset */
if (spl_boot_device() != BOOT_DEVICE_NAND) {
tmp = readl(sc_base + SC_RSTCTRL);
tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, sc_base + SC_RSTCTRL);
};
/* provide clocks */
tmp = readl(sc_base + SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;

8
arch/arm/mach-uniphier/init.h
View File

@ -101,6 +101,14 @@ unsigned int uniphier_boot_device_raw(void);
int uniphier_have_internal_stm(void);
int uniphier_boot_from_backend(void);
int uniphier_pin_init(const char *pinconfig_name);
#ifdef CONFIG_NAND_DENALI
void uniphier_nand_reset_assert(void);
#else
static inline void uniphier_nand_reset_assert(void)
{
}
#endif
#ifdef CONFIG_ARM64
void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size);
#else

43
arch/arm/mach-uniphier/nand-reset.c Normal file
View File

@ -0,0 +1,43 @@
// SPDX-License-Identifier: GPL-2.0 or later
/*
* Copyright (C) 2020 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <linux/errno.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <reset.h>
#include "init.h"
/*
* Assert the Denali NAND controller reset if found.
*
* On LD4, the bootstrap process starts running after power-on reset regardless
* of the boot mode, here the pin-mux is not necessarily set up for NAND, then
* the controller is stuck. Assert the controller reset here, and should be
* deasserted in the driver after the pin-mux is correctly handled. For other
* SoCs, the bootstrap runs only when the boot mode selects ONFi, but it is yet
* effective when the boot swap is on. So, the reset should be asserted anyway.
*/
void uniphier_nand_reset_assert(void)
{
struct udevice *dev;
struct reset_ctl_bulk resets;
int ret;
ret = uclass_find_first_device(UCLASS_MTD, &dev);
if (ret || !dev)
return;
/* make sure this is the Denali NAND controller */
if (strcmp(dev->driver->name, "denali-nand-dt"))
return;
ret = reset_get_bulk(dev, &resets);
if (ret)
return;
reset_assert_bulk(&resets);
}