mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-30 16:40:44 +09:00
Merge branch '2020-08-06-Kconfig-sram-options'
- Migrate a few SRAM related options to Kconfig, related cleanups.
This commit is contained in:
commit
ce2724909b
25
Kconfig
25
Kconfig
@ -379,6 +379,31 @@ config STACK_SIZE
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by the UEFI sub-system. On some boards initrd_high is calculated as
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base stack pointer minus this stack size.
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config SYS_HAS_SRAM
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bool
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default y if TARGET_PIC32MZDASK
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default y if TARGET_DEVKIT8000
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default y if TARGET_TRICORDER
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default n
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help
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Enable this to allow support for the on board SRAM.
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SRAM base address is controlled by CONFIG_SYS_SRAM_BASE.
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SRAM size is controlled by CONFIG_SYS_SRAM_SIZE.
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config SYS_SRAM_BASE
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hex
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default 0x80000000 if TARGET_PIC32MZDASK
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default 0x40200000 if TARGET_DEVKIT8000
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default 0x40200000 if TARGET_TRICORDER
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default 0x0
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config SYS_SRAM_SIZE
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hex
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default 0x00080000 if TARGET_PIC32MZDASK
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default 0x10000 if TARGET_DEVKIT8000
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default 0x10000 if TARGET_TRICORDER
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default 0x0
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endmenu # General setup
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menu "Boot images"
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@ -10,7 +10,6 @@ choice
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config ARC
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bool "ARC architecture"
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select ARCH_EARLY_INIT_R
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select ARC_TIMER
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select CLK
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select HAVE_PRIVATE_LIBGCC
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@ -25,13 +25,6 @@ int arch_cpu_init(void)
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return 0;
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}
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int arch_early_init_r(void)
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{
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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/* This is a dummy function on arc */
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int dram_init(void)
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{
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@ -11,14 +11,31 @@
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DECLARE_GLOBAL_DATA_PTR;
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int arch_setup_bdinfo(void)
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{
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struct bd_info *bd = gd->bd;
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bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
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bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
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if (IS_ENABLED(CONFIG_PCI))
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bd->bi_pcifreq = gd->pci_clk;
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#if defined(CONFIG_EXTRA_CLOCK)
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bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
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bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
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bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
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#endif
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return 0;
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}
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void arch_print_bdinfo(void)
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{
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struct bd_info *bd = gd->bd;
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#if defined(CONFIG_SYS_INIT_RAM_ADDR)
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bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
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bdinfo_print_num("sramsize", (ulong)bd->bi_sramsize);
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#endif
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bdinfo_print_mhz("busfreq", bd->bi_busfreq);
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#if defined(CONFIG_SYS_MBAR)
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bdinfo_print_num("mbar", bd->bi_mbar_base);
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@ -11,6 +11,31 @@
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DECLARE_GLOBAL_DATA_PTR;
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int arch_setup_bdinfo(void)
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{
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struct bd_info *bd = gd->bd;
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#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
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#endif
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#if defined(CONFIG_MPC83xx)
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bd->bi_immrbar = CONFIG_SYS_IMMR;
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#endif
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bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
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bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
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#if defined(CONFIG_CPM2)
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bd->bi_cpmfreq = gd->arch.cpm_clk;
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bd->bi_brgfreq = gd->arch.brg_clk;
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bd->bi_sccfreq = gd->arch.scc_clk;
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bd->bi_vco = gd->arch.vco_out;
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#endif /* CONFIG_CPM2 */
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return 0;
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}
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void __weak board_detail(void)
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{
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/* Please define board_detail() for your PPC platform */
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@ -20,10 +45,6 @@ void arch_print_bdinfo(void)
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{
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struct bd_info *bd = gd->bd;
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#if defined(CONFIG_SYS_INIT_RAM_ADDR)
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bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
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bdinfo_print_num("sramsize", (ulong)bd->bi_sramsize);
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#endif
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bdinfo_print_mhz("busfreq", bd->bi_busfreq);
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#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500)
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bdinfo_print_num("immr_base", bd->bi_immr_base);
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@ -5,4 +5,4 @@
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obj-$(CONFIG_CMD_BOOTM) += bootm.o
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obj-y += cache.o misc.o relocate.o time.o
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obj-y += cache.o misc.o relocate.o time.o bdinfo.o
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22
arch/xtensa/lib/bdinfo.c
Normal file
22
arch/xtensa/lib/bdinfo.c
Normal file
@ -0,0 +1,22 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* XTENSA-specific information for the 'bd' command
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*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#include <common.h>
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#include <init.h>
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DECLARE_GLOBAL_DATA_PTR;
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int arch_setup_bdinfo(void)
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{
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struct bd_info *bd = gd->bd;
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bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
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bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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@ -51,9 +51,6 @@ int checkboard(void)
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int dram_init_banksize(void)
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{
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gd->bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
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gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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@ -77,6 +77,10 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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print_bi_dram(bd);
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bdinfo_print_num("memstart", (ulong)bd->bi_memstart);
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print_phys_addr("memsize", bd->bi_memsize);
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if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
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bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
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bdinfo_print_num("sramsize", (ulong)bd->bi_sramsize);
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}
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bdinfo_print_num("flashstart", (ulong)bd->bi_flashstart);
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bdinfo_print_num("flashsize", (ulong)bd->bi_flashsize);
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bdinfo_print_num("flashoffset", (ulong)bd->bi_flashoffset);
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@ -598,62 +598,25 @@ static int display_new_sp(void)
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return 0;
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}
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#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
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defined(CONFIG_SH)
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static int setup_board_part1(void)
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__weak int arch_setup_bdinfo(void)
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{
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return 0;
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}
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int setup_bdinfo(void)
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{
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struct bd_info *bd = gd->bd;
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/*
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* Save local variables to board info struct
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*/
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bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
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bd->bi_memsize = gd->ram_size; /* size in bytes */
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bd->bi_memstart = gd->ram_base; /* start of memory */
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bd->bi_memsize = gd->ram_size; /* size in bytes */
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#ifdef CONFIG_SYS_SRAM_BASE
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bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
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bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
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#endif
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if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
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bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
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bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
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}
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#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
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#endif
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#if defined(CONFIG_M68K)
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bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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#endif
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#if defined(CONFIG_MPC83xx)
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bd->bi_immrbar = CONFIG_SYS_IMMR;
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#endif
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return 0;
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return arch_setup_bdinfo();
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}
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#endif
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#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
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static int setup_board_part2(void)
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{
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struct bd_info *bd = gd->bd;
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bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
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bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
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#if defined(CONFIG_CPM2)
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bd->bi_cpmfreq = gd->arch.cpm_clk;
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bd->bi_brgfreq = gd->arch.brg_clk;
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bd->bi_sccfreq = gd->arch.scc_clk;
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bd->bi_vco = gd->arch.vco_out;
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#endif /* CONFIG_CPM2 */
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#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
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bd->bi_pcifreq = gd->pci_clk;
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#endif
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#if defined(CONFIG_EXTRA_CLOCK)
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bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
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bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
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bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
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#endif
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return 0;
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}
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#endif
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#ifdef CONFIG_POST
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static int init_post(void)
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@ -975,14 +938,8 @@ static const init_fnc_t init_sequence_f[] = {
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reserve_stacks,
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dram_init_banksize,
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show_dram_config,
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#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
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defined(CONFIG_SH)
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setup_board_part1,
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#endif
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#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
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INIT_FUNC_WATCHDOG_RESET
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setup_board_part2,
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#endif
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setup_bdinfo,
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display_new_sp,
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#ifdef CONFIG_OF_BOARD_FIXUP
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fix_fdt,
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|
@ -187,12 +187,6 @@ static int initr_reloc_global_data(void)
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return 0;
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}
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static int initr_serial(void)
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{
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serial_initialize();
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return 0;
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}
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#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
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static int initr_trap(void)
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{
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@ -714,12 +708,15 @@ static init_fnc_t init_sequence_r[] = {
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||||
#endif
|
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initr_dm_devices,
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stdio_init_tables,
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initr_serial,
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serial_initialize,
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initr_announce,
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#if CONFIG_IS_ENABLED(WDT)
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initr_watchdog,
|
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#endif
|
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INIT_FUNC_WATCHDOG_RESET
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#if defined(CONFIG_NEEDS_MANUAL_RELOC) && defined(CONFIG_BLOCK_CACHE)
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blkcache_init,
|
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#endif
|
||||
#ifdef CONFIG_NEEDS_MANUAL_RELOC
|
||||
initr_manual_reloc_cmdtable,
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#endif
|
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@ -853,9 +850,6 @@ static init_fnc_t init_sequence_r[] = {
|
||||
#endif
|
||||
#if defined(CONFIG_PRAM)
|
||||
initr_mem,
|
||||
#endif
|
||||
#if defined(CONFIG_M68K) && defined(CONFIG_BLOCK_CACHE)
|
||||
blkcache_init,
|
||||
#endif
|
||||
run_main_loop,
|
||||
};
|
||||
|
@ -644,11 +644,12 @@ int blk_unbind_all(int if_type)
|
||||
|
||||
static int blk_post_probe(struct udevice *dev)
|
||||
{
|
||||
#if defined(CONFIG_PARTITIONS) && defined(CONFIG_HAVE_BLOCK_DEVICE)
|
||||
struct blk_desc *desc = dev_get_uclass_platdata(dev);
|
||||
if (IS_ENABLED(CONFIG_PARTITIONS) &&
|
||||
IS_ENABLED(CONFIG_HAVE_BLOCK_DEVICE)) {
|
||||
struct blk_desc *desc = dev_get_uclass_platdata(dev);
|
||||
|
||||
part_init(desc);
|
||||
#endif
|
||||
part_init(desc);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -12,6 +12,10 @@
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
#ifdef CONFIG_NEEDS_MANUAL_RELOC
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
#endif
|
||||
|
||||
struct block_cache_node {
|
||||
struct list_head lh;
|
||||
int iftype;
|
||||
@ -22,21 +26,20 @@ struct block_cache_node {
|
||||
char *cache;
|
||||
};
|
||||
|
||||
#ifndef CONFIG_M68K
|
||||
static LIST_HEAD(block_cache);
|
||||
#else
|
||||
static struct list_head block_cache;
|
||||
#endif
|
||||
|
||||
static struct block_cache_stats _stats = {
|
||||
.max_blocks_per_entry = 8,
|
||||
.max_entries = 32
|
||||
};
|
||||
|
||||
#ifdef CONFIG_M68K
|
||||
#ifdef CONFIG_NEEDS_MANUAL_RELOC
|
||||
int blkcache_init(void)
|
||||
{
|
||||
INIT_LIST_HEAD(&block_cache);
|
||||
struct list_head *head = &block_cache;
|
||||
|
||||
head->next = (uintptr_t)head->next + gd->reloc_off;
|
||||
head->prev = (uintptr_t)head->prev + gd->reloc_off;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -170,9 +170,9 @@ int serial_init(void)
|
||||
}
|
||||
|
||||
/* Called after relocation */
|
||||
void serial_initialize(void)
|
||||
int serial_initialize(void)
|
||||
{
|
||||
serial_init();
|
||||
return serial_init();
|
||||
}
|
||||
|
||||
static void _serial_putc(struct udevice *dev, char ch)
|
||||
|
@ -170,7 +170,7 @@ void serial_register(struct serial_device *dev)
|
||||
* serial port to the serial core. That serial port is then used as a
|
||||
* default output.
|
||||
*/
|
||||
void serial_initialize(void)
|
||||
int serial_initialize(void)
|
||||
{
|
||||
atmel_serial_initialize();
|
||||
mcf_serial_initialize();
|
||||
@ -183,6 +183,8 @@ void serial_initialize(void)
|
||||
mtk_serial_initialize();
|
||||
|
||||
serial_assign(default_serial_console()->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int serial_stub_start(struct stdio_dev *sdev)
|
||||
|
@ -137,10 +137,6 @@
|
||||
|
||||
/* Boot Argument Buffer Size */
|
||||
|
||||
/* SRAM config */
|
||||
#define CONFIG_SYS_SRAM_START 0x40200000
|
||||
#define CONFIG_SYS_SRAM_SIZE 0x10000
|
||||
|
||||
/* Defines for SPL */
|
||||
|
||||
/* NAND boot config */
|
||||
|
@ -19,9 +19,6 @@
|
||||
/*----------------------------------------------------------------------
|
||||
* Memory Layout
|
||||
*/
|
||||
#define CONFIG_SYS_SRAM_BASE 0x80000000
|
||||
#define CONFIG_SYS_SRAM_SIZE 0x00080000 /* 512K */
|
||||
|
||||
/* Initial RAM for temporary stack, global data */
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR \
|
||||
|
@ -197,10 +197,6 @@
|
||||
CONFIG_SYS_INIT_RAM_SIZE - \
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
/* SRAM config */
|
||||
#define CONFIG_SYS_SRAM_START 0x40200000
|
||||
#define CONFIG_SYS_SRAM_SIZE 0x10000
|
||||
|
||||
/* Defines for SPL */
|
||||
|
||||
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
|
||||
|
@ -141,6 +141,28 @@ int arch_reserve_stacks(void);
|
||||
*/
|
||||
int arch_reserve_mmu(void);
|
||||
|
||||
/**
|
||||
* arch_setup_bdinfo() - Architecture dependent boardinfo setup
|
||||
*
|
||||
* Architecture-specific routine for populating various boardinfo fields of
|
||||
* gd->bd. It is called during the generic board init sequence.
|
||||
*
|
||||
* If an implementation is not provided, it will just be a nop stub.
|
||||
*
|
||||
* Return: 0 if OK
|
||||
*/
|
||||
int arch_setup_bdinfo(void);
|
||||
|
||||
/**
|
||||
* setup_bdinfo() - Generic boardinfo setup
|
||||
*
|
||||
* Routine for populating various generic boardinfo fields of
|
||||
* gd->bd. It is called during the generic board init sequence.
|
||||
*
|
||||
* Return: 0 if OK
|
||||
*/
|
||||
int setup_bdinfo(void);
|
||||
|
||||
/**
|
||||
* init_cache_f_r() - Turn on the cache in preparation for relocation
|
||||
*
|
||||
|
@ -42,10 +42,10 @@ extern struct serial_device eserial5_device;
|
||||
extern struct serial_device eserial6_device;
|
||||
|
||||
extern void serial_register(struct serial_device *);
|
||||
extern void serial_initialize(void);
|
||||
extern void serial_stdio_init(void);
|
||||
extern int serial_assign(const char *name);
|
||||
extern void serial_reinit_all(void);
|
||||
int serial_initialize(void);
|
||||
|
||||
/* For usbtty */
|
||||
#ifdef CONFIG_USB_TTY
|
||||
|
@ -3715,9 +3715,6 @@ CONFIG_SYS_SPL_LEN
|
||||
CONFIG_SYS_SPL_MALLOC_SIZE
|
||||
CONFIG_SYS_SPL_MALLOC_START
|
||||
CONFIG_SYS_SPR
|
||||
CONFIG_SYS_SRAM_BASE
|
||||
CONFIG_SYS_SRAM_SIZE
|
||||
CONFIG_SYS_SRAM_START
|
||||
CONFIG_SYS_SRIO
|
||||
CONFIG_SYS_SRIO1_MEM_BASE
|
||||
CONFIG_SYS_SRIO1_MEM_BUS
|
||||
|
Loading…
Reference in New Issue
Block a user