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https://github.com/brain-hackers/u-boot-brain
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cd53034613
@ -34,8 +34,8 @@ enum iomux_reg_addr {
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IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR + 4, /* MUX control */
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IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR + 4, /* MUX control */
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IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + 0x324, /* last MUX control */
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IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + 0x324, /* last MUX control */
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IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + 0x328, /* Pad control */
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IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + 0x328, /* Pad control */
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IOMUXSW_PAD_END = IOMUXC_BASE_ADDR + 0x794, /* last Pad control */
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IOMUXSW_PAD_END = IOMUXC_BASE_ADDR + 0x7A4, /* last Pad control */
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IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + 0x7AC, /* input select */
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IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + 0x7A8, /* input select */
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IOMUXSW_INPUT_END = IOMUXC_BASE_ADDR + 0x9F4, /* last input select */
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IOMUXSW_INPUT_END = IOMUXC_BASE_ADDR + 0x9F4, /* last input select */
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};
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};
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@ -30,7 +30,7 @@ static void *base = (void *)IOMUXC_BASE_ADDR;
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/*
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/*
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* configures a single pad in the iomuxer
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* configures a single pad in the iomuxer
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*/
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*/
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int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
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void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
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{
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{
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u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT;
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u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT;
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u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT;
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u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT;
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@ -50,22 +50,14 @@ int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
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if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
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if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
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__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
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__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
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return 0;
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}
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}
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int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
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void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
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unsigned count)
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unsigned count)
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{
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{
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iomux_v3_cfg_t const *p = pad_list;
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iomux_v3_cfg_t const *p = pad_list;
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int i;
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int i;
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int ret;
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for (i = 0; i < count; i++) {
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for (i = 0; i < count; i++)
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ret = imx_iomux_v3_setup_pad(*p);
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imx_iomux_v3_setup_pad(*p++);
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if (ret)
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return ret;
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p++;
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}
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return 0;
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}
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}
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@ -97,8 +97,8 @@ typedef u64 iomux_v3_cfg_t;
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#define MUX_CONFIG_SION (0x1 << 4)
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#define MUX_CONFIG_SION (0x1 << 4)
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int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
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void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
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int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
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void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
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unsigned count);
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unsigned count);
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#endif /* __MACH_IOMUX_V3_H__*/
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#endif /* __MACH_IOMUX_V3_H__*/
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@ -63,6 +63,7 @@
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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/* Memory configurations */
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/* Memory configurations */
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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@ -17,6 +17,7 @@
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#ifndef __MX6_COMMON_H
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#ifndef __MX6_COMMON_H
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#define __MX6_COMMON_H
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#define __MX6_COMMON_H
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#define CONFIG_ARM_ERRATA_742230
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#define CONFIG_ARM_ERRATA_743622
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#define CONFIG_ARM_ERRATA_743622
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#define CONFIG_ARM_ERRATA_751472
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#define CONFIG_ARM_ERRATA_751472
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