mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
* Patch by Jian Zhang, 3 Feb 2004:
- Changed the incorrect FAT12BUFSIZE - data_begin in fsdata can be negative. Changed it to be short. * Code cleanup
This commit is contained in:
wdenk
parent
ec4c544bed
commit
cd37d9e6e5
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@ -2,6 +2,10 @@
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Changes since U-Boot 1.0.1:
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======================================================================
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* Patch by Jian Zhang, 3 Feb 2004:
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- Changed the incorrect FAT12BUFSIZE
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- data_begin in fsdata can be negative. Changed it to be short.
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* Patches by Stephan Linz, 30 Jan 2004:
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1: - board/altera/common/flash.c:flash_erase():
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o allow interrupts befor get_timer() call
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@ -113,7 +113,7 @@ long int initdram (int board_type)
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memctl->memc_mptpr = 0x0200; /* divide by 32 */
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memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; *//* 0x18005112 TODO: explain here */
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memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
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upmconfig (UPMA, (uint *) sdram_table,
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sizeof (sdram_table) / sizeof (uint));
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@ -19,7 +19,7 @@
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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@ -32,7 +32,7 @@
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#include <linux/byteorder/swab.h>
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#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/* Board support for 1 or 2 flash devices */
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#undef FLASH_PORT_WIDTH32
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@ -120,13 +120,13 @@ unsigned long flash_init (void)
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*/
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flash_unlock(flash_info_t * info)
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{
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int j;
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for (j=2;j<CFG_MAX_FLASH_SECT;j++){
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FPWV *addr = (FPWV *) (info->start[j]);
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flash_unprotect_sectors (addr);
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*addr = (FPW) 0x00500050;/* clear status register */
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*addr = (FPW) 0x00FF00FF;/* resest to read mode */
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}
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int j;
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for (j=2;j<CFG_MAX_FLASH_SECT;j++){
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FPWV *addr = (FPWV *) (info->start[j]);
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flash_unprotect_sectors (addr);
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*addr = (FPW) 0x00500050;/* clear status register */
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*addr = (FPW) 0x00FF00FF;/* resest to read mode */
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}
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}
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/*-----------------------------------------------------------------------
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@ -192,7 +192,7 @@ void flash_print_info (flash_info_t * info)
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i], info->protect[i] ? " (RO)" : " ");
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info->start[i], info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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return;
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@ -224,18 +224,18 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
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info->sector_count = 0;
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info->size = 0;
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addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
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return (0); /* no or unknown flash */
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return (0); /* no or unknown flash */
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}
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mb ();
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value = addr[1]; /* device ID */
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value = addr[1]; /* device ID */
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switch (value) {
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case (FPW) (INTEL_ID_28F256L18T):
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info->flash_id += FLASH_28F256L18T;
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info->sector_count = 259;
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info->size = 0x02000000;
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break; /* => 32 MB */
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break; /* => 32 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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@ -318,7 +318,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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if (info->protect[sect] == 0) { /* not protected */
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FPWV *addr = (FPWV *) (info->start[sect]);
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FPW status;
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@ -348,7 +348,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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}
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}
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/* clear status register cmd. */
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/* clear status register cmd. */
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*addr = (FPW) 0x00500050;
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*addr = (FPW) 0x00FF00FF;/* resest to read mode */
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printf (" done\n");
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@ -860,7 +860,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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}
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for (info = info_first; info <= info_last; ++info) {
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ulong b_end = info->start[0] + info->size;*//* bank end addr */
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ulong b_end = info->start[0] + info->size;*/ /* bank end addr */
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/* short s_end = info->sector_count - 1;
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for (i=0; i<info->sector_count; ++i) {
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ulong e_addr = (i == s_end) ? b_end : info->start[i + 1];
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@ -872,7 +872,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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}
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}
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*//* finally write data to flash */
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*/ /* finally write data to flash */
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/* for (info = info_first; info <= info_last && cnt>0; ++info) {
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ulong len;
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@ -30,11 +30,11 @@
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* Tested Architectures
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* Port Width Chip Width # of banks Flash Chip Board
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* 32 16 1 23F128J3 seranoa/eagle
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*
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*
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*/
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/* The DEBUG define must be before common to enable debugging */
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#undef DEBUG
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#undef DEBUG
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#include <common.h>
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#include <asm/processor.h>
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#ifdef CFG_FLASH_CFI_DRIVER
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@ -170,8 +170,8 @@ void print_longlong(char * str, unsigned long long data)
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int i;
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char *cp;
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cp = (unsigned char *)&data;
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for(i=0;i<8; i++)
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sprintf(&str[i*2], "%2.2x", *cp++);
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for(i=0;i<8; i++)
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sprintf(&str[i*2], "%2.2x", *cp++);
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}
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#endif
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@ -501,7 +501,7 @@ void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int
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void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len)
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{
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uchar * src;
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src = flash_make_addr(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
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flash_write_cmd(info,0, 0, FLASH_CMD_READ_ID);
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memcpy(buffer,src + offset,len);
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@ -510,7 +510,7 @@ void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, i
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#endif /* CFG_FLASH_PROTECTION */
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static int flash_poll_status(flash_info_t * info, flash_sect_t sect)
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static int flash_poll_status(flash_info_t * info, flash_sect_t sect)
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{
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int retval;
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switch(info->vendor) {
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@ -626,27 +626,27 @@ static void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset,
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flash_make_cmd(info, cmd, &cword);
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switch(info->portwidth) {
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case FLASH_CFI_8BIT:
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debug("fwc addr %p cmd %x %x 8bit x %d bit\n",addr.cp, cmd, cword.c,
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debug("fwc addr %p cmd %x %x 8bit x %d bit\n",addr.cp, cmd, cword.c,
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info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
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*addr.cp = cword.c;
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break;
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case FLASH_CFI_16BIT:
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debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n",addr.wp, cmd, cword.w,
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debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n",addr.wp, cmd, cword.w,
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info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
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*addr.wp = cword.w;
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break;
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case FLASH_CFI_32BIT:
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debug("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n",addr.lp, cmd, cword.l,
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debug("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n",addr.lp, cmd, cword.l,
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info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
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*addr.lp = cword.l;
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break;
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case FLASH_CFI_64BIT:
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#ifdef DEBUG
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{
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{
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char str[20];
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print_longlong(str, cword.ll);
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printf("fwc addr %p cmd %x %s 64 bit x %d bit\n",addr.llp, cmd, str,
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printf("fwc addr %p cmd %x %s 64 bit x %d bit\n",addr.llp, cmd, str,
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info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
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}
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#endif
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@ -685,7 +685,7 @@ static int flash_isequal(flash_info_t * info, flash_sect_t sect, uint offset, uc
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retval = (cptr.lp[0] == cword.l);
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break;
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case FLASH_CFI_64BIT:
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#ifdef DEBUG
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#ifdef DEBUG
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{
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char str1[20];
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char str2[20];
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@ -776,14 +776,14 @@ static int flash_detect_cfi(flash_info_t * info)
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info->chipwidth >>= 1) { */
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for(info->chipwidth =FLASH_CFI_BY8;
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info->chipwidth <= info->portwidth;
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info->chipwidth <<= 1) {
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info->chipwidth <<= 1) {
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flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
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flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
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if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
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flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
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flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
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debug("found port %d chip %d ", info->portwidth, info->chipwidth);
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debug("port %d bits chip %d bits\n", info->portwidth << CFI_FLASH_SHIFT_WIDTH,
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debug("port %d bits chip %d bits\n", info->portwidth << CFI_FLASH_SHIFT_WIDTH,
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info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
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return 1;
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}
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@ -823,11 +823,11 @@ static ulong flash_get_size (ulong base, int banknum)
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info->cmd_reset = AMD_CMD_RESET;
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break;
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}
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debug("manufacturer is %d\n", info->vendor);
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size_ratio = info->portwidth / info->chipwidth;
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num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
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debug("size_ration %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
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debug("size_ration %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
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info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
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debug("found %d erase regions\n", num_erase_regions);
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sect_cnt = 0;
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@ -296,11 +296,11 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
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pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_io);
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DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev));
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/* TBS: Passing in current_busno allows for sibling P2P bridges */
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pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
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/*
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* TBS: need to figure out if this is a subordinate bridge on the bus
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/*
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* TBS: need to figure out if this is a subordinate bridge on the bus
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* to be able to properly set the pri/sec/sub bridge registers.
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*/
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n = pci_hose_scan_bus(hose, hose->current_busno);
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@ -84,7 +84,7 @@
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"cp.b 80400000 BFC60000 $(filesize)\0" \
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"initenv=erase bfc40000 bfc5ffff\0" \
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""
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//#define CONFIG_BOOTCOMMAND "run flash_local"
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/*#define CONFIG_BOOTCOMMAND "run flash_local" */
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#define CONFIG_BOOTCOMMAND "run netboot"
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
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@ -43,7 +43,7 @@
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#define FATBUFBLOCKS 6
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#define FATBUFSIZE (FS_BLOCK_SIZE*FATBUFBLOCKS)
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#define FAT12BUFSIZE ((FATBUFSIZE*3)/2)
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#define FAT12BUFSIZE ((FATBUFSIZE*2)/3)
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#define FAT16BUFSIZE (FATBUFSIZE/2)
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#define FAT32BUFSIZE (FATBUFSIZE/4)
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@ -176,7 +176,7 @@ typedef struct {
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__u16 fat_sect; /* Starting sector of the FAT */
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__u16 rootdir_sect; /* Start sector of root directory */
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__u16 clust_size; /* Size of clusters in sectors */
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__u16 data_begin; /* The sector of the first cluster */
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short data_begin; /* The sector of the first cluster, can be negative */
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__u8 fatbuf[FATBUFSIZE]; /* Current FAT buffer */
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int fatbufnum; /* Used by get_fatent, init to -1 */
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} fsdata;
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@ -74,10 +74,6 @@ static unsigned char bcd2bin (unsigned char c);
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static unsigned char rtc_read (unsigned char reg);
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static void rtc_write (unsigned char reg, unsigned char val);
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/* ************************************************************************* */
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#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
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@ -306,10 +302,6 @@ void rtc_reset (void)
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#else /* not CONFIG_SXNI855T */
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/* ************************************************************************* */
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/* read clock time from DS1306 and return it in *tmp */
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void rtc_get (struct rtc_time *tmp)
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{
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Block a user